/*
 * $Id: sdmmcvar.h,v 1.4 2007/12/25 14:08:10 nbrk Exp $
 */
#ifndef _DEV_SDMMC_SDMMCVAR_H
#define _DEV_SDMMC_SDMMCVAR_H

#define SDMMC_BLOCK_SIZE 512

/*
 * SD/MMC simplified commands set.
 */
#define CMD0_GO_IDLE_STATE 			0
#define CMD1_SEND_OP_COND 			1
#define CMD8_SEND_IF_COND 			8
#define CMD9_SEND_CSD 				9
#define CMD10_SEND_CID 				10
#define CMD12_STOP_TRANSMISSION 	12
#define CMD16_SET_BLOCKLEN 			16
#define CMD17_READ_SINGLE_BLOCK 	17
#define CMD18_READ_MULTIPLE_BLOCK 	18
#define CMD23_SET_BLOCK_COUNT 		23
#define CMD24_WRITE_BLOCK 			24
#define CMD25_WRITE_MULTIPLE_BLOCK 	25
#define CMD41_APP_SEND_OP_COND 		41
#define CMD55_APP_CMD 				55
#define CMD58_READ_OCR 				58

/* will use this when switch card from native mode to spi */
#define CMD0_HARDCODED_CRC 			0x95

/*
 * Command frame.
 */
struct sdmmc_cmdframe {
	uint8_t 	sc_cmd;
	uint32_t 	sc_arg;
	uint8_t 	sc_crc;

} __attribute__((packed));

/*
 * Macross to construct frame header and footer.
 */
#define CMDFRAME_CMD(c) ((c & 0x3f) | 0x40)
#define CMDFRAME_CRC(c) (c << 1 | 0x01)

/*
 * Responses bitfields.
 */
#define R1_IN_IDLE_STATE 			0x01
#define R1_ERASE_RESET 				0x02
#define R1_ILLEGAL_COMMAND 			0x04
#define R1_COMMAND_CRC_ERROR 		0x08
#define R1_ERASE_SEQUENSE_ERROR 	0x10
#define R1_ADDRESS_ERROR 			0x20
#define R1_PARAMETER_ERROR 			0x40
#define R2_CARD_LOCKED 				0x01
#define R2_LOCKUNLOCK_FAILED 		0x02
#define R2_UNSPECIFIED_ERROR 		0x04
#define R2_CARD_CONTROLLER_ERROR 	0x08
#define R2_CARD_ECC_FAILED 			0x10
#define R2_WRITE_PROTECT_VIOLATION 	0x20
#define R2_ERASE_PARAMETER 			0x40
#define R2_OUT_OF_RANGE 			0x80


/*
 * R1 response.
 */
struct sdmmc_r1resp {
	uint8_t 	sr_eflags;

};


/*
 * R2 response.
 */
struct sdmmc_r2resp {
	uint8_t 	sr_eflags1;
	uint8_t 	sr_eflags2;

} __attribute__((packed));


/*
 * R3 response.
 */
struct sdmmc_r3resp {
	uint8_t 	sr_eflags;
	uint32_t 	sr_ocr;

} __attribute__((packed));


/*
 * Tokens.
 */
#define TOK_READ_BLOCK 				0xfe
#define TOK_READ_BLOCK_MULTIPLE		0xfe
#define TOK_WRITE_BLOCK 			0xfe
#define TOK_WRITE_BLOCK_MULTIPLE 	0xfc
#define TOK_STOP_MULTIPLE 			0xfd


/*
 * Read Error Token bits.
 */
#define RE_UNSPECIFIED_ERROR 		0x01
#define RE_CARD_CONTROLLER_ERROR 	0x02
#define RE_CARD_ECC_FAILED 			0x04
#define RE_OUT_OF_RANGE 			0x08
#define RE_CARD_LOCKED 				0x10

/*
 * Card CID (Card ID) register.
 */
struct sdmmc_cid {
	uint8_t 	cid_mid;
	uint16_t 	cid_oid;
	uint8_t 	cid_pnm[5];
	uint8_t 	cid_prv;
	uint32_t 	cid_psn;
	uint16_t 	cid_mdt;
	uint8_t 	cid_crc;

} __attribute__((packed));

/*
 * SD/MMC bus handle.
 */
struct sdmmc_bus_handle {
	uint8_t	(*sb_init)(void *dd);
	uint8_t	(*sb_send_command)(void *dd, uint8_t cmd, uint32_t arg, uint8_t crc);
	uint8_t (*sb_set_block_size)(void *dd, uint16_t size);
	uint8_t (*sb_read_block)(void *dd, uint32_t addr, void *buff);
	uint8_t (*sb_write_block)(void *dd, uint32_t addr, void *data);
	/*
	 * XXX implement {read,write}_multiple_block() when we will have DMA.
	 */
	void 	*sb_dd;
};

/*
 * Functions.
 */
uint8_t		sdmmc_init(void *dd);
uint8_t 	sdmmc_send_command(void *dd, uint8_t cmd, uint32_t arg, uint8_t crc);
uint8_t 	sdmmc_set_block_size(void *dd, uint16_t size);
uint8_t 	sdmmc_read_block(void *dd, uint32_t addr, void *buff);
uint8_t 	sdmmc_write_block(void *dd, uint32_t addr, void *data);


struct sdmmc_cmdframe sdmmc_command(uint8_t cmd, uint32_t arg, uint8_t crc);


#endif /* !_DEV_SDMMC_SDMMCVAR_H */