/*
 * $Id: loader.S,v 1.9 2007/12/16 23:17:52 nbrk Exp $
 */
/*
 *	FunnyOS loader
 *	for Atmel SAM7S64 SoC.
 */
.text
.global _start
.global main

_start:
b 	_vector_reset		/* reset */
bl 	_vector_undef		/* undefined insn */
bl 	_vector_swi			/* software intr handler */
bl 	_vector_dataabrt	/* data abort */
bl 	_vector_prefabrt	/* prefetch abort */
.word 0x00000000		/* [reserved] */
b 	_vector_irq			/* IRQ */
bl 	_vector_fiq			/* Fast Interrupt Request */

_vector_reset:
	/*
	 *	Will enter here just right after RESET.
	 *	Relocate .data & .bss into SRAM, set up stack and call main.
	 */

	/* load .data addr */
	ldr r1, Aflash_sdata

	/* load end of FLASH */
	ldr r2, Aflash_edata
	
	/* will copy data in sram starting from that addr */
	ldr r3, Asram_sdata

	/*
	 * Copy data in sram
	 */
loop:
	ldr r4, [r1], #4	/* fetch from flash, increment flash_sdata */
	str r4, [r3], #4	/* store to sram, increment sram_sdata */
	cmp r1, r2			/* compare with flash_edata */
	blo loop

	/*
	 * Setup an IRQ stack
	 */
	/* switch into irq mode with interrupts disabled */
	msr cpsr_c, #(0x12 | 0x80) 

	/* set sp (sp is banked) */
	ldr sp, Airqstack

	/*
	 * Setup system stack
	 */
	/* switch into system mode (interrupts turned off) */
	msr cpsr_c, #(0x1f | 0x80)

	/* set system stack pointer */
	ldr sp, Asysstack

	bl main
	/* NOTREACHED */

_vector_undef:
	/* Undefined insn handler */
	mov pc, r14

_vector_swi:
	mov pc, r14

_vector_dataabrt:
	/* XXX fatal */
	nop

_vector_prefabrt:
	nop

_vector_irq:
	/* decrement pc by one insn */
	sub lr, lr, #4

	/* store all system mode registers */
	stmdb sp!, {r0-r12, lr}

	bl irq_trampoline

	/* load r0-r12 and pc from the stack */
	/* note ^ that copies SPSR into CPSR */
	ldmia sp!, {r0-r12, pc}^

_vector_fiq:
/* TODO */
fiqloop:
	mov r0, r0
	b fiqloop

Aflash_sdata:
.word 	0x0000f000

Aflash_edata:
.word 	0x0000fffc

Asram_sdata:
.word 	0x00200000

/* last word of the physical memory */
Asysstack:
.word 	0x00203ffc

Airqstack:
.word 	0x00203c00