Annotation of sys/dev/usb/if_zydreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: if_zydreg.h,v 1.20 2007/06/06 19:25:49 mk Exp $ */
2:
3: /*-
4: * Copyright (c) 2006 by Damien Bergamini <damien.bergamini@free.fr>
5: * Copyright (c) 2006 by Florian Stoehr <ich@florian-stoehr.de>
6: *
7: * Permission to use, copy, modify, and distribute this software for any
8: * purpose with or without fee is hereby granted, provided that the above
9: * copyright notice and this permission notice appear in all copies.
10: *
11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15: * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16: * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17: * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18: */
19:
20: /*
21: * ZyDAS ZD1211/ZD1211B USB WLAN driver.
22: */
23:
24: #define ZYD_CR_GPI_EN 0x9418
25: #define ZYD_CR_RADIO_PD 0x942c
26: #define ZYD_CR_RF2948_PD 0x942c
27: #define ZYD_CR_EN_PS_MANUAL_AGC 0x943c
28: #define ZYD_CR_CONFIG_PHILIPS 0x9440
29: #define ZYD_CR_I2C_WRITE 0x9444
30: #define ZYD_CR_SA2400_SER_RP 0x9448
31: #define ZYD_CR_RADIO_PE 0x9458
32: #define ZYD_CR_RST_BUS_MASTER 0x945c
33: #define ZYD_CR_RFCFG 0x9464
34: #define ZYD_CR_HSTSCHG 0x946c
35: #define ZYD_CR_PHY_ON 0x9474
36: #define ZYD_CR_RX_DELAY 0x9478
37: #define ZYD_CR_RX_PE_DELAY 0x947c
38: #define ZYD_CR_GPIO_1 0x9490
39: #define ZYD_CR_GPIO_2 0x9494
40: #define ZYD_CR_EnZYD_CRyBufMux 0x94a8
41: #define ZYD_CR_PS_CTRL 0x9500
42: #define ZYD_CR_ADDA_PWR_DWN 0x9504
43: #define ZYD_CR_ADDA_MBIAS_WT 0x9508
44: #define ZYD_CR_INTERRUPT 0x9510
45: #define ZYD_CR_MAC_PS_STATE 0x950c
46: #define ZYD_CR_ATIM_WND_PERIOD 0x951c
47: #define ZYD_CR_BCN_INTERVAL 0x9520
48: #define ZYD_CR_PRE_TBTT 0x9524
49:
50: /*
51: * MAC registers.
52: */
53: #define ZYD_MAC_MACADRL 0x9610 /* MAC address (low) */
54: #define ZYD_MAC_MACADRH 0x9614 /* MAC address (high) */
55: #define ZYD_MAC_BSSADRL 0x9618 /* BSS address (low) */
56: #define ZYD_MAC_BSSADRH 0x961c /* BSS address (high) */
57: #define ZYD_MAC_BCNCFG 0x9620 /* BCN configuration */
58: #define ZYD_MAC_GHTBL 0x9624 /* Group hash table (low) */
59: #define ZYD_MAC_GHTBH 0x9628 /* Group hash table (high) */
60: #define ZYD_MAC_RX_TIMEOUT 0x962c /* Rx timeout value */
61: #define ZYD_MAC_BAS_RATE 0x9630 /* Basic rate setting */
62: #define ZYD_MAC_MAN_RATE 0x9634 /* Mandatory rate setting */
63: #define ZYD_MAC_RTSCTSRATE 0x9638 /* RTS CTS rate */
64: #define ZYD_MAC_BACKOFF_PROTECT 0x963c /* Backoff protection */
65: #define ZYD_MAC_RX_THRESHOLD 0x9640 /* Rx threshold */
66: #define ZYD_MAC_TX_PE_CONTROL 0x9644 /* Tx_PE control */
67: #define ZYD_MAC_AFTER_PNP 0x9648 /* After PnP */
68: #define ZYD_MAC_RX_PE_DELAY 0x964c /* Rx_pe delay */
69: #define ZYD_MAC_RX_ADDR2_L 0x9650 /* RX address2 (low) */
70: #define ZYD_MAC_RX_ADDR2_H 0x9654 /* RX address2 (high) */
71: #define ZYD_MAC_SIFS_ACK_TIME 0x9658 /* Dynamic SIFS ack time */
72: #define ZYD_MAC_PHY_DELAY 0x9660 /* PHY delay */
73: #define ZYD_MAC_PHY_DELAY2 0x966c /* PHY delay */
74: #define ZYD_MAC_BCNFIFO 0x9670 /* Beacon FIFO I/O port */
75: #define ZYD_MAC_SNIFFER 0x9674 /* Sniffer on/off */
76: #define ZYD_MAC_ENCRYPTION_TYPE 0x9678 /* Encryption type */
77: #define ZYD_MAC_RETRY 0x967c /* Retry time */
78: #define ZYD_MAC_MISC 0x9680 /* Misc */
79: #define ZYD_MAC_STMACHINESTAT 0x9684 /* State machine status */
80: #define ZYD_MAC_TX_UNDERRUN_CNT 0x9688 /* TX underrun counter */
81: #define ZYD_MAC_RXFILTER 0x968c /* Send to host settings */
82: #define ZYD_MAC_ACK_EXT 0x9690 /* Acknowledge extension */
83: #define ZYD_MAC_BCNFIFOST 0x9694 /* BCN FIFO set and status */
84: #define ZYD_MAC_DIFS_EIFS_SIFS 0x9698 /* DIFS, EIFS & SIFS settings */
85: #define ZYD_MAC_RX_TIMEOUT_CNT 0x969c /* RX timeout count */
86: #define ZYD_MAC_RX_TOTAL_FRAME 0x96a0 /* RX total frame count */
87: #define ZYD_MAC_RX_CRC32_CNT 0x96a4 /* RX CRC32 frame count */
88: #define ZYD_MAC_RX_CRC16_CNT 0x96a8 /* RX CRC16 frame count */
89: #define ZYD_MAC_RX_UDEC 0x96ac /* RX unicast decr. error count */
90: #define ZYD_MAC_RX_OVERRUN_CNT 0x96b0 /* RX FIFO overrun count */
91: #define ZYD_MAC_RX_MDEC 0x96bc /* RX multicast decr. err. cnt. */
92: #define ZYD_MAC_NAV_TCR 0x96c4 /* NAV timer count read */
93: #define ZYD_MAC_BACKOFF_ST_RD 0x96c8 /* Backoff status read */
94: #define ZYD_MAC_DM_RETRY_CNT_RD 0x96cc /* DM retry count read */
95: #define ZYD_MAC_RX_ACR 0x96d0 /* RX arbitration count read */
96: #define ZYD_MAC_TX_CCR 0x96d4 /* Tx complete count read */
97: #define ZYD_MAC_TCB_ADDR 0x96e8 /* Current PCI process TCP addr */
98: #define ZYD_MAC_RCB_ADDR 0x96ec /* Next RCB address */
99: #define ZYD_MAC_CONT_WIN_LIMIT 0x96f0 /* Contention window limit */
100: #define ZYD_MAC_TX_PKT 0x96f4 /* Tx total packet count read */
101: #define ZYD_MAC_DL_CTRL 0x96f8 /* Download control */
102: #define ZYD_MACB_TXPWR_CTL1 0x9b00
103: #define ZYD_MACB_TXPWR_CTL2 0x9b04
104: #define ZYD_MACB_TXPWR_CTL3 0x9b08
105: #define ZYD_MACB_TXPWR_CTL4 0x9b0c
106: #define ZYD_MACB_AIFS_CTL1 0x9b10
107: #define ZYD_MACB_AIFS_CTL2 0x9b14
108: #define ZYD_MACB_TXOP 0x9b20
109: #define ZYD_MACB_MAX_RETRY 0x9b28
110:
111: /*
112: * Miscellanous registers.
113: */
114: #define ZYD_FIRMWARE_START_ADDR 0xee00
115: #define ZYD_FIRMWARE_BASE_ADDR 0xee1d /* Firmware base address */
116:
117: /*
118: * EEPROM registers.
119: */
120: #define ZYD_EEPROM_START_HEAD 0xf800 /* EEPROM start */
121: #define ZYD_EEPROM_SUBID 0xf817
122: #define ZYD_EEPROM_POD 0xf819
123: #define ZYD_EEPROM_MAC_ADDR_P1 0xf81b /* Part 1 of the MAC address */
124: #define ZYD_EEPROM_MAC_ADDR_P2 0xf81d /* Part 2 of the MAC address */
125: #define ZYD_EEPROM_PWR_CAL 0xf81f /* Calibration */
126: #define ZYD_EEPROM_PWR_INT 0xf827 /* Calibration */
127: #define ZYD_EEPROM_ALLOWEDCHAN 0xf82f /* Allowed CH mask, 1 bit each */
128: #define ZYD_EEPROM_PHY_REG 0xf831 /* PHY registers */
129: #define ZYD_EEPROM_DEVICE_VER 0xf837 /* Device version */
130: #define ZYD_EEPROM_36M_CAL 0xf83f /* Calibration */
131: #define ZYD_EEPROM_11A_INT 0xf847 /* Interpolation */
132: #define ZYD_EEPROM_48M_CAL 0xf84f /* Calibration */
133: #define ZYD_EEPROM_48M_INT 0xf857 /* Interpolation */
134: #define ZYD_EEPROM_54M_CAL 0xf85f /* Calibration */
135: #define ZYD_EEPROM_54M_INT 0xf867 /* Interpolation */
136:
137: /*
138: * Firmware registers offsets (relative to fwbase).
139: */
140: #define ZYD_FW_FIRMWARE_REV 0x0000 /* Firmware version */
141: #define ZYD_FW_USB_SPEED 0x0001 /* USB speed (!=0 if highspeed) */
142: #define ZYD_FW_FIX_TX_RATE 0x0002 /* Fixed TX rate */
143: #define ZYD_FW_LINK_STATUS 0x0003
144: #define ZYD_FW_SOFT_RESET 0x0004
145: #define ZYD_FW_FLASH_CHK 0x0005
146:
147: /* possible flags for register ZYD_FW_LINK_STATUS */
148: #define ZYD_LED1 (1 << 8)
149: #define ZYD_LED2 (1 << 9)
150:
151: /*
152: * RF IDs.
153: */
154: #define ZYD_RF_UW2451 0x2 /* not supported yet */
155: #define ZYD_RF_UCHIP 0x3 /* not supported yet */
156: #define ZYD_RF_AL2230 0x4
157: #define ZYD_RF_AL7230B 0x5
158: #define ZYD_RF_THETA 0x6 /* not supported yet */
159: #define ZYD_RF_AL2210 0x7
160: #define ZYD_RF_MAXIM_NEW 0x8
161: #define ZYD_RF_GCT 0x9
162: #define ZYD_RF_PV2000 0xa /* not supported yet */
163: #define ZYD_RF_RALINK 0xb /* not supported yet */
164: #define ZYD_RF_INTERSIL 0xc /* not supported yet */
165: #define ZYD_RF_RFMD 0xd
166: #define ZYD_RF_MAXIM_NEW2 0xe
167: #define ZYD_RF_PHILIPS 0xf /* not supported yet */
168:
169: /*
170: * PHY registers (8 bits, not documented).
171: */
172: #define ZYD_CR0 0x9000
173: #define ZYD_CR1 0x9004
174: #define ZYD_CR2 0x9008
175: #define ZYD_CR3 0x900c
176: #define ZYD_CR5 0x9010
177: #define ZYD_CR6 0x9014
178: #define ZYD_CR7 0x9018
179: #define ZYD_CR8 0x901c
180: #define ZYD_CR4 0x9020
181: #define ZYD_CR9 0x9024
182: #define ZYD_CR10 0x9028
183: #define ZYD_CR11 0x902c
184: #define ZYD_CR12 0x9030
185: #define ZYD_CR13 0x9034
186: #define ZYD_CR14 0x9038
187: #define ZYD_CR15 0x903c
188: #define ZYD_CR16 0x9040
189: #define ZYD_CR17 0x9044
190: #define ZYD_CR18 0x9048
191: #define ZYD_CR19 0x904c
192: #define ZYD_CR20 0x9050
193: #define ZYD_CR21 0x9054
194: #define ZYD_CR22 0x9058
195: #define ZYD_CR23 0x905c
196: #define ZYD_CR24 0x9060
197: #define ZYD_CR25 0x9064
198: #define ZYD_CR26 0x9068
199: #define ZYD_CR27 0x906c
200: #define ZYD_CR28 0x9070
201: #define ZYD_CR29 0x9074
202: #define ZYD_CR30 0x9078
203: #define ZYD_CR31 0x907c
204: #define ZYD_CR32 0x9080
205: #define ZYD_CR33 0x9084
206: #define ZYD_CR34 0x9088
207: #define ZYD_CR35 0x908c
208: #define ZYD_CR36 0x9090
209: #define ZYD_CR37 0x9094
210: #define ZYD_CR38 0x9098
211: #define ZYD_CR39 0x909c
212: #define ZYD_CR40 0x90a0
213: #define ZYD_CR41 0x90a4
214: #define ZYD_CR42 0x90a8
215: #define ZYD_CR43 0x90ac
216: #define ZYD_CR44 0x90b0
217: #define ZYD_CR45 0x90b4
218: #define ZYD_CR46 0x90b8
219: #define ZYD_CR47 0x90bc
220: #define ZYD_CR48 0x90c0
221: #define ZYD_CR49 0x90c4
222: #define ZYD_CR50 0x90c8
223: #define ZYD_CR51 0x90cc
224: #define ZYD_CR52 0x90d0
225: #define ZYD_CR53 0x90d4
226: #define ZYD_CR54 0x90d8
227: #define ZYD_CR55 0x90dc
228: #define ZYD_CR56 0x90e0
229: #define ZYD_CR57 0x90e4
230: #define ZYD_CR58 0x90e8
231: #define ZYD_CR59 0x90ec
232: #define ZYD_CR60 0x90f0
233: #define ZYD_CR61 0x90f4
234: #define ZYD_CR62 0x90f8
235: #define ZYD_CR63 0x90fc
236: #define ZYD_CR64 0x9100
237: #define ZYD_CR65 0x9104
238: #define ZYD_CR66 0x9108
239: #define ZYD_CR67 0x910c
240: #define ZYD_CR68 0x9110
241: #define ZYD_CR69 0x9114
242: #define ZYD_CR70 0x9118
243: #define ZYD_CR71 0x911c
244: #define ZYD_CR72 0x9120
245: #define ZYD_CR73 0x9124
246: #define ZYD_CR74 0x9128
247: #define ZYD_CR75 0x912c
248: #define ZYD_CR76 0x9130
249: #define ZYD_CR77 0x9134
250: #define ZYD_CR78 0x9138
251: #define ZYD_CR79 0x913c
252: #define ZYD_CR80 0x9140
253: #define ZYD_CR81 0x9144
254: #define ZYD_CR82 0x9148
255: #define ZYD_CR83 0x914c
256: #define ZYD_CR84 0x9150
257: #define ZYD_CR85 0x9154
258: #define ZYD_CR86 0x9158
259: #define ZYD_CR87 0x915c
260: #define ZYD_CR88 0x9160
261: #define ZYD_CR89 0x9164
262: #define ZYD_CR90 0x9168
263: #define ZYD_CR91 0x916c
264: #define ZYD_CR92 0x9170
265: #define ZYD_CR93 0x9174
266: #define ZYD_CR94 0x9178
267: #define ZYD_CR95 0x917c
268: #define ZYD_CR96 0x9180
269: #define ZYD_CR97 0x9184
270: #define ZYD_CR98 0x9188
271: #define ZYD_CR99 0x918c
272: #define ZYD_CR100 0x9190
273: #define ZYD_CR101 0x9194
274: #define ZYD_CR102 0x9198
275: #define ZYD_CR103 0x919c
276: #define ZYD_CR104 0x91a0
277: #define ZYD_CR105 0x91a4
278: #define ZYD_CR106 0x91a8
279: #define ZYD_CR107 0x91ac
280: #define ZYD_CR108 0x91b0
281: #define ZYD_CR109 0x91b4
282: #define ZYD_CR110 0x91b8
283: #define ZYD_CR111 0x91bc
284: #define ZYD_CR112 0x91c0
285: #define ZYD_CR113 0x91c4
286: #define ZYD_CR114 0x91c8
287: #define ZYD_CR115 0x91cc
288: #define ZYD_CR116 0x91d0
289: #define ZYD_CR117 0x91d4
290: #define ZYD_CR118 0x91d8
291: #define ZYD_CR119 0x91dc
292: #define ZYD_CR120 0x91e0
293: #define ZYD_CR121 0x91e4
294: #define ZYD_CR122 0x91e8
295: #define ZYD_CR123 0x91ec
296: #define ZYD_CR124 0x91f0
297: #define ZYD_CR125 0x91f4
298: #define ZYD_CR126 0x91f8
299: #define ZYD_CR127 0x91fc
300: #define ZYD_CR128 0x9200
301: #define ZYD_CR129 0x9204
302: #define ZYD_CR130 0x9208
303: #define ZYD_CR131 0x920c
304: #define ZYD_CR132 0x9210
305: #define ZYD_CR133 0x9214
306: #define ZYD_CR134 0x9218
307: #define ZYD_CR135 0x921c
308: #define ZYD_CR136 0x9220
309: #define ZYD_CR137 0x9224
310: #define ZYD_CR138 0x9228
311: #define ZYD_CR139 0x922c
312: #define ZYD_CR140 0x9230
313: #define ZYD_CR141 0x9234
314: #define ZYD_CR142 0x9238
315: #define ZYD_CR143 0x923c
316: #define ZYD_CR144 0x9240
317: #define ZYD_CR145 0x9244
318: #define ZYD_CR146 0x9248
319: #define ZYD_CR147 0x924c
320: #define ZYD_CR148 0x9250
321: #define ZYD_CR149 0x9254
322: #define ZYD_CR150 0x9258
323: #define ZYD_CR151 0x925c
324: #define ZYD_CR152 0x9260
325: #define ZYD_CR153 0x9264
326: #define ZYD_CR154 0x9268
327: #define ZYD_CR155 0x926c
328: #define ZYD_CR156 0x9270
329: #define ZYD_CR157 0x9274
330: #define ZYD_CR158 0x9278
331: #define ZYD_CR159 0x927c
332: #define ZYD_CR160 0x9280
333: #define ZYD_CR161 0x9284
334: #define ZYD_CR162 0x9288
335: #define ZYD_CR163 0x928c
336: #define ZYD_CR164 0x9290
337: #define ZYD_CR165 0x9294
338: #define ZYD_CR166 0x9298
339: #define ZYD_CR167 0x929c
340: #define ZYD_CR168 0x92a0
341: #define ZYD_CR169 0x92a4
342: #define ZYD_CR170 0x92a8
343: #define ZYD_CR171 0x92ac
344: #define ZYD_CR172 0x92b0
345: #define ZYD_CR173 0x92b4
346: #define ZYD_CR174 0x92b8
347: #define ZYD_CR175 0x92bc
348: #define ZYD_CR176 0x92c0
349: #define ZYD_CR177 0x92c4
350: #define ZYD_CR178 0x92c8
351: #define ZYD_CR179 0x92cc
352: #define ZYD_CR180 0x92d0
353: #define ZYD_CR181 0x92d4
354: #define ZYD_CR182 0x92d8
355: #define ZYD_CR183 0x92dc
356: #define ZYD_CR184 0x92e0
357: #define ZYD_CR185 0x92e4
358: #define ZYD_CR186 0x92e8
359: #define ZYD_CR187 0x92ec
360: #define ZYD_CR188 0x92f0
361: #define ZYD_CR189 0x92f4
362: #define ZYD_CR190 0x92f8
363: #define ZYD_CR191 0x92fc
364: #define ZYD_CR192 0x9300
365: #define ZYD_CR193 0x9304
366: #define ZYD_CR194 0x9308
367: #define ZYD_CR195 0x930c
368: #define ZYD_CR196 0x9310
369: #define ZYD_CR197 0x9314
370: #define ZYD_CR198 0x9318
371: #define ZYD_CR199 0x931c
372: #define ZYD_CR200 0x9320
373: #define ZYD_CR201 0x9324
374: #define ZYD_CR202 0x9328
375: #define ZYD_CR203 0x932c
376: #define ZYD_CR204 0x9330
377: #define ZYD_CR205 0x9334
378: #define ZYD_CR206 0x9338
379: #define ZYD_CR207 0x933c
380: #define ZYD_CR208 0x9340
381: #define ZYD_CR209 0x9344
382: #define ZYD_CR210 0x9348
383: #define ZYD_CR211 0x934c
384: #define ZYD_CR212 0x9350
385: #define ZYD_CR213 0x9354
386: #define ZYD_CR214 0x9358
387: #define ZYD_CR215 0x935c
388: #define ZYD_CR216 0x9360
389: #define ZYD_CR217 0x9364
390: #define ZYD_CR218 0x9368
391: #define ZYD_CR219 0x936c
392: #define ZYD_CR220 0x9370
393: #define ZYD_CR221 0x9374
394: #define ZYD_CR222 0x9378
395: #define ZYD_CR223 0x937c
396: #define ZYD_CR224 0x9380
397: #define ZYD_CR225 0x9384
398: #define ZYD_CR226 0x9388
399: #define ZYD_CR227 0x938c
400: #define ZYD_CR228 0x9390
401: #define ZYD_CR229 0x9394
402: #define ZYD_CR230 0x9398
403: #define ZYD_CR231 0x939c
404: #define ZYD_CR232 0x93a0
405: #define ZYD_CR233 0x93a4
406: #define ZYD_CR234 0x93a8
407: #define ZYD_CR235 0x93ac
408: #define ZYD_CR236 0x93b0
409: #define ZYD_CR240 0x93c0
410: #define ZYD_CR241 0x93c4
411: #define ZYD_CR242 0x93c8
412: #define ZYD_CR243 0x93cc
413: #define ZYD_CR244 0x93d0
414: #define ZYD_CR245 0x93d4
415: #define ZYD_CR251 0x93ec
416: #define ZYD_CR252 0x93f0
417: #define ZYD_CR253 0x93f4
418: #define ZYD_CR254 0x93f8
419: #define ZYD_CR255 0x93fc
420:
421: /* copied nearly verbatim from the Linux driver rewrite */
422: #define ZYD_DEF_PHY \
423: { \
424: { ZYD_CR0, 0x0a }, { ZYD_CR1, 0x06 }, { ZYD_CR2, 0x26 }, \
425: { ZYD_CR3, 0x38 }, { ZYD_CR4, 0x80 }, { ZYD_CR9, 0xa0 }, \
426: { ZYD_CR10, 0x81 }, { ZYD_CR11, 0x00 }, { ZYD_CR12, 0x7f }, \
427: { ZYD_CR13, 0x8c }, { ZYD_CR14, 0x80 }, { ZYD_CR15, 0x3d }, \
428: { ZYD_CR16, 0x20 }, { ZYD_CR17, 0x1e }, { ZYD_CR18, 0x0a }, \
429: { ZYD_CR19, 0x48 }, { ZYD_CR20, 0x0c }, { ZYD_CR21, 0x0c }, \
430: { ZYD_CR22, 0x23 }, { ZYD_CR23, 0x90 }, { ZYD_CR24, 0x14 }, \
431: { ZYD_CR25, 0x40 }, { ZYD_CR26, 0x10 }, { ZYD_CR27, 0x19 }, \
432: { ZYD_CR28, 0x7f }, { ZYD_CR29, 0x80 }, { ZYD_CR30, 0x4b }, \
433: { ZYD_CR31, 0x60 }, { ZYD_CR32, 0x43 }, { ZYD_CR33, 0x08 }, \
434: { ZYD_CR34, 0x06 }, { ZYD_CR35, 0x0a }, { ZYD_CR36, 0x00 }, \
435: { ZYD_CR37, 0x00 }, { ZYD_CR38, 0x38 }, { ZYD_CR39, 0x0c }, \
436: { ZYD_CR40, 0x84 }, { ZYD_CR41, 0x2a }, { ZYD_CR42, 0x80 }, \
437: { ZYD_CR43, 0x10 }, { ZYD_CR44, 0x12 }, { ZYD_CR46, 0xff }, \
438: { ZYD_CR47, 0x08 }, { ZYD_CR48, 0x26 }, { ZYD_CR49, 0x5b }, \
439: { ZYD_CR64, 0xd0 }, { ZYD_CR65, 0x04 }, { ZYD_CR66, 0x58 }, \
440: { ZYD_CR67, 0xc9 }, { ZYD_CR68, 0x88 }, { ZYD_CR69, 0x41 }, \
441: { ZYD_CR70, 0x23 }, { ZYD_CR71, 0x10 }, { ZYD_CR72, 0xff }, \
442: { ZYD_CR73, 0x32 }, { ZYD_CR74, 0x30 }, { ZYD_CR75, 0x65 }, \
443: { ZYD_CR76, 0x41 }, { ZYD_CR77, 0x1b }, { ZYD_CR78, 0x30 }, \
444: { ZYD_CR79, 0x68 }, { ZYD_CR80, 0x64 }, { ZYD_CR81, 0x64 }, \
445: { ZYD_CR82, 0x00 }, { ZYD_CR83, 0x00 }, { ZYD_CR84, 0x00 }, \
446: { ZYD_CR85, 0x02 }, { ZYD_CR86, 0x00 }, { ZYD_CR87, 0x00 }, \
447: { ZYD_CR88, 0xff }, { ZYD_CR89, 0xfc }, { ZYD_CR90, 0x00 }, \
448: { ZYD_CR91, 0x00 }, { ZYD_CR92, 0x00 }, { ZYD_CR93, 0x08 }, \
449: { ZYD_CR94, 0x00 }, { ZYD_CR95, 0x00 }, { ZYD_CR96, 0xff }, \
450: { ZYD_CR97, 0xe7 }, { ZYD_CR98, 0x00 }, { ZYD_CR99, 0x00 }, \
451: { ZYD_CR100, 0x00 }, { ZYD_CR101, 0xae }, { ZYD_CR102, 0x02 }, \
452: { ZYD_CR103, 0x00 }, { ZYD_CR104, 0x03 }, { ZYD_CR105, 0x65 }, \
453: { ZYD_CR106, 0x04 }, { ZYD_CR107, 0x00 }, { ZYD_CR108, 0x0a }, \
454: { ZYD_CR109, 0xaa }, { ZYD_CR110, 0xaa }, { ZYD_CR111, 0x25 }, \
455: { ZYD_CR112, 0x25 }, { ZYD_CR113, 0x00 }, { ZYD_CR119, 0x1e }, \
456: { ZYD_CR125, 0x90 }, { ZYD_CR126, 0x00 }, { ZYD_CR127, 0x00 }, \
457: { ZYD_CR5, 0x00 }, { ZYD_CR6, 0x00 }, { ZYD_CR7, 0x00 }, \
458: { ZYD_CR8, 0x00 }, { ZYD_CR9, 0x20 }, { ZYD_CR12, 0xf0 }, \
459: { ZYD_CR20, 0x0e }, { ZYD_CR21, 0x0e }, { ZYD_CR27, 0x10 }, \
460: { ZYD_CR44, 0x33 }, { ZYD_CR47, 0x30 }, { ZYD_CR83, 0x24 }, \
461: { ZYD_CR84, 0x04 }, { ZYD_CR85, 0x00 }, { ZYD_CR86, 0x0C }, \
462: { ZYD_CR87, 0x12 }, { ZYD_CR88, 0x0C }, { ZYD_CR89, 0x00 }, \
463: { ZYD_CR90, 0x10 }, { ZYD_CR91, 0x08 }, { ZYD_CR93, 0x00 }, \
464: { ZYD_CR94, 0x01 }, { ZYD_CR95, 0x00 }, { ZYD_CR96, 0x50 }, \
465: { ZYD_CR97, 0x37 }, { ZYD_CR98, 0x35 }, { ZYD_CR101, 0x13 }, \
466: { ZYD_CR102, 0x27 }, { ZYD_CR103, 0x27 }, { ZYD_CR104, 0x18 }, \
467: { ZYD_CR105, 0x12 }, { ZYD_CR109, 0x27 }, { ZYD_CR110, 0x27 }, \
468: { ZYD_CR111, 0x27 }, { ZYD_CR112, 0x27 }, { ZYD_CR113, 0x27 }, \
469: { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x26 }, { ZYD_CR116, 0x24 }, \
470: { ZYD_CR117, 0xfc }, { ZYD_CR118, 0xfa }, { ZYD_CR120, 0x4f }, \
471: { ZYD_CR123, 0x27 }, { ZYD_CR125, 0xaa }, { ZYD_CR127, 0x03 }, \
472: { ZYD_CR128, 0x14 }, { ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 }, \
473: { ZYD_CR131, 0x0C }, { ZYD_CR136, 0xdf }, { ZYD_CR137, 0x40 }, \
474: { ZYD_CR138, 0xa0 }, { ZYD_CR139, 0xb0 }, { ZYD_CR140, 0x99 }, \
475: { ZYD_CR141, 0x82 }, { ZYD_CR142, 0x54 }, { ZYD_CR143, 0x1c }, \
476: { ZYD_CR144, 0x6c }, { ZYD_CR147, 0x07 }, { ZYD_CR148, 0x4c }, \
477: { ZYD_CR149, 0x50 }, { ZYD_CR150, 0x0e }, { ZYD_CR151, 0x18 }, \
478: { ZYD_CR160, 0xfe }, { ZYD_CR161, 0xee }, { ZYD_CR162, 0xaa }, \
479: { ZYD_CR163, 0xfa }, { ZYD_CR164, 0xfa }, { ZYD_CR165, 0xea }, \
480: { ZYD_CR166, 0xbe }, { ZYD_CR167, 0xbe }, { ZYD_CR168, 0x6a }, \
481: { ZYD_CR169, 0xba }, { ZYD_CR170, 0xba }, { ZYD_CR171, 0xba }, \
482: { ZYD_CR204, 0x7d }, { ZYD_CR203, 0x30 }, \
483: { 0, 0 } \
484: }
485:
486: #define ZYD_DEF_PHYB \
487: { \
488: { ZYD_CR0, 0x14 }, { ZYD_CR1, 0x06 }, { ZYD_CR2, 0x26 }, \
489: { ZYD_CR3, 0x38 }, { ZYD_CR4, 0x80 }, { ZYD_CR9, 0xe0 }, \
490: { ZYD_CR10, 0x81 }, { ZYD_CR11, 0x00 }, { ZYD_CR12, 0xf0 }, \
491: { ZYD_CR13, 0x8c }, { ZYD_CR14, 0x80 }, { ZYD_CR15, 0x3d }, \
492: { ZYD_CR16, 0x20 }, { ZYD_CR17, 0x1e }, { ZYD_CR18, 0x0a }, \
493: { ZYD_CR19, 0x48 }, { ZYD_CR20, 0x10 }, { ZYD_CR21, 0x0e }, \
494: { ZYD_CR22, 0x23 }, { ZYD_CR23, 0x90 }, { ZYD_CR24, 0x14 }, \
495: { ZYD_CR25, 0x40 }, { ZYD_CR26, 0x10 }, { ZYD_CR27, 0x10 }, \
496: { ZYD_CR28, 0x7f }, { ZYD_CR29, 0x80 }, { ZYD_CR30, 0x4b }, \
497: { ZYD_CR31, 0x60 }, { ZYD_CR32, 0x43 }, { ZYD_CR33, 0x08 }, \
498: { ZYD_CR34, 0x06 }, { ZYD_CR35, 0x0a }, { ZYD_CR36, 0x00 }, \
499: { ZYD_CR37, 0x00 }, { ZYD_CR38, 0x38 }, { ZYD_CR39, 0x0c }, \
500: { ZYD_CR40, 0x84 }, { ZYD_CR41, 0x2a }, { ZYD_CR42, 0x80 }, \
501: { ZYD_CR43, 0x10 }, { ZYD_CR44, 0x33 }, { ZYD_CR46, 0xff }, \
502: { ZYD_CR47, 0x1E }, { ZYD_CR48, 0x26 }, { ZYD_CR49, 0x5b }, \
503: { ZYD_CR64, 0xd0 }, { ZYD_CR65, 0x04 }, { ZYD_CR66, 0x58 }, \
504: { ZYD_CR67, 0xc9 }, { ZYD_CR68, 0x88 }, { ZYD_CR69, 0x41 }, \
505: { ZYD_CR70, 0x23 }, { ZYD_CR71, 0x10 }, { ZYD_CR72, 0xff }, \
506: { ZYD_CR73, 0x32 }, { ZYD_CR74, 0x30 }, { ZYD_CR75, 0x65 }, \
507: { ZYD_CR76, 0x41 }, { ZYD_CR77, 0x1b }, { ZYD_CR78, 0x30 }, \
508: { ZYD_CR79, 0xf0 }, { ZYD_CR80, 0x64 }, { ZYD_CR81, 0x64 }, \
509: { ZYD_CR82, 0x00 }, { ZYD_CR83, 0x24 }, { ZYD_CR84, 0x04 }, \
510: { ZYD_CR85, 0x00 }, { ZYD_CR86, 0x0c }, { ZYD_CR87, 0x12 }, \
511: { ZYD_CR88, 0x0c }, { ZYD_CR89, 0x00 }, { ZYD_CR90, 0x58 }, \
512: { ZYD_CR91, 0x04 }, { ZYD_CR92, 0x00 }, { ZYD_CR93, 0x00 }, \
513: { ZYD_CR94, 0x01 }, { ZYD_CR95, 0x20 }, { ZYD_CR96, 0x50 }, \
514: { ZYD_CR97, 0x37 }, { ZYD_CR98, 0x35 }, { ZYD_CR99, 0x00 }, \
515: { ZYD_CR100, 0x01 }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, \
516: { ZYD_CR103, 0x27 }, { ZYD_CR104, 0x18 }, { ZYD_CR105, 0x12 }, \
517: { ZYD_CR106, 0x04 }, { ZYD_CR107, 0x00 }, { ZYD_CR108, 0x0a }, \
518: { ZYD_CR109, 0x27 }, { ZYD_CR110, 0x27 }, { ZYD_CR111, 0x27 }, \
519: { ZYD_CR112, 0x27 }, { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, \
520: { ZYD_CR115, 0x26 }, { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xfc }, \
521: { ZYD_CR118, 0xfa }, { ZYD_CR119, 0x1e }, { ZYD_CR125, 0x90 }, \
522: { ZYD_CR126, 0x00 }, { ZYD_CR127, 0x00 }, { ZYD_CR128, 0x14 }, \
523: { ZYD_CR129, 0x12 }, { ZYD_CR130, 0x10 }, { ZYD_CR131, 0x0c }, \
524: { ZYD_CR136, 0xdf }, { ZYD_CR137, 0xa0 }, { ZYD_CR138, 0xa8 }, \
525: { ZYD_CR139, 0xb4 }, { ZYD_CR140, 0x98 }, { ZYD_CR141, 0x82 }, \
526: { ZYD_CR142, 0x53 }, { ZYD_CR143, 0x1c }, { ZYD_CR144, 0x6c }, \
527: { ZYD_CR147, 0x07 }, { ZYD_CR148, 0x40 }, { ZYD_CR149, 0x40 }, \
528: { ZYD_CR150, 0x14 }, { ZYD_CR151, 0x18 }, { ZYD_CR159, 0x70 }, \
529: { ZYD_CR160, 0xfe }, { ZYD_CR161, 0xee }, { ZYD_CR162, 0xaa }, \
530: { ZYD_CR163, 0xfa }, { ZYD_CR164, 0xfa }, { ZYD_CR165, 0xea }, \
531: { ZYD_CR166, 0xbe }, { ZYD_CR167, 0xbe }, { ZYD_CR168, 0x6a }, \
532: { ZYD_CR169, 0xba }, { ZYD_CR170, 0xba }, { ZYD_CR171, 0xba }, \
533: { ZYD_CR204, 0x7d }, { ZYD_CR203, 0x30 }, \
534: { 0, 0 } \
535: }
536:
537: #define ZYD_RFMD_PHY \
538: { \
539: { ZYD_CR2, 0x1e }, { ZYD_CR9, 0x20 }, { ZYD_CR10, 0x89 }, \
540: { ZYD_CR11, 0x00 }, { ZYD_CR15, 0xd0 }, { ZYD_CR17, 0x68 }, \
541: { ZYD_CR19, 0x4a }, { ZYD_CR20, 0x0c }, { ZYD_CR21, 0x0e }, \
542: { ZYD_CR23, 0x48 }, { ZYD_CR24, 0x14 }, { ZYD_CR26, 0x90 }, \
543: { ZYD_CR27, 0x30 }, { ZYD_CR29, 0x20 }, { ZYD_CR31, 0xb2 }, \
544: { ZYD_CR32, 0x43 }, { ZYD_CR33, 0x28 }, { ZYD_CR38, 0x30 }, \
545: { ZYD_CR34, 0x0f }, { ZYD_CR35, 0xf0 }, { ZYD_CR41, 0x2a }, \
546: { ZYD_CR46, 0x7f }, { ZYD_CR47, 0x1e }, { ZYD_CR51, 0xc5 }, \
547: { ZYD_CR52, 0xc5 }, { ZYD_CR53, 0xc5 }, { ZYD_CR79, 0x58 }, \
548: { ZYD_CR80, 0x30 }, { ZYD_CR81, 0x30 }, { ZYD_CR82, 0x00 }, \
549: { ZYD_CR83, 0x24 }, { ZYD_CR84, 0x04 }, { ZYD_CR85, 0x00 }, \
550: { ZYD_CR86, 0x10 }, { ZYD_CR87, 0x2a }, { ZYD_CR88, 0x10 }, \
551: { ZYD_CR89, 0x24 }, { ZYD_CR90, 0x18 }, { ZYD_CR91, 0x00 }, \
552: { ZYD_CR92, 0x0a }, { ZYD_CR93, 0x00 }, { ZYD_CR94, 0x01 }, \
553: { ZYD_CR95, 0x00 }, { ZYD_CR96, 0x40 }, { ZYD_CR97, 0x37 }, \
554: { ZYD_CR98, 0x05 }, { ZYD_CR99, 0x28 }, { ZYD_CR100, 0x00 }, \
555: { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, { ZYD_CR103, 0x27 }, \
556: { ZYD_CR104, 0x18 }, { ZYD_CR105, 0x12 }, { ZYD_CR106, 0x1a }, \
557: { ZYD_CR107, 0x24 }, { ZYD_CR108, 0x0a }, { ZYD_CR109, 0x13 }, \
558: { ZYD_CR110, 0x2f }, { ZYD_CR111, 0x27 }, { ZYD_CR112, 0x27 }, \
559: { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x40 }, \
560: { ZYD_CR116, 0x40 }, { ZYD_CR117, 0xf0 }, { ZYD_CR118, 0xf0 }, \
561: { ZYD_CR119, 0x16 }, { ZYD_CR122, 0x00 }, { ZYD_CR127, 0x03 }, \
562: { ZYD_CR131, 0x08 }, { ZYD_CR138, 0x28 }, { ZYD_CR148, 0x44 }, \
563: { ZYD_CR150, 0x10 }, { ZYD_CR169, 0xbb }, { ZYD_CR170, 0xbb } \
564: }
565:
566: #define ZYD_RFMD_RF \
567: { \
568: 0x000007, 0x07dd43, 0x080959, 0x0e6666, 0x116a57, 0x17dd43, \
569: 0x1819f9, 0x1e6666, 0x214554, 0x25e7fa, 0x27fffa, 0x294128, \
570: 0x2c0000, 0x300000, 0x340000, 0x381e0f, 0x6c180f \
571: }
572:
573: #define ZYD_RFMD_CHANTABLE \
574: { \
575: { 0x181979, 0x1e6666 }, \
576: { 0x181989, 0x1e6666 }, \
577: { 0x181999, 0x1e6666 }, \
578: { 0x1819a9, 0x1e6666 }, \
579: { 0x1819b9, 0x1e6666 }, \
580: { 0x1819c9, 0x1e6666 }, \
581: { 0x1819d9, 0x1e6666 }, \
582: { 0x1819e9, 0x1e6666 }, \
583: { 0x1819f9, 0x1e6666 }, \
584: { 0x181a09, 0x1e6666 }, \
585: { 0x181a19, 0x1e6666 }, \
586: { 0x181a29, 0x1e6666 }, \
587: { 0x181a39, 0x1e6666 }, \
588: { 0x181a60, 0x1c0000 } \
589: }
590:
591:
592:
593: #define ZYD_AL2230_PHY \
594: { \
595: { ZYD_CR15, 0x20 }, { ZYD_CR23, 0x40 }, { ZYD_CR24, 0x20 }, \
596: { ZYD_CR26, 0x11 }, { ZYD_CR28, 0x3e }, { ZYD_CR29, 0x00 }, \
597: { ZYD_CR44, 0x33 }, { ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a }, \
598: { ZYD_CR109, 0x09 }, { ZYD_CR110, 0x27 }, { ZYD_CR111, 0x2b }, \
599: { ZYD_CR112, 0x2b }, { ZYD_CR119, 0x0a }, { ZYD_CR10, 0x89 }, \
600: { ZYD_CR17, 0x28 }, { ZYD_CR26, 0x93 }, { ZYD_CR34, 0x30 }, \
601: { ZYD_CR35, 0x3e }, { ZYD_CR41, 0x24 }, { ZYD_CR44, 0x32 }, \
602: { ZYD_CR46, 0x96 }, { ZYD_CR47, 0x1e }, { ZYD_CR79, 0x58 }, \
603: { ZYD_CR80, 0x30 }, { ZYD_CR81, 0x30 }, { ZYD_CR87, 0x0a }, \
604: { ZYD_CR89, 0x04 }, { ZYD_CR92, 0x0a }, { ZYD_CR99, 0x28 }, \
605: { ZYD_CR100, 0x00 }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, \
606: { ZYD_CR106, 0x24 }, { ZYD_CR107, 0x2a }, { ZYD_CR109, 0x09 }, \
607: { ZYD_CR110, 0x13 }, { ZYD_CR111, 0x1f }, { ZYD_CR112, 0x1f }, \
608: { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, \
609: { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfc }, \
610: { ZYD_CR119, 0x10 }, { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, \
611: { ZYD_CR122, 0xe0 }, { ZYD_CR137, 0x88 }, { ZYD_CR252, 0xff }, \
612: { ZYD_CR253, 0xff }, { ZYD_CR251, 0x2f }, { ZYD_CR251, 0x3f }, \
613: { ZYD_CR138, 0x28 }, { ZYD_CR203, 0x06 } \
614: }
615:
616: #define ZYD_AL2230_PHY_B \
617: { \
618: { ZYD_CR10, 0x89 }, { ZYD_CR15, 0x20 }, { ZYD_CR17, 0x2b }, \
619: { ZYD_CR23, 0x40 }, { ZYD_CR24, 0x20 }, { ZYD_CR26, 0x93 }, \
620: { ZYD_CR28, 0x3e }, { ZYD_CR29, 0x00 }, { ZYD_CR33, 0x28 }, \
621: { ZYD_CR34, 0x30 }, { ZYD_CR35, 0x3e }, { ZYD_CR41, 0x24 }, \
622: { ZYD_CR44, 0x32 }, { ZYD_CR46, 0x99 }, { ZYD_CR47, 0x1e }, \
623: { ZYD_CR48, 0x00 }, { ZYD_CR49, 0x00 }, { ZYD_CR51, 0x01 }, \
624: { ZYD_CR52, 0x80 }, { ZYD_CR53, 0x7e }, { ZYD_CR65, 0x00 }, \
625: { ZYD_CR66, 0x00 }, { ZYD_CR67, 0x00 }, { ZYD_CR68, 0x00 }, \
626: { ZYD_CR69, 0x28 }, { ZYD_CR79, 0x58 }, { ZYD_CR80, 0x30 }, \
627: { ZYD_CR81, 0x30 }, { ZYD_CR87, 0x0a }, { ZYD_CR89, 0x04 }, \
628: { ZYD_CR91, 0x00 }, { ZYD_CR92, 0x0a }, { ZYD_CR98, 0x8d }, \
629: { ZYD_CR99, 0x00 }, { ZYD_CR101, 0x13 }, { ZYD_CR106, 0x24 }, \
630: { ZYD_CR107, 0x2a }, { ZYD_CR109, 0x13 }, { ZYD_CR110, 0x1f }, \
631: { ZYD_CR111, 0x1f }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x26 }, \
632: { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xfa }, { ZYD_CR118, 0xfa }, \
633: { ZYD_CR119, 0x10 }, { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x6c }, \
634: { ZYD_CR122, 0xfc }, { ZYD_CR123, 0x57 }, { ZYD_CR125, 0xad }, \
635: { ZYD_CR126, 0x6c }, { ZYD_CR127, 0x03 }, { ZYD_CR137, 0x50 }, \
636: { ZYD_CR138, 0xa8 }, { ZYD_CR144, 0xac }, { ZYD_CR150, 0x0d }, \
637: { ZYD_CR252, 0x00 }, { ZYD_CR253, 0x00 } \
638: }
639:
640: #define ZYD_AL2230_RF \
641: { \
642: 0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3, \
643: 0x000da4, 0x0f4dc5, 0x0805b6, 0x011687, 0x000688, 0x0403b9, \
644: 0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00500f, 0x00d00f, \
645: 0x004c0f, 0x00540f, 0x00700f, 0x00500f \
646: }
647:
648: #define ZYD_AL2230_RF_B \
649: { \
650: 0x03f790, 0x033331, 0x00000d, 0x0b3331, 0x03b812, 0x00fff3, \
651: 0x0005a4, 0x0f4dc5, 0x0805b6, 0x0146c7, 0x000688, 0x0403b9, \
652: 0x00dbba, 0x00099b, 0x0bdffc, 0x00000d, 0x00580f \
653: }
654:
655: #define ZYD_AL2230_CHANTABLE \
656: { \
657: { 0x03f790, 0x033331, 0x00000d }, \
658: { 0x03f790, 0x0b3331, 0x00000d }, \
659: { 0x03e790, 0x033331, 0x00000d }, \
660: { 0x03e790, 0x0b3331, 0x00000d }, \
661: { 0x03f7a0, 0x033331, 0x00000d }, \
662: { 0x03f7a0, 0x0b3331, 0x00000d }, \
663: { 0x03e7a0, 0x033331, 0x00000d }, \
664: { 0x03e7a0, 0x0b3331, 0x00000d }, \
665: { 0x03f7b0, 0x033331, 0x00000d }, \
666: { 0x03f7b0, 0x0b3331, 0x00000d }, \
667: { 0x03e7b0, 0x033331, 0x00000d }, \
668: { 0x03e7b0, 0x0b3331, 0x00000d }, \
669: { 0x03f7c0, 0x033331, 0x00000d }, \
670: { 0x03e7c0, 0x066661, 0x00000d } \
671: }
672:
673:
674:
675: #define ZYD_AL7230B_PHY_1 \
676: { \
677: { ZYD_CR240, 0x57 }, { ZYD_CR15, 0x20 }, { ZYD_CR23, 0x40 }, \
678: { ZYD_CR24, 0x20 }, { ZYD_CR26, 0x11 }, { ZYD_CR28, 0x3e }, \
679: { ZYD_CR29, 0x00 }, { ZYD_CR44, 0x33 }, { ZYD_CR106, 0x22 }, \
680: { ZYD_CR107, 0x1a }, { ZYD_CR109, 0x09 }, { ZYD_CR110, 0x27 }, \
681: { ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b }, { ZYD_CR119, 0x0a }, \
682: { ZYD_CR122, 0xfc }, { ZYD_CR10, 0x89 }, { ZYD_CR17, 0x28 }, \
683: { ZYD_CR26, 0x93 }, { ZYD_CR34, 0x30 }, { ZYD_CR35, 0x3e }, \
684: { ZYD_CR41, 0x24 }, { ZYD_CR44, 0x32 }, { ZYD_CR46, 0x96 }, \
685: { ZYD_CR47, 0x1e }, { ZYD_CR79, 0x58 }, { ZYD_CR80, 0x30 }, \
686: { ZYD_CR81, 0x30 }, { ZYD_CR87, 0x0a }, { ZYD_CR89, 0x04 }, \
687: { ZYD_CR92, 0x0a }, { ZYD_CR99, 0x28 }, { ZYD_CR100, 0x02 }, \
688: { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, { ZYD_CR106, 0x22 }, \
689: { ZYD_CR107, 0x3f }, { ZYD_CR109, 0x09 }, { ZYD_CR110, 0x1f }, \
690: { ZYD_CR111, 0x1f }, { ZYD_CR112, 0x1f }, { ZYD_CR113, 0x27 }, \
691: { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, { ZYD_CR116, 0x3f }, \
692: { ZYD_CR117, 0xfa }, { ZYD_CR118, 0xfc }, { ZYD_CR119, 0x10 }, \
693: { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR137, 0x88 }, \
694: { ZYD_CR138, 0xa8 }, { ZYD_CR252, 0x34 }, { ZYD_CR253, 0x34 }, \
695: { ZYD_CR251, 0x2f } \
696: }
697:
698: #define ZYD_AL7230B_PHY_2 \
699: { \
700: { ZYD_CR251, 0x3f }, { ZYD_CR128, 0x14 }, { ZYD_CR129, 0x12 }, \
701: { ZYD_CR130, 0x10 }, { ZYD_CR38, 0x38 }, { ZYD_CR136, 0xdf } \
702: }
703:
704: #define ZYD_AL7230B_PHY_3 \
705: { \
706: { ZYD_CR203, 0x06 }, { ZYD_CR240, 0x80 } \
707: }
708:
709: #define ZYD_AL7230B_RF_1 \
710: { \
711: 0x09ec04, 0x8cccc8, 0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401, \
712: 0x6cf56a, 0xe04073, 0x193d76, 0x9dd844, 0x500007, 0xd8c010, \
713: 0x3c9000, 0xbfffff, 0x700000, 0xf15d58 \
714: }
715:
716: #define ZYD_AL7230B_RF_2 \
717: { \
718: 0xf15d59, 0xf15d5c, 0xf15d58 \
719: }
720:
721: #define ZYD_AL7230B_RF_SETCHANNEL \
722: { \
723: 0x4ff821, 0xc5fbfc, 0x21ebfe, 0xafd401, 0x6cf56a, 0xe04073, \
724: 0x193d76, 0x9dd844, 0x500007, 0xd8c010, 0x3c9000, 0xf15d58 \
725: }
726:
727: #define ZYD_AL7230B_CHANTABLE \
728: { \
729: { 0x09ec00, 0x8cccc8 }, \
730: { 0x09ec00, 0x8cccd8 }, \
731: { 0x09ec00, 0x8cccc0 }, \
732: { 0x09ec00, 0x8cccd0 }, \
733: { 0x05ec00, 0x8cccc8 }, \
734: { 0x05ec00, 0x8cccd8 }, \
735: { 0x05ec00, 0x8cccc0 }, \
736: { 0x05ec00, 0x8cccd0 }, \
737: { 0x0dec00, 0x8cccc8 }, \
738: { 0x0dec00, 0x8cccd8 }, \
739: { 0x0dec00, 0x8cccc0 }, \
740: { 0x0dec00, 0x8cccd0 }, \
741: { 0x03ec00, 0x8cccc8 }, \
742: { 0x03ec00, 0x866660 } \
743: }
744:
745:
746:
747: #define ZYD_AL2210_PHY \
748: { \
749: { ZYD_CR9, 0xe0 }, { ZYD_CR10, 0x91 }, { ZYD_CR12, 0x90 }, \
750: { ZYD_CR15, 0xd0 }, { ZYD_CR16, 0x40 }, { ZYD_CR17, 0x58 }, \
751: { ZYD_CR18, 0x04 }, { ZYD_CR23, 0x66 }, { ZYD_CR24, 0x14 }, \
752: { ZYD_CR26, 0x90 }, { ZYD_CR31, 0x80 }, { ZYD_CR34, 0x06 }, \
753: { ZYD_CR35, 0x3e }, { ZYD_CR38, 0x38 }, { ZYD_CR46, 0x90 }, \
754: { ZYD_CR47, 0x1e }, { ZYD_CR64, 0x64 }, { ZYD_CR79, 0xb5 }, \
755: { ZYD_CR80, 0x38 }, { ZYD_CR81, 0x30 }, { ZYD_CR113, 0xc0 }, \
756: { ZYD_CR127, 0x03 } \
757: }
758:
759: #define ZYD_AL2210_RF \
760: { \
761: 0x2396c0, 0x00fcb1, 0x358132, 0x0108b3, 0xc77804, 0x456415, \
762: 0xff2226, 0x806667, 0x7860f8, 0xbb01c9, 0x00000a, 0x00000b \
763: }
764:
765: #define ZYD_AL2210_CHANTABLE \
766: { \
767: 0x0196c0, 0x019710, 0x019760, 0x0197b0, 0x019800, 0x019850, \
768: 0x0198a0, 0x0198f0, 0x019940, 0x019990, 0x0199e0, 0x019a30, \
769: 0x019a80, 0x019b40 \
770: }
771:
772:
773:
774: #define ZYD_GCT_PHY \
775: { \
776: { ZYD_CR47, 0x1e }, { ZYD_CR15, 0xdc }, { ZYD_CR113, 0xc0 }, \
777: { ZYD_CR20, 0x0c }, { ZYD_CR17, 0x65 }, { ZYD_CR34, 0x04 }, \
778: { ZYD_CR35, 0x35 }, { ZYD_CR24, 0x20 }, { ZYD_CR9, 0xe0 }, \
779: { ZYD_CR127, 0x02 }, { ZYD_CR10, 0x91 }, { ZYD_CR23, 0x7f }, \
780: { ZYD_CR27, 0x10 }, { ZYD_CR28, 0x7a }, { ZYD_CR79, 0xb5 }, \
781: { ZYD_CR64, 0x80 }, { ZYD_CR33, 0x28 }, { ZYD_CR38, 0x30 } \
782: }
783:
784: #define ZYD_GCT_RF \
785: { \
786: 0x1f0000, 0x1f0000, 0x1f0200, 0x1f0600, 0x1f8600, 0x1f8600, \
787: 0x002050, 0x1f8000, 0x1f8200, 0x1f8600, 0x1c0000, 0x10c458, \
788: 0x088e92, 0x187b82, 0x0401b4, 0x140816, 0x0c7000, 0x1c0000, \
789: 0x02ccae, 0x128023, 0x0a0000, 0x1a0000, 0x06e380, 0x16cb94, \
790: 0x0e1740, 0x014980, 0x116240, 0x090000, 0x192304, 0x05112f, \
791: 0x0d54a8, 0x0f8000, 0x1c0008, 0x1c0000, 0x1a0000, 0x1c0008, \
792: 0x150000, 0x0c7000, 0x150800, 0x150000 \
793: }
794:
795: #define ZYD_GCT_CHANTABLE \
796: { \
797: 0x1a0000, 0x1a8000, 0x1a4000, 0x1ac000, 0x1a2000, 0x1aa000, \
798: 0x1a6000, 0x1ae000, 0x1a1000, 0x1a9000, 0x1a5000, 0x1ad000, \
799: 0x1a3000, 0x1ab000 \
800: }
801:
802:
803:
804: #define ZYD_MAXIM_PHY \
805: { \
806: { ZYD_CR23, 0x40 }, { ZYD_CR15, 0x20 }, { ZYD_CR28, 0x3e }, \
807: { ZYD_CR29, 0x00 }, { ZYD_CR26, 0x11 }, { ZYD_CR44, 0x33 }, \
808: { ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a }, { ZYD_CR109, 0x2b }, \
809: { ZYD_CR110, 0x2b }, { ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b }, \
810: { ZYD_CR10, 0x89 }, { ZYD_CR17, 0x20 }, { ZYD_CR26, 0x93 }, \
811: { ZYD_CR34, 0x30 }, { ZYD_CR35, 0x40 }, { ZYD_CR41, 0x24 }, \
812: { ZYD_CR44, 0x32 }, { ZYD_CR46, 0x90 }, { ZYD_CR89, 0x18 }, \
813: { ZYD_CR92, 0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, \
814: { ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 }, \
815: { ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 }, \
816: { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, \
817: { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfa }, \
818: { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR122, 0xfe }, \
819: { ZYD_CR10, 0x89 }, { ZYD_CR17, 0x20 }, { ZYD_CR26, 0x93 }, \
820: { ZYD_CR34, 0x30 }, { ZYD_CR35, 0x40 }, { ZYD_CR41, 0x24 }, \
821: { ZYD_CR44, 0x32 }, { ZYD_CR46, 0x90 }, { ZYD_CR89, 0x18 }, \
822: { ZYD_CR92, 0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, \
823: { ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x13 }, \
824: { ZYD_CR110, 0x27 }, { ZYD_CR111, 0x27 }, { ZYD_CR112, 0x13 }, \
825: { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, \
826: { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0x00 }, \
827: { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x06 }, { ZYD_CR122, 0xfe }, \
828: { ZYD_CR150, 0x0d } \
829: }
830:
831: #define ZYD_MAXIM_RF \
832: { \
833: 0x00ccd4, 0x030a03, 0x000400, 0x000ca1, 0x010072, 0x018645, \
834: 0x004006, 0x0000a7, 0x008258, 0x003fc9, 0x00040a, 0x00000b, \
835: 0x00026c \
836: }
837:
838: #define ZYD_MAXIM_CHANTABLE \
839: { \
840: { 0x0ccd4, 0x30a03 }, \
841: { 0x22224, 0x00a13 }, \
842: { 0x37774, 0x10a13 }, \
843: { 0x0ccd4, 0x30a13 }, \
844: { 0x22224, 0x00a23 }, \
845: { 0x37774, 0x10a23 }, \
846: { 0x0ccd4, 0x30a23 }, \
847: { 0x22224, 0x00a33 }, \
848: { 0x37774, 0x10a33 }, \
849: { 0x0ccd4, 0x30a33 }, \
850: { 0x22224, 0x00a43 }, \
851: { 0x37774, 0x10a43 }, \
852: { 0x0ccd4, 0x30a43 }, \
853: { 0x199a4, 0x20a53 } \
854: }
855:
856:
857:
858: #define ZYD_MAXIM2_PHY \
859: { \
860: { ZYD_CR23, 0x40 }, { ZYD_CR15, 0x20 }, { ZYD_CR28, 0x3e }, \
861: { ZYD_CR29, 0x00 }, { ZYD_CR26, 0x11 }, { ZYD_CR44, 0x33 }, \
862: { ZYD_CR106, 0x2a }, { ZYD_CR107, 0x1a }, { ZYD_CR109, 0x2b }, \
863: { ZYD_CR110, 0x2b }, { ZYD_CR111, 0x2b }, { ZYD_CR112, 0x2b }, \
864: { ZYD_CR10, 0x89 }, { ZYD_CR17, 0x20 }, { ZYD_CR26, 0x93 }, \
865: { ZYD_CR34, 0x30 }, { ZYD_CR35, 0x40 }, { ZYD_CR41, 0x24 }, \
866: { ZYD_CR44, 0x32 }, { ZYD_CR46, 0x90 }, { ZYD_CR89, 0x18 }, \
867: { ZYD_CR92, 0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, \
868: { ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 }, \
869: { ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 }, \
870: { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, \
871: { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0xfa }, \
872: { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x77 }, { ZYD_CR122, 0xfe }, \
873: { ZYD_CR10, 0x89 }, { ZYD_CR17, 0x20 }, { ZYD_CR26, 0x93 }, \
874: { ZYD_CR34, 0x30 }, { ZYD_CR35, 0x40 }, { ZYD_CR41, 0x24 }, \
875: { ZYD_CR44, 0x32 }, { ZYD_CR46, 0x90 }, { ZYD_CR79, 0x58 }, \
876: { ZYD_CR80, 0x30 }, { ZYD_CR81, 0x30 }, { ZYD_CR89, 0x18 }, \
877: { ZYD_CR92, 0x0a }, { ZYD_CR101, 0x13 }, { ZYD_CR102, 0x27 }, \
878: { ZYD_CR106, 0x20 }, { ZYD_CR107, 0x24 }, { ZYD_CR109, 0x09 }, \
879: { ZYD_CR110, 0x13 }, { ZYD_CR111, 0x13 }, { ZYD_CR112, 0x13 }, \
880: { ZYD_CR113, 0x27 }, { ZYD_CR114, 0x27 }, { ZYD_CR115, 0x24 }, \
881: { ZYD_CR116, 0x24 }, { ZYD_CR117, 0xf4 }, { ZYD_CR118, 0x00 }, \
882: { ZYD_CR120, 0x4f }, { ZYD_CR121, 0x06 }, { ZYD_CR122, 0xfe } \
883: }
884:
885: #define ZYD_MAXIM2_RF \
886: { \
887: 0x33334, 0x10a03, 0x00400, 0x00ca1, 0x10072, 0x18645, 0x04006, \
888: 0x000a7, 0x08258, 0x03fc9, 0x0040a, 0x0000b, 0x0026c \
889: }
890:
891: #define ZYD_MAXIM2_CHANTABLE_F \
892: { \
893: 0x33334, 0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334, \
894: 0x08884, 0x1ddd4, 0x33334, 0x08884, 0x1ddd4, 0x33334, 0x26664 \
895: }
896:
897: #define ZYD_MAXIM2_CHANTABLE \
898: { \
899: { 0x33334, 0x10a03 }, \
900: { 0x08884, 0x20a13 }, \
901: { 0x1ddd4, 0x30a13 }, \
902: { 0x33334, 0x10a13 }, \
903: { 0x08884, 0x20a23 }, \
904: { 0x1ddd4, 0x30a23 }, \
905: { 0x33334, 0x10a23 }, \
906: { 0x08884, 0x20a33 }, \
907: { 0x1ddd4, 0x30a33 }, \
908: { 0x33334, 0x10a33 }, \
909: { 0x08884, 0x20a43 }, \
910: { 0x1ddd4, 0x30a43 }, \
911: { 0x33334, 0x10a43 }, \
912: { 0x26664, 0x20a53 } \
913: }
914:
915: /*
916: * Control pipe requests.
917: */
918: #define ZYD_DOWNLOADREQ 0x30
919: #define ZYD_DOWNLOADSTS 0x31
920:
921: /* possible values for register ZYD_CR_INTERRUPT */
922: #define ZYD_HWINT_MASK 0x004f0000
923:
924: /* possible values for register ZYD_MAC_MISC */
925: #define ZYD_UNLOCK_PHY_REGS 0x80
926:
927: /* possible values for register ZYD_MAC_ENCRYPTION_TYPE */
928: #define ZYD_ENC_SNIFFER 8
929:
930: /* flags for register ZYD_MAC_RXFILTER */
931: #define ZYD_FILTER_ASS_REQ (1 << 0)
932: #define ZYD_FILTER_ASS_RSP (1 << 1)
933: #define ZYD_FILTER_REASS_REQ (1 << 2)
934: #define ZYD_FILTER_REASS_RSP (1 << 3)
935: #define ZYD_FILTER_PRB_REQ (1 << 4)
936: #define ZYD_FILTER_PRB_RSP (1 << 5)
937: #define ZYD_FILTER_BCN (1 << 8)
938: #define ZYD_FILTER_ATIM (1 << 9)
939: #define ZYD_FILTER_DEASS (1 << 10)
940: #define ZYD_FILTER_AUTH (1 << 11)
941: #define ZYD_FILTER_DEAUTH (1 << 12)
942: #define ZYD_FILTER_PS_POLL (1 << 26)
943: #define ZYD_FILTER_RTS (1 << 27)
944: #define ZYD_FILTER_CTS (1 << 28)
945: #define ZYD_FILTER_ACK (1 << 29)
946: #define ZYD_FILTER_CFE (1 << 30)
947: #define ZYD_FILTER_CFE_A (1 << 31)
948:
949: /* helpers for register ZYD_MAC_RXFILTER */
950: #define ZYD_FILTER_MONITOR 0xffffffff
951: #define ZYD_FILTER_BSS \
952: (ZYD_FILTER_ASS_RSP | ZYD_FILTER_REASS_RSP | \
953: ZYD_FILTER_PRB_RSP | ZYD_FILTER_BCN | ZYD_FILTER_DEASS | \
954: ZYD_FILTER_AUTH | ZYD_FILTER_DEAUTH)
955: #define ZYD_FILTER_HOSTAP \
956: (ZYD_FILTER_ASS_REQ | ZYD_FILTER_REASS_REQ | \
957: ZYD_FILTER_PRB_REQ | ZYD_FILTER_DEASS | ZYD_FILTER_AUTH | \
958: ZYD_FILTER_DEAUTH | ZYD_FILTER_PS_POLL)
959:
960: struct zyd_tx_desc {
961: uint8_t phy;
962: #define ZYD_TX_PHY_SIGNAL(x) ((x) & 0xf)
963: #define ZYD_TX_PHY_OFDM (1 << 4)
964: #define ZYD_TX_PHY_SHPREAMBLE (1 << 5) /* CCK */
965: #define ZYD_TX_PHY_5GHZ (1 << 5) /* OFDM */
966:
967: uint16_t len;
968: uint8_t flags;
969: #define ZYD_TX_FLAG_BACKOFF (1 << 0)
970: #define ZYD_TX_FLAG_MULTICAST (1 << 1)
971: #define ZYD_TX_FLAG_TYPE(x) (((x) & 0x3) << 2)
972: #define ZYD_TX_TYPE_DATA 0
973: #define ZYD_TX_TYPE_PS_POLL 1
974: #define ZYD_TX_TYPE_MGMT 2
975: #define ZYD_TX_TYPE_CTL 3
976: #define ZYD_TX_FLAG_WAKEUP (1 << 4)
977: #define ZYD_TX_FLAG_RTS (1 << 5)
978: #define ZYD_TX_FLAG_ENCRYPT (1 << 6)
979: #define ZYD_TX_FLAG_CTS_TO_SELF (1 << 7)
980:
981: uint16_t pktlen;
982: uint16_t plcp_length;
983: uint8_t plcp_service;
984: #define ZYD_PLCP_LENGEXT 0x80
985:
986: uint16_t nextlen;
987: } __packed;
988:
989: struct zyd_plcphdr {
990: uint8_t signal;
991: uint8_t reserved[2];
992: uint16_t service; /* unaligned! */
993: } __packed;
994:
995: struct zyd_rx_stat {
996: uint8_t rssi;
997: uint8_t signal_cck;
998: uint8_t signal_ofdm;
999: uint8_t cipher;
1000: #define ZYD_RX_CIPHER_WEP64 1
1001: #define ZYD_RX_CIPHER_TKIP 2
1002: #define ZYD_RX_CIPHER_AES 4
1003: #define ZYD_RX_CIPHER_WEP128 5
1004: #define ZYD_RX_CIPHER_WEP256 6
1005: #define ZYD_RX_CIPHER_WEP \
1006: (ZYD_RX_CIPHER_WEP64 | ZYD_RX_CIPHER_WEP128 | ZYD_RX_CIPHER_WEP256)
1007:
1008: uint8_t flags;
1009: #define ZYD_RX_OFDM (1 << 0)
1010: #define ZYD_RX_TIMEOUT (1 << 1)
1011: #define ZYD_RX_OVERRUN (1 << 2)
1012: #define ZYD_RX_DECRYPTERR (1 << 3)
1013: #define ZYD_RX_BADCRC32 (1 << 4)
1014: #define ZYD_RX_NOT2ME (1 << 5)
1015: #define ZYD_RX_BADCRC16 (1 << 6)
1016: #define ZYD_RX_ERROR (1 << 7)
1017: } __packed;
1018:
1019: /* this structure may be unaligned */
1020: struct zyd_rx_desc {
1021: #define ZYD_MAX_RXFRAMECNT 3
1022: uWord len[ZYD_MAX_RXFRAMECNT];
1023: uWord tag;
1024: #define ZYD_TAG_MULTIFRAME 0x697e
1025: } __packed;
1026:
1027: /* I2C bus alike */
1028: struct zyd_rfwrite {
1029: uint16_t code;
1030: uint16_t width;
1031: uint16_t bit[32];
1032: #define ZYD_RF_IF_LE (1 << 1)
1033: #define ZYD_RF_CLK (1 << 2)
1034: #define ZYD_RF_DATA (1 << 3)
1035: } __packed;
1036:
1037: struct zyd_cmd {
1038: uint16_t code;
1039: #define ZYD_CMD_IOWR 0x0021 /* write HMAC or PHY register */
1040: #define ZYD_CMD_IORD 0x0022 /* read HMAC or PHY register */
1041: #define ZYD_CMD_RFCFG 0x0023 /* write RF register */
1042: #define ZYD_NOTIF_IORD 0x9001 /* response for ZYD_CMD_IORD */
1043: #define ZYD_NOTIF_MACINTR 0x9001 /* interrupt notification */
1044: #define ZYD_NOTIF_RETRYSTATUS 0xa001 /* Tx retry notification */
1045:
1046: uint8_t data[64];
1047: } __packed;
1048:
1049: /* structure for command ZYD_CMD_IOWR */
1050: struct zyd_pair {
1051: uint16_t reg;
1052: /* helpers macros to read/write 32-bit registers */
1053: #define ZYD_REG32_LO(reg) (reg)
1054: #define ZYD_REG32_HI(reg) \
1055: ((reg) + ((((reg) & 0xf000) == 0x9000) ? 2 : 1))
1056:
1057: uint16_t val;
1058: } __packed;
1059:
1060: /* structure for notification ZYD_NOTIF_RETRYSTATUS */
1061: struct zyd_notif_retry {
1062: uint16_t rate;
1063: uint8_t macaddr[IEEE80211_ADDR_LEN];
1064: uint16_t count;
1065: } __packed;
1066:
1067:
1068: #define ZYD_RX_LIST_CNT 1
1069: #define ZYD_TX_LIST_CNT 1
1070:
1071: #define ZYD_CONFIG_NO 1
1072: #define ZYD_IFACE_INDEX 0
1073:
1074: #define ZYD_INTR_TIMEOUT 1000
1075: #define ZYD_TX_TIMEOUT 10000
1076:
1077: #define ZYD_MAX_TXBUFSZ \
1078: (sizeof (struct zyd_tx_desc) + IEEE80211_MAX_LEN)
1079:
1080: #define ZYD_MIN_FRAGSZ \
1081: (sizeof (struct zyd_plcphdr) + IEEE80211_MIN_LEN + \
1082: sizeof (struct zyd_rx_stat))
1083: #define ZYD_MIN_RXBUFSZ ZYD_MIN_FRAGSZ
1084: #define ZYX_MAX_RXBUFSZ \
1085: (sizeof (struct zyd_plcphdr) + MCLBYTES + sizeof (struct zyd_rx_desc))
1086:
1087: #define ZYD_CMD_FLAG_READ (1 << 0)
1088:
1089: /* quickly determine if a given rate is CCK or OFDM */
1090: #define ZYD_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1091:
1092: struct zyd_phy_pair {
1093: uint16_t reg;
1094: uint8_t val;
1095: };
1096:
1097: struct zyd_mac_pair {
1098: uint16_t reg;
1099: uint32_t val;
1100: };
1101:
1102: struct zyd_tx_data {
1103: struct zyd_softc *sc;
1104: usbd_xfer_handle xfer;
1105: uint8_t *buf;
1106: struct ieee80211_node *ni;
1107: };
1108:
1109: struct zyd_rx_data {
1110: struct zyd_softc *sc;
1111: usbd_xfer_handle xfer;
1112: const uint8_t *buf;
1113: };
1114:
1115: struct zyd_node {
1116: struct ieee80211_node ni; /* must be the first */
1117: struct ieee80211_amrr_node amn;
1118: };
1119:
1120: struct zyd_rx_radiotap_header {
1121: struct ieee80211_radiotap_header wr_ihdr;
1122: uint8_t wr_flags;
1123: uint8_t wr_rate;
1124: uint16_t wr_chan_freq;
1125: uint16_t wr_chan_flags;
1126: uint8_t wr_rssi;
1127: } __packed;
1128:
1129: #define ZYD_RX_RADIOTAP_PRESENT \
1130: ((1 << IEEE80211_RADIOTAP_FLAGS) | \
1131: (1 << IEEE80211_RADIOTAP_RATE) | \
1132: (1 << IEEE80211_RADIOTAP_CHANNEL) | \
1133: (1 << IEEE80211_RADIOTAP_RSSI))
1134:
1135: struct zyd_tx_radiotap_header {
1136: struct ieee80211_radiotap_header wt_ihdr;
1137: uint8_t wt_flags;
1138: uint8_t wt_rate;
1139: uint16_t wt_chan_freq;
1140: uint16_t wt_chan_flags;
1141: } __packed;
1142:
1143: #define ZYD_TX_RADIOTAP_PRESENT \
1144: ((1 << IEEE80211_RADIOTAP_FLAGS) | \
1145: (1 << IEEE80211_RADIOTAP_RATE) | \
1146: (1 << IEEE80211_RADIOTAP_CHANNEL))
1147:
1148: struct zyd_softc; /* forward declaration */
1149:
1150: struct zyd_rf {
1151: /* RF methods */
1152: int (*init)(struct zyd_rf *);
1153: int (*switch_radio)(struct zyd_rf *, int);
1154: int (*set_channel)(struct zyd_rf *, uint8_t);
1155:
1156: /* RF attributes */
1157: struct zyd_softc *rf_sc; /* back-pointer */
1158: int width;
1159: };
1160:
1161: struct zyd_softc {
1162: struct device sc_dev;
1163: struct ieee80211com sc_ic;
1164: int (*sc_newstate)(struct ieee80211com *,
1165: enum ieee80211_state, int);
1166: struct zyd_rf sc_rf;
1167:
1168: struct usb_task sc_task;
1169: usbd_device_handle sc_udev;
1170: usbd_interface_handle sc_iface;
1171:
1172: enum ieee80211_state sc_state;
1173: int sc_arg;
1174: int attached;
1175:
1176: struct timeout scan_to;
1177: struct timeout amrr_to;
1178:
1179: struct ieee80211_amrr amrr;
1180:
1181: void *odata;
1182: int olen;
1183:
1184: uint16_t fwbase;
1185: uint8_t regdomain;
1186: uint8_t mac_rev;
1187: uint16_t fw_rev;
1188: uint8_t rf_rev;
1189: uint8_t pa_rev;
1190: uint8_t pwr_cal[14];
1191: uint8_t pwr_int[14];
1192: uint8_t ofdm36_cal[14];
1193: uint8_t ofdm48_cal[14];
1194: uint8_t ofdm54_cal[14];
1195:
1196: #define ZYD_ENDPT_BOUT 0
1197: #define ZYD_ENDPT_BIN 1
1198: #define ZYD_ENDPT_IIN 2
1199: #define ZYD_ENDPT_IOUT 3
1200: #define ZYD_ENDPT_CNT 4
1201: usbd_pipe_handle zyd_ep[ZYD_ENDPT_CNT];
1202: uint8_t *ibuf;
1203:
1204: struct zyd_rx_data rx_data[ZYD_RX_LIST_CNT];
1205: struct zyd_tx_data tx_data[ZYD_TX_LIST_CNT];
1206: int tx_queued;
1207:
1208: int tx_timer;
1209:
1210: #if NBPFILTER > 0
1211: caddr_t sc_drvbpf;
1212:
1213: union {
1214: struct zyd_rx_radiotap_header th;
1215: uint8_t pad[64];
1216: } sc_rxtapu;
1217: #define sc_rxtap sc_rxtapu.th
1218: int sc_rxtap_len;
1219:
1220: union {
1221: struct zyd_tx_radiotap_header th;
1222: uint8_t pad[64];
1223: } sc_txtapu;
1224: #define sc_txtap sc_txtapu.th
1225: int sc_txtap_len;
1226: #endif
1227: };
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