Annotation of sys/dev/usb/if_ral.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: if_ral.c,v 1.100 2007/07/18 18:10:31 damien Exp $ */
2:
3: /*-
4: * Copyright (c) 2005, 2006
5: * Damien Bergamini <damien.bergamini@free.fr>
6: *
7: * Permission to use, copy, modify, and distribute this software for any
8: * purpose with or without fee is hereby granted, provided that the above
9: * copyright notice and this permission notice appear in all copies.
10: *
11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15: * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16: * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17: * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18: */
19:
20: /*-
21: * Ralink Technology RT2500USB chipset driver
22: * http://www.ralinktech.com.tw/
23: */
24:
25: #include "bpfilter.h"
26:
27: #include <sys/param.h>
28: #include <sys/sockio.h>
29: #include <sys/sysctl.h>
30: #include <sys/mbuf.h>
31: #include <sys/kernel.h>
32: #include <sys/socket.h>
33: #include <sys/systm.h>
34: #include <sys/malloc.h>
35: #include <sys/timeout.h>
36: #include <sys/conf.h>
37: #include <sys/device.h>
38:
39: #include <machine/bus.h>
40: #include <machine/endian.h>
41: #include <machine/intr.h>
42:
43: #if NBPFILTER > 0
44: #include <net/bpf.h>
45: #endif
46: #include <net/if.h>
47: #include <net/if_arp.h>
48: #include <net/if_dl.h>
49: #include <net/if_media.h>
50: #include <net/if_types.h>
51:
52: #include <netinet/in.h>
53: #include <netinet/in_systm.h>
54: #include <netinet/in_var.h>
55: #include <netinet/if_ether.h>
56: #include <netinet/ip.h>
57:
58: #include <net80211/ieee80211_var.h>
59: #include <net80211/ieee80211_amrr.h>
60: #include <net80211/ieee80211_radiotap.h>
61:
62: #include <dev/usb/usb.h>
63: #include <dev/usb/usbdi.h>
64: #include <dev/usb/usbdi_util.h>
65: #include <dev/usb/usbdevs.h>
66:
67: #include <dev/usb/if_ralreg.h>
68: #include <dev/usb/if_ralvar.h>
69:
70: #ifdef USB_DEBUG
71: #define URAL_DEBUG
72: #endif
73:
74: #ifdef URAL_DEBUG
75: #define DPRINTF(x) do { if (ural_debug) printf x; } while (0)
76: #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0)
77: int ural_debug = 0;
78: #else
79: #define DPRINTF(x)
80: #define DPRINTFN(n, x)
81: #endif
82:
83: /* various supported device vendors/products */
84: static const struct usb_devno ural_devs[] = {
85: { USB_VENDOR_ASUS, USB_PRODUCT_ASUS_RT2570 },
86: { USB_VENDOR_ASUS, USB_PRODUCT_ASUS_RT2570_2 },
87: { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 },
88: { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G },
89: { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP },
90: { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS },
91: { USB_VENDOR_CONCEPTRONIC2, USB_PRODUCT_CONCEPTRONIC2_C54RU },
92: { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_RT2570 },
93: { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG },
94: { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 },
95: { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 },
96: { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI },
97: { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB },
98: { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI },
99: { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570 },
100: { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_2 },
101: { USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_3 },
102: { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W },
103: { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 },
104: { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 },
105: { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 },
106: { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R },
107: { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_RT2570 },
108: { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 },
109: { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_RT2570 }
110: };
111:
112: int ural_alloc_tx_list(struct ural_softc *);
113: void ural_free_tx_list(struct ural_softc *);
114: int ural_alloc_rx_list(struct ural_softc *);
115: void ural_free_rx_list(struct ural_softc *);
116: int ural_media_change(struct ifnet *);
117: void ural_next_scan(void *);
118: void ural_task(void *);
119: int ural_newstate(struct ieee80211com *, enum ieee80211_state,
120: int);
121: void ural_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
122: void ural_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
123: #if NBPFILTER > 0
124: uint8_t ural_rxrate(const struct ural_rx_desc *);
125: #endif
126: int ural_ack_rate(struct ieee80211com *, int);
127: uint16_t ural_txtime(int, int, uint32_t);
128: uint8_t ural_plcp_signal(int);
129: void ural_setup_tx_desc(struct ural_softc *, struct ural_tx_desc *,
130: uint32_t, int, int);
131: int ural_tx_bcn(struct ural_softc *, struct mbuf *,
132: struct ieee80211_node *);
133: int ural_tx_data(struct ural_softc *, struct mbuf *,
134: struct ieee80211_node *);
135: void ural_start(struct ifnet *);
136: void ural_watchdog(struct ifnet *);
137: int ural_ioctl(struct ifnet *, u_long, caddr_t);
138: void ural_eeprom_read(struct ural_softc *, uint16_t, void *, int);
139: uint16_t ural_read(struct ural_softc *, uint16_t);
140: void ural_read_multi(struct ural_softc *, uint16_t, void *, int);
141: void ural_write(struct ural_softc *, uint16_t, uint16_t);
142: void ural_write_multi(struct ural_softc *, uint16_t, void *, int);
143: void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
144: uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
145: void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
146: void ural_set_chan(struct ural_softc *, struct ieee80211_channel *);
147: void ural_disable_rf_tune(struct ural_softc *);
148: void ural_enable_tsf_sync(struct ural_softc *);
149: void ural_update_slot(struct ural_softc *);
150: void ural_set_txpreamble(struct ural_softc *);
151: void ural_set_basicrates(struct ural_softc *);
152: void ural_set_bssid(struct ural_softc *, const uint8_t *);
153: void ural_set_macaddr(struct ural_softc *, const uint8_t *);
154: void ural_update_promisc(struct ural_softc *);
155: const char *ural_get_rf(int);
156: void ural_read_eeprom(struct ural_softc *);
157: int ural_bbp_init(struct ural_softc *);
158: void ural_set_txantenna(struct ural_softc *, int);
159: void ural_set_rxantenna(struct ural_softc *, int);
160: int ural_init(struct ifnet *);
161: void ural_stop(struct ifnet *, int);
162: void ural_newassoc(struct ieee80211com *, struct ieee80211_node *,
163: int);
164: void ural_amrr_start(struct ural_softc *, struct ieee80211_node *);
165: void ural_amrr_timeout(void *);
166: void ural_amrr_update(usbd_xfer_handle, usbd_private_handle,
167: usbd_status status);
168:
169: static const struct {
170: uint16_t reg;
171: uint16_t val;
172: } ural_def_mac[] = {
173: RAL_DEF_MAC
174: };
175:
176: static const struct {
177: uint8_t reg;
178: uint8_t val;
179: } ural_def_bbp[] = {
180: RAL_DEF_BBP
181: };
182:
183: static const uint32_t ural_rf2522_r2[] = RAL_RF2522_R2;
184: static const uint32_t ural_rf2523_r2[] = RAL_RF2523_R2;
185: static const uint32_t ural_rf2524_r2[] = RAL_RF2524_R2;
186: static const uint32_t ural_rf2525_r2[] = RAL_RF2525_R2;
187: static const uint32_t ural_rf2525_hi_r2[] = RAL_RF2525_HI_R2;
188: static const uint32_t ural_rf2525e_r2[] = RAL_RF2525E_R2;
189: static const uint32_t ural_rf2526_hi_r2[] = RAL_RF2526_HI_R2;
190: static const uint32_t ural_rf2526_r2[] = RAL_RF2526_R2;
191:
192: int ural_match(struct device *, void *, void *);
193: void ural_attach(struct device *, struct device *, void *);
194: int ural_detach(struct device *, int);
195: int ural_activate(struct device *, enum devact);
196:
197: struct cfdriver ural_cd = {
198: NULL, "ural", DV_IFNET
199: };
200:
201: const struct cfattach ural_ca = {
202: sizeof(struct ural_softc),
203: ural_match,
204: ural_attach,
205: ural_detach,
206: ural_activate,
207: };
208:
209: int
210: ural_match(struct device *parent, void *match, void *aux)
211: {
212: struct usb_attach_arg *uaa = aux;
213:
214: if (uaa->iface != NULL)
215: return UMATCH_NONE;
216:
217: return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ?
218: UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
219: }
220:
221: void
222: ural_attach(struct device *parent, struct device *self, void *aux)
223: {
224: struct ural_softc *sc = (struct ural_softc *)self;
225: struct usb_attach_arg *uaa = aux;
226: struct ieee80211com *ic = &sc->sc_ic;
227: struct ifnet *ifp = &ic->ic_if;
228: usb_interface_descriptor_t *id;
229: usb_endpoint_descriptor_t *ed;
230: usbd_status error;
231: char *devinfop;
232: int i;
233:
234: sc->sc_udev = uaa->device;
235:
236: devinfop = usbd_devinfo_alloc(uaa->device, 0);
237: printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
238: usbd_devinfo_free(devinfop);
239:
240: if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
241: printf("%s: could not set configuration no\n",
242: sc->sc_dev.dv_xname);
243: return;
244: }
245:
246: /* get the first interface handle */
247: error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
248: &sc->sc_iface);
249: if (error != 0) {
250: printf("%s: could not get interface handle\n",
251: sc->sc_dev.dv_xname);
252: return;
253: }
254:
255: /*
256: * Find endpoints.
257: */
258: id = usbd_get_interface_descriptor(sc->sc_iface);
259:
260: sc->sc_rx_no = sc->sc_tx_no = -1;
261: for (i = 0; i < id->bNumEndpoints; i++) {
262: ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
263: if (ed == NULL) {
264: printf("%s: no endpoint descriptor for iface %d\n",
265: sc->sc_dev.dv_xname, i);
266: return;
267: }
268:
269: if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
270: UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
271: sc->sc_rx_no = ed->bEndpointAddress;
272: else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
273: UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK)
274: sc->sc_tx_no = ed->bEndpointAddress;
275: }
276: if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
277: printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
278: return;
279: }
280:
281: usb_init_task(&sc->sc_task, ural_task, sc);
282: timeout_set(&sc->scan_to, ural_next_scan, sc);
283:
284: sc->amrr.amrr_min_success_threshold = 1;
285: sc->amrr.amrr_max_success_threshold = 10;
286: timeout_set(&sc->amrr_to, ural_amrr_timeout, sc);
287:
288: /* retrieve RT2570 rev. no */
289: sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
290:
291: /* retrieve MAC address and various other things from EEPROM */
292: ural_read_eeprom(sc);
293:
294: printf("%s: MAC/BBP RT%04x (rev 0x%02x), RF %s, address %s\n",
295: sc->sc_dev.dv_xname, sc->macbbp_rev, sc->asic_rev,
296: ural_get_rf(sc->rf_rev), ether_sprintf(ic->ic_myaddr));
297:
298: ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
299: ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
300: ic->ic_state = IEEE80211_S_INIT;
301:
302: /* set device capabilities */
303: ic->ic_caps =
304: IEEE80211_C_IBSS | /* IBSS mode supported */
305: IEEE80211_C_MONITOR | /* monitor mode supported */
306: IEEE80211_C_HOSTAP | /* HostAp mode supported */
307: IEEE80211_C_TXPMGT | /* tx power management */
308: IEEE80211_C_SHPREAMBLE | /* short preamble supported */
309: IEEE80211_C_SHSLOT | /* short slot time supported */
310: IEEE80211_C_WEP; /* s/w WEP */
311:
312: /* set supported .11b and .11g rates */
313: ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
314: ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
315:
316: /* set supported .11b and .11g channels (1 through 14) */
317: for (i = 1; i <= 14; i++) {
318: ic->ic_channels[i].ic_freq =
319: ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
320: ic->ic_channels[i].ic_flags =
321: IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
322: IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
323: }
324:
325: ifp->if_softc = sc;
326: ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
327: ifp->if_init = ural_init;
328: ifp->if_ioctl = ural_ioctl;
329: ifp->if_start = ural_start;
330: ifp->if_watchdog = ural_watchdog;
331: IFQ_SET_READY(&ifp->if_snd);
332: memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
333:
334: if_attach(ifp);
335: ieee80211_ifattach(ifp);
336: ic->ic_newassoc = ural_newassoc;
337:
338: /* override state transition machine */
339: sc->sc_newstate = ic->ic_newstate;
340: ic->ic_newstate = ural_newstate;
341: ieee80211_media_init(ifp, ural_media_change, ieee80211_media_status);
342:
343: #if NBPFILTER > 0
344: bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
345: sizeof (struct ieee80211_frame) + 64);
346:
347: sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
348: sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
349: sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
350:
351: sc->sc_txtap_len = sizeof sc->sc_txtapu;
352: sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
353: sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
354: #endif
355:
356: usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
357: &sc->sc_dev);
358: }
359:
360: int
361: ural_detach(struct device *self, int flags)
362: {
363: struct ural_softc *sc = (struct ural_softc *)self;
364: struct ifnet *ifp = &sc->sc_ic.ic_if;
365: int s;
366:
367: s = splusb();
368:
369: ieee80211_ifdetach(ifp); /* free all nodes */
370: if_detach(ifp);
371:
372: usb_rem_task(sc->sc_udev, &sc->sc_task);
373: timeout_del(&sc->scan_to);
374: timeout_del(&sc->amrr_to);
375:
376: if (sc->amrr_xfer != NULL) {
377: usbd_free_xfer(sc->amrr_xfer);
378: sc->amrr_xfer = NULL;
379: }
380:
381: if (sc->sc_rx_pipeh != NULL) {
382: usbd_abort_pipe(sc->sc_rx_pipeh);
383: usbd_close_pipe(sc->sc_rx_pipeh);
384: }
385:
386: if (sc->sc_tx_pipeh != NULL) {
387: usbd_abort_pipe(sc->sc_tx_pipeh);
388: usbd_close_pipe(sc->sc_tx_pipeh);
389: }
390:
391: ural_free_rx_list(sc);
392: ural_free_tx_list(sc);
393:
394: splx(s);
395:
396: usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
397: &sc->sc_dev);
398:
399: return 0;
400: }
401:
402: int
403: ural_alloc_tx_list(struct ural_softc *sc)
404: {
405: int i, error;
406:
407: sc->tx_cur = sc->tx_queued = 0;
408:
409: for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
410: struct ural_tx_data *data = &sc->tx_data[i];
411:
412: data->sc = sc;
413:
414: data->xfer = usbd_alloc_xfer(sc->sc_udev);
415: if (data->xfer == NULL) {
416: printf("%s: could not allocate tx xfer\n",
417: sc->sc_dev.dv_xname);
418: error = ENOMEM;
419: goto fail;
420: }
421: data->buf = usbd_alloc_buffer(data->xfer,
422: RAL_TX_DESC_SIZE + IEEE80211_MAX_LEN);
423: if (data->buf == NULL) {
424: printf("%s: could not allocate tx buffer\n",
425: sc->sc_dev.dv_xname);
426: error = ENOMEM;
427: goto fail;
428: }
429: }
430:
431: return 0;
432:
433: fail: ural_free_tx_list(sc);
434: return error;
435: }
436:
437: void
438: ural_free_tx_list(struct ural_softc *sc)
439: {
440: int i;
441:
442: for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
443: struct ural_tx_data *data = &sc->tx_data[i];
444:
445: if (data->xfer != NULL) {
446: usbd_free_xfer(data->xfer);
447: data->xfer = NULL;
448: }
449: /*
450: * The node has already been freed at that point so don't call
451: * ieee80211_release_node() here.
452: */
453: data->ni = NULL;
454: }
455: }
456:
457: int
458: ural_alloc_rx_list(struct ural_softc *sc)
459: {
460: int i, error;
461:
462: for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
463: struct ural_rx_data *data = &sc->rx_data[i];
464:
465: data->sc = sc;
466:
467: data->xfer = usbd_alloc_xfer(sc->sc_udev);
468: if (data->xfer == NULL) {
469: printf("%s: could not allocate rx xfer\n",
470: sc->sc_dev.dv_xname);
471: error = ENOMEM;
472: goto fail;
473: }
474: if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) {
475: printf("%s: could not allocate rx buffer\n",
476: sc->sc_dev.dv_xname);
477: error = ENOMEM;
478: goto fail;
479: }
480:
481: MGETHDR(data->m, M_DONTWAIT, MT_DATA);
482: if (data->m == NULL) {
483: printf("%s: could not allocate rx mbuf\n",
484: sc->sc_dev.dv_xname);
485: error = ENOMEM;
486: goto fail;
487: }
488: MCLGET(data->m, M_DONTWAIT);
489: if (!(data->m->m_flags & M_EXT)) {
490: printf("%s: could not allocate rx mbuf cluster\n",
491: sc->sc_dev.dv_xname);
492: error = ENOMEM;
493: goto fail;
494: }
495: data->buf = mtod(data->m, uint8_t *);
496: }
497:
498: return 0;
499:
500: fail: ural_free_tx_list(sc);
501: return error;
502: }
503:
504: void
505: ural_free_rx_list(struct ural_softc *sc)
506: {
507: int i;
508:
509: for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
510: struct ural_rx_data *data = &sc->rx_data[i];
511:
512: if (data->xfer != NULL) {
513: usbd_free_xfer(data->xfer);
514: data->xfer = NULL;
515: }
516: if (data->m != NULL) {
517: m_freem(data->m);
518: data->m = NULL;
519: }
520: }
521: }
522:
523: int
524: ural_media_change(struct ifnet *ifp)
525: {
526: int error;
527:
528: error = ieee80211_media_change(ifp);
529: if (error != ENETRESET)
530: return error;
531:
532: if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
533: ural_init(ifp);
534:
535: return 0;
536: }
537:
538: /*
539: * This function is called periodically (every 200ms) during scanning to
540: * switch from one channel to another.
541: */
542: void
543: ural_next_scan(void *arg)
544: {
545: struct ural_softc *sc = arg;
546: struct ieee80211com *ic = &sc->sc_ic;
547: struct ifnet *ifp = &ic->ic_if;
548:
549: if (ic->ic_state == IEEE80211_S_SCAN)
550: ieee80211_next_scan(ifp);
551: }
552:
553: void
554: ural_task(void *arg)
555: {
556: struct ural_softc *sc = arg;
557: struct ieee80211com *ic = &sc->sc_ic;
558: enum ieee80211_state ostate;
559: struct ieee80211_node *ni;
560: struct mbuf *m;
561:
562: ostate = ic->ic_state;
563:
564: switch (sc->sc_state) {
565: case IEEE80211_S_INIT:
566: if (ostate == IEEE80211_S_RUN) {
567: /* abort TSF synchronization */
568: ural_write(sc, RAL_TXRX_CSR19, 0);
569:
570: /* force tx led to stop blinking */
571: ural_write(sc, RAL_MAC_CSR20, 0);
572: }
573: break;
574:
575: case IEEE80211_S_SCAN:
576: ural_set_chan(sc, ic->ic_bss->ni_chan);
577: timeout_add(&sc->scan_to, hz / 5);
578: break;
579:
580: case IEEE80211_S_AUTH:
581: ural_set_chan(sc, ic->ic_bss->ni_chan);
582: break;
583:
584: case IEEE80211_S_ASSOC:
585: ural_set_chan(sc, ic->ic_bss->ni_chan);
586: break;
587:
588: case IEEE80211_S_RUN:
589: ural_set_chan(sc, ic->ic_bss->ni_chan);
590:
591: ni = ic->ic_bss;
592:
593: if (ic->ic_opmode != IEEE80211_M_MONITOR) {
594: ural_update_slot(sc);
595: ural_set_txpreamble(sc);
596: ural_set_basicrates(sc);
597: ural_set_bssid(sc, ni->ni_bssid);
598: }
599:
600: if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
601: ic->ic_opmode == IEEE80211_M_IBSS) {
602: m = ieee80211_beacon_alloc(ic, ni);
603: if (m == NULL) {
604: printf("%s: could not allocate beacon\n",
605: sc->sc_dev.dv_xname);
606: return;
607: }
608:
609: if (ural_tx_bcn(sc, m, ni) != 0) {
610: m_freem(m);
611: printf("%s: could not transmit beacon\n",
612: sc->sc_dev.dv_xname);
613: return;
614: }
615:
616: /* beacon is no longer needed */
617: m_freem(m);
618: }
619:
620: /* make tx led blink on tx (controlled by ASIC) */
621: ural_write(sc, RAL_MAC_CSR20, 1);
622:
623: if (ic->ic_opmode != IEEE80211_M_MONITOR)
624: ural_enable_tsf_sync(sc);
625:
626: if (ic->ic_opmode == IEEE80211_M_STA) {
627: /* fake a join to init the tx rate */
628: ural_newassoc(ic, ic->ic_bss, 1);
629:
630: /* enable automatic rate control in STA mode */
631: if (ic->ic_fixed_rate == -1)
632: ural_amrr_start(sc, ic->ic_bss);
633: }
634:
635: break;
636: }
637:
638: sc->sc_newstate(ic, sc->sc_state, sc->sc_arg);
639: }
640:
641: int
642: ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
643: {
644: struct ural_softc *sc = ic->ic_if.if_softc;
645:
646: usb_rem_task(sc->sc_udev, &sc->sc_task);
647: timeout_del(&sc->scan_to);
648: timeout_del(&sc->amrr_to);
649:
650: /* do it in a process context */
651: sc->sc_state = nstate;
652: sc->sc_arg = arg;
653: usb_add_task(sc->sc_udev, &sc->sc_task);
654: return 0;
655: }
656:
657: /* quickly determine if a given rate is CCK or OFDM */
658: #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
659:
660: #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
661: #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
662:
663: #define RAL_SIFS 10 /* us */
664:
665: #define RAL_RXTX_TURNAROUND 5 /* us */
666:
667: void
668: ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
669: {
670: struct ural_tx_data *data = priv;
671: struct ural_softc *sc = data->sc;
672: struct ieee80211com *ic = &sc->sc_ic;
673: struct ifnet *ifp = &ic->ic_if;
674: int s;
675:
676: if (status != USBD_NORMAL_COMPLETION) {
677: if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
678: return;
679:
680: printf("%s: could not transmit buffer: %s\n",
681: sc->sc_dev.dv_xname, usbd_errstr(status));
682:
683: if (status == USBD_STALLED)
684: usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
685:
686: ifp->if_oerrors++;
687: return;
688: }
689:
690: s = splnet();
691:
692: ieee80211_release_node(ic, data->ni);
693: data->ni = NULL;
694:
695: sc->tx_queued--;
696: ifp->if_opackets++;
697:
698: DPRINTFN(10, ("tx done\n"));
699:
700: sc->sc_tx_timer = 0;
701: ifp->if_flags &= ~IFF_OACTIVE;
702: ural_start(ifp);
703:
704: splx(s);
705: }
706:
707: void
708: ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
709: {
710: struct ural_rx_data *data = priv;
711: struct ural_softc *sc = data->sc;
712: struct ieee80211com *ic = &sc->sc_ic;
713: struct ifnet *ifp = &ic->ic_if;
714: const struct ural_rx_desc *desc;
715: struct ieee80211_frame *wh;
716: struct ieee80211_node *ni;
717: struct mbuf *mnew, *m;
718: int s, len;
719:
720: if (status != USBD_NORMAL_COMPLETION) {
721: if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
722: return;
723:
724: if (status == USBD_STALLED)
725: usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
726: goto skip;
727: }
728:
729: usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
730:
731: if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
732: DPRINTF(("%s: xfer too short %d\n", sc->sc_dev.dv_xname,
733: len));
734: ifp->if_ierrors++;
735: goto skip;
736: }
737:
738: /* rx descriptor is located at the end */
739: desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE);
740:
741: if (letoh32(desc->flags) & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
742: /*
743: * This should not happen since we did not request to receive
744: * those frames when we filled RAL_TXRX_CSR2.
745: */
746: DPRINTFN(5, ("PHY or CRC error\n"));
747: ifp->if_ierrors++;
748: goto skip;
749: }
750:
751: MGETHDR(mnew, M_DONTWAIT, MT_DATA);
752: if (mnew == NULL) {
753: printf("%s: could not allocate rx mbuf\n",
754: sc->sc_dev.dv_xname);
755: ifp->if_ierrors++;
756: goto skip;
757: }
758: MCLGET(mnew, M_DONTWAIT);
759: if (!(mnew->m_flags & M_EXT)) {
760: printf("%s: could not allocate rx mbuf cluster\n",
761: sc->sc_dev.dv_xname);
762: m_freem(mnew);
763: ifp->if_ierrors++;
764: goto skip;
765: }
766: m = data->m;
767: data->m = mnew;
768: data->buf = mtod(data->m, uint8_t *);
769:
770: /* finalize mbuf */
771: m->m_pkthdr.rcvif = ifp;
772: m->m_pkthdr.len = m->m_len = (letoh32(desc->flags) >> 16) & 0xfff;
773: m_adj(m, -IEEE80211_CRC_LEN); /* trim FCS */
774:
775: s = splnet();
776:
777: #if NBPFILTER > 0
778: if (sc->sc_drvbpf != NULL) {
779: struct mbuf mb;
780: struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
781:
782: tap->wr_flags = 0;
783: tap->wr_rate = ural_rxrate(desc);
784: tap->wr_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
785: tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
786: tap->wr_antenna = sc->rx_ant;
787: tap->wr_antsignal = desc->rssi;
788:
789: mb.m_data = (caddr_t)tap;
790: mb.m_len = sc->sc_rxtap_len;
791: mb.m_next = m;
792: mb.m_nextpkt = NULL;
793: mb.m_type = 0;
794: mb.m_flags = 0;
795: bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
796: }
797: #endif
798:
799: wh = mtod(m, struct ieee80211_frame *);
800: ni = ieee80211_find_rxnode(ic, wh);
801:
802: /* send the frame to the 802.11 layer */
803: ieee80211_input(ifp, m, ni, desc->rssi, 0);
804:
805: /* node is no longer needed */
806: ieee80211_release_node(ic, ni);
807:
808: /*
809: * In HostAP mode, ieee80211_input() will enqueue packets in if_snd
810: * without calling if_start().
811: */
812: if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE))
813: ural_start(ifp);
814:
815: splx(s);
816:
817: DPRINTFN(15, ("rx done\n"));
818:
819: skip: /* setup a new transfer */
820: usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
821: USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
822: (void)usbd_transfer(xfer);
823: }
824:
825: /*
826: * This function is only used by the Rx radiotap code. It returns the rate at
827: * which a given frame was received.
828: */
829: #if NBPFILTER > 0
830: uint8_t
831: ural_rxrate(const struct ural_rx_desc *desc)
832: {
833: if (letoh32(desc->flags) & RAL_RX_OFDM) {
834: /* reverse function of ural_plcp_signal */
835: switch (desc->rate) {
836: case 0xb: return 12;
837: case 0xf: return 18;
838: case 0xa: return 24;
839: case 0xe: return 36;
840: case 0x9: return 48;
841: case 0xd: return 72;
842: case 0x8: return 96;
843: case 0xc: return 108;
844: }
845: } else {
846: if (desc->rate == 10)
847: return 2;
848: if (desc->rate == 20)
849: return 4;
850: if (desc->rate == 55)
851: return 11;
852: if (desc->rate == 110)
853: return 22;
854: }
855: return 2; /* should not get there */
856: }
857: #endif
858:
859: /*
860: * Return the expected ack rate for a frame transmitted at rate `rate'.
861: */
862: int
863: ural_ack_rate(struct ieee80211com *ic, int rate)
864: {
865: switch (rate) {
866: /* CCK rates */
867: case 2:
868: return 2;
869: case 4:
870: case 11:
871: case 22:
872: return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
873:
874: /* OFDM rates */
875: case 12:
876: case 18:
877: return 12;
878: case 24:
879: case 36:
880: return 24;
881: case 48:
882: case 72:
883: case 96:
884: case 108:
885: return 48;
886: }
887:
888: /* default to 1Mbps */
889: return 2;
890: }
891:
892: /*
893: * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
894: * The function automatically determines the operating mode depending on the
895: * given rate. `flags' indicates whether short preamble is in use or not.
896: */
897: uint16_t
898: ural_txtime(int len, int rate, uint32_t flags)
899: {
900: uint16_t txtime;
901:
902: if (RAL_RATE_IS_OFDM(rate)) {
903: /* IEEE Std 802.11g-2003, pp. 44 */
904: txtime = (8 + 4 * len + 3 + rate - 1) / rate;
905: txtime = 16 + 4 + 4 * txtime + 6;
906: } else {
907: /* IEEE Std 802.11b-1999, pp. 28 */
908: txtime = (16 * len + rate - 1) / rate;
909: if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
910: txtime += 72 + 24;
911: else
912: txtime += 144 + 48;
913: }
914: return txtime;
915: }
916:
917: uint8_t
918: ural_plcp_signal(int rate)
919: {
920: switch (rate) {
921: /* CCK rates (returned values are device-dependent) */
922: case 2: return 0x0;
923: case 4: return 0x1;
924: case 11: return 0x2;
925: case 22: return 0x3;
926:
927: /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
928: case 12: return 0xb;
929: case 18: return 0xf;
930: case 24: return 0xa;
931: case 36: return 0xe;
932: case 48: return 0x9;
933: case 72: return 0xd;
934: case 96: return 0x8;
935: case 108: return 0xc;
936:
937: /* unsupported rates (should not get there) */
938: default: return 0xff;
939: }
940: }
941:
942: void
943: ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
944: uint32_t flags, int len, int rate)
945: {
946: struct ieee80211com *ic = &sc->sc_ic;
947: uint16_t plcp_length;
948: int remainder;
949:
950: desc->flags = htole32(flags);
951: desc->flags |= htole32(len << 16);
952:
953: desc->wme = htole16(
954: RAL_AIFSN(2) |
955: RAL_LOGCWMIN(3) |
956: RAL_LOGCWMAX(5));
957:
958: /* setup PLCP fields */
959: desc->plcp_signal = ural_plcp_signal(rate);
960: desc->plcp_service = 4;
961:
962: len += IEEE80211_CRC_LEN;
963: if (RAL_RATE_IS_OFDM(rate)) {
964: desc->flags |= htole32(RAL_TX_OFDM);
965:
966: plcp_length = len & 0xfff;
967: desc->plcp_length_hi = plcp_length >> 6;
968: desc->plcp_length_lo = plcp_length & 0x3f;
969: } else {
970: plcp_length = (16 * len + rate - 1) / rate;
971: if (rate == 22) {
972: remainder = (16 * len) % 22;
973: if (remainder != 0 && remainder < 7)
974: desc->plcp_service |= RAL_PLCP_LENGEXT;
975: }
976: desc->plcp_length_hi = plcp_length >> 8;
977: desc->plcp_length_lo = plcp_length & 0xff;
978:
979: if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
980: desc->plcp_signal |= 0x08;
981: }
982:
983: desc->iv = 0;
984: desc->eiv = 0;
985: }
986:
987: #define RAL_TX_TIMEOUT 5000
988:
989: int
990: ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
991: {
992: struct ural_tx_desc *desc;
993: usbd_xfer_handle xfer;
994: usbd_status error;
995: uint8_t cmd = 0;
996: uint8_t *buf;
997: int xferlen, rate = 2;
998:
999: xfer = usbd_alloc_xfer(sc->sc_udev);
1000: if (xfer == NULL)
1001: return ENOMEM;
1002:
1003: /* xfer length needs to be a multiple of two! */
1004: xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1005:
1006: buf = usbd_alloc_buffer(xfer, xferlen);
1007: if (buf == NULL) {
1008: usbd_free_xfer(xfer);
1009: return ENOMEM;
1010: }
1011:
1012: usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
1013: USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL);
1014:
1015: error = usbd_sync_transfer(xfer);
1016: if (error != 0) {
1017: usbd_free_xfer(xfer);
1018: return error;
1019: }
1020:
1021: desc = (struct ural_tx_desc *)buf;
1022:
1023: m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE);
1024: ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
1025: m0->m_pkthdr.len, rate);
1026:
1027: DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n",
1028: m0->m_pkthdr.len, rate, xferlen));
1029:
1030: usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
1031: USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL);
1032:
1033: error = usbd_sync_transfer(xfer);
1034: usbd_free_xfer(xfer);
1035:
1036: return error;
1037: }
1038:
1039: int
1040: ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1041: {
1042: struct ieee80211com *ic = &sc->sc_ic;
1043: struct ifnet *ifp = &ic->ic_if;
1044: struct ural_tx_desc *desc;
1045: struct ural_tx_data *data;
1046: struct ieee80211_frame *wh;
1047: uint32_t flags = RAL_TX_NEWSEQ;
1048: uint16_t dur;
1049: usbd_status error;
1050: int rate, xferlen, pktlen, needrts = 0, needcts = 0;
1051:
1052: wh = mtod(m0, struct ieee80211_frame *);
1053:
1054: if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1055: m0 = ieee80211_wep_crypt(ifp, m0, 1);
1056: if (m0 == NULL)
1057: return ENOBUFS;
1058:
1059: /* packet header may have moved, reset our local pointer */
1060: wh = mtod(m0, struct ieee80211_frame *);
1061: }
1062:
1063: /* compute actual packet length (including CRC and crypto overhead) */
1064: pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN;
1065:
1066: /* pickup a rate */
1067: if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
1068: ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1069: IEEE80211_FC0_TYPE_MGT)) {
1070: /* mgmt/multicast frames are sent at the lowest avail. rate */
1071: rate = ni->ni_rates.rs_rates[0];
1072: } else if (ic->ic_fixed_rate != -1) {
1073: rate = ic->ic_sup_rates[ic->ic_curmode].
1074: rs_rates[ic->ic_fixed_rate];
1075: } else
1076: rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1077: if (rate == 0)
1078: rate = 2; /* XXX should not happen */
1079: rate &= IEEE80211_RATE_VAL;
1080:
1081: /* check if RTS/CTS or CTS-to-self protection must be used */
1082: if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1083: /* multicast frames are not sent at OFDM rates in 802.11b/g */
1084: if (pktlen > ic->ic_rtsthreshold) {
1085: needrts = 1; /* RTS/CTS based on frame length */
1086: } else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1087: RAL_RATE_IS_OFDM(rate)) {
1088: if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
1089: needcts = 1; /* CTS-to-self */
1090: else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
1091: needrts = 1; /* RTS/CTS */
1092: }
1093: }
1094: if (needrts || needcts) {
1095: struct mbuf *mprot;
1096: int protrate, ackrate;
1097: uint16_t dur;
1098:
1099: protrate = 2;
1100: ackrate = ural_ack_rate(ic, rate);
1101:
1102: dur = ural_txtime(pktlen, rate, ic->ic_flags) +
1103: ural_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1104: 2 * RAL_SIFS;
1105: if (needrts) {
1106: dur += ural_txtime(RAL_CTS_SIZE, ural_ack_rate(ic,
1107: protrate), ic->ic_flags) + RAL_SIFS;
1108: mprot = ieee80211_get_rts(ic, wh, dur);
1109: } else {
1110: mprot = ieee80211_get_cts_to_self(ic, dur);
1111: }
1112: if (mprot == NULL) {
1113: printf("%s: could not allocate protection frame\n",
1114: sc->sc_dev.dv_xname);
1115: m_freem(m0);
1116: return ENOBUFS;
1117: }
1118:
1119: data = &sc->tx_data[sc->tx_cur];
1120: desc = (struct ural_tx_desc *)data->buf;
1121:
1122: /* avoid multiple free() of the same node for each fragment */
1123: data->ni = ieee80211_ref_node(ni);
1124:
1125: m_copydata(mprot, 0, mprot->m_pkthdr.len,
1126: data->buf + RAL_TX_DESC_SIZE);
1127: ural_setup_tx_desc(sc, desc,
1128: (needrts ? RAL_TX_NEED_ACK : 0) | RAL_TX_RETRY(7),
1129: mprot->m_pkthdr.len, protrate);
1130:
1131: /* no roundup necessary here */
1132: xferlen = RAL_TX_DESC_SIZE + mprot->m_pkthdr.len;
1133:
1134: /* XXX may want to pass the protection frame to BPF */
1135:
1136: /* mbuf is no longer needed */
1137: m_freem(mprot);
1138:
1139: usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
1140: xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY,
1141: RAL_TX_TIMEOUT, ural_txeof);
1142: error = usbd_transfer(data->xfer);
1143: if (error != 0 && error != USBD_IN_PROGRESS) {
1144: m_freem(m0);
1145: return error;
1146: }
1147:
1148: sc->tx_queued++;
1149: sc->tx_cur = (sc->tx_cur + 1) % RAL_TX_LIST_COUNT;
1150:
1151: flags |= RAL_TX_IFS_SIFS;
1152: }
1153:
1154: data = &sc->tx_data[sc->tx_cur];
1155: desc = (struct ural_tx_desc *)data->buf;
1156:
1157: data->ni = ni;
1158:
1159: if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1160: flags |= RAL_TX_NEED_ACK;
1161: flags |= RAL_TX_RETRY(7);
1162:
1163: dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate),
1164: ic->ic_flags) + RAL_SIFS;
1165: *(uint16_t *)wh->i_dur = htole16(dur);
1166:
1167: /* tell hardware to set timestamp in probe responses */
1168: if ((wh->i_fc[0] &
1169: (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1170: (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1171: flags |= RAL_TX_TIMESTAMP;
1172: }
1173:
1174: #if NBPFILTER > 0
1175: if (sc->sc_drvbpf != NULL) {
1176: struct mbuf mb;
1177: struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
1178:
1179: tap->wt_flags = 0;
1180: tap->wt_rate = rate;
1181: tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
1182: tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
1183: tap->wt_antenna = sc->tx_ant;
1184:
1185: mb.m_data = (caddr_t)tap;
1186: mb.m_len = sc->sc_txtap_len;
1187: mb.m_next = m0;
1188: mb.m_nextpkt = NULL;
1189: mb.m_type = 0;
1190: mb.m_flags = 0;
1191: bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
1192: }
1193: #endif
1194:
1195: m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE);
1196: ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
1197:
1198: /* align end on a 2-bytes boundary */
1199: xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1;
1200:
1201: /*
1202: * No space left in the last URB to store the extra 2 bytes, force
1203: * sending of another URB.
1204: */
1205: if ((xferlen % 64) == 0)
1206: xferlen += 2;
1207:
1208: DPRINTFN(10, ("sending frame len=%u rate=%u xfer len=%u\n",
1209: m0->m_pkthdr.len, rate, xferlen));
1210:
1211: /* mbuf is no longer needed */
1212: m_freem(m0);
1213:
1214: usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen,
1215: USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, ural_txeof);
1216: error = usbd_transfer(data->xfer);
1217: if (error != 0 && error != USBD_IN_PROGRESS)
1218: return error;
1219:
1220: sc->tx_queued++;
1221: sc->tx_cur = (sc->tx_cur + 1) % RAL_TX_LIST_COUNT;
1222:
1223: return 0;
1224: }
1225:
1226: void
1227: ural_start(struct ifnet *ifp)
1228: {
1229: struct ural_softc *sc = ifp->if_softc;
1230: struct ieee80211com *ic = &sc->sc_ic;
1231: struct ieee80211_node *ni;
1232: struct mbuf *m0;
1233:
1234: /*
1235: * net80211 may still try to send management frames even if the
1236: * IFF_RUNNING flag is not set...
1237: */
1238: if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1239: return;
1240:
1241: for (;;) {
1242: IF_POLL(&ic->ic_mgtq, m0);
1243: if (m0 != NULL) {
1244: if (sc->tx_queued >= RAL_TX_LIST_COUNT - 1) {
1245: ifp->if_flags |= IFF_OACTIVE;
1246: break;
1247: }
1248: IF_DEQUEUE(&ic->ic_mgtq, m0);
1249:
1250: ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1251: m0->m_pkthdr.rcvif = NULL;
1252: #if NBPFILTER > 0
1253: if (ic->ic_rawbpf != NULL)
1254: bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1255: #endif
1256: if (ural_tx_data(sc, m0, ni) != 0)
1257: break;
1258:
1259: } else {
1260: if (ic->ic_state != IEEE80211_S_RUN)
1261: break;
1262: IFQ_POLL(&ifp->if_snd, m0);
1263: if (m0 == NULL)
1264: break;
1265: if (sc->tx_queued >= RAL_TX_LIST_COUNT - 1) {
1266: ifp->if_flags |= IFF_OACTIVE;
1267: break;
1268: }
1269: IFQ_DEQUEUE(&ifp->if_snd, m0);
1270: #if NBPFILTER > 0
1271: if (ifp->if_bpf != NULL)
1272: bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT);
1273: #endif
1274: m0 = ieee80211_encap(ifp, m0, &ni);
1275: if (m0 == NULL)
1276: continue;
1277: #if NBPFILTER > 0
1278: if (ic->ic_rawbpf != NULL)
1279: bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT);
1280: #endif
1281: if (ural_tx_data(sc, m0, ni) != 0) {
1282: if (ni != NULL)
1283: ieee80211_release_node(ic, ni);
1284: ifp->if_oerrors++;
1285: break;
1286: }
1287: }
1288:
1289: sc->sc_tx_timer = 5;
1290: ifp->if_timer = 1;
1291: }
1292: }
1293:
1294: void
1295: ural_watchdog(struct ifnet *ifp)
1296: {
1297: struct ural_softc *sc = ifp->if_softc;
1298:
1299: ifp->if_timer = 0;
1300:
1301: if (sc->sc_tx_timer > 0) {
1302: if (--sc->sc_tx_timer == 0) {
1303: printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1304: /*ural_init(ifp); XXX needs a process context! */
1305: ifp->if_oerrors++;
1306: return;
1307: }
1308: ifp->if_timer = 1;
1309: }
1310:
1311: ieee80211_watchdog(ifp);
1312: }
1313:
1314: int
1315: ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1316: {
1317: struct ural_softc *sc = ifp->if_softc;
1318: struct ieee80211com *ic = &sc->sc_ic;
1319: struct ifaddr *ifa;
1320: struct ifreq *ifr;
1321: int s, error = 0;
1322:
1323: s = splnet();
1324:
1325: switch (cmd) {
1326: case SIOCSIFADDR:
1327: ifa = (struct ifaddr *)data;
1328: ifp->if_flags |= IFF_UP;
1329: #ifdef INET
1330: if (ifa->ifa_addr->sa_family == AF_INET)
1331: arp_ifinit(&ic->ic_ac, ifa);
1332: #endif
1333: /* FALLTHROUGH */
1334: case SIOCSIFFLAGS:
1335: if (ifp->if_flags & IFF_UP) {
1336: if (ifp->if_flags & IFF_RUNNING)
1337: ural_update_promisc(sc);
1338: else
1339: ural_init(ifp);
1340: } else {
1341: if (ifp->if_flags & IFF_RUNNING)
1342: ural_stop(ifp, 1);
1343: }
1344: break;
1345:
1346: case SIOCADDMULTI:
1347: case SIOCDELMULTI:
1348: ifr = (struct ifreq *)data;
1349: error = (cmd == SIOCADDMULTI) ?
1350: ether_addmulti(ifr, &ic->ic_ac) :
1351: ether_delmulti(ifr, &ic->ic_ac);
1352:
1353: if (error == ENETRESET)
1354: error = 0;
1355: break;
1356:
1357: case SIOCS80211CHANNEL:
1358: /*
1359: * This allows for fast channel switching in monitor mode
1360: * (used by kismet). In IBSS mode, we must explicitly reset
1361: * the interface to generate a new beacon frame.
1362: */
1363: error = ieee80211_ioctl(ifp, cmd, data);
1364: if (error == ENETRESET &&
1365: ic->ic_opmode == IEEE80211_M_MONITOR) {
1366: if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1367: (IFF_UP | IFF_RUNNING))
1368: ural_set_chan(sc, ic->ic_ibss_chan);
1369: error = 0;
1370: }
1371: break;
1372:
1373: default:
1374: error = ieee80211_ioctl(ifp, cmd, data);
1375: }
1376:
1377: if (error == ENETRESET) {
1378: if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1379: (IFF_UP | IFF_RUNNING))
1380: ural_init(ifp);
1381: error = 0;
1382: }
1383:
1384: splx(s);
1385:
1386: return error;
1387: }
1388:
1389: void
1390: ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1391: {
1392: usb_device_request_t req;
1393: usbd_status error;
1394:
1395: req.bmRequestType = UT_READ_VENDOR_DEVICE;
1396: req.bRequest = RAL_READ_EEPROM;
1397: USETW(req.wValue, 0);
1398: USETW(req.wIndex, addr);
1399: USETW(req.wLength, len);
1400:
1401: error = usbd_do_request(sc->sc_udev, &req, buf);
1402: if (error != 0) {
1403: printf("%s: could not read EEPROM: %s\n",
1404: sc->sc_dev.dv_xname, usbd_errstr(error));
1405: }
1406: }
1407:
1408: uint16_t
1409: ural_read(struct ural_softc *sc, uint16_t reg)
1410: {
1411: usb_device_request_t req;
1412: usbd_status error;
1413: uint16_t val;
1414:
1415: req.bmRequestType = UT_READ_VENDOR_DEVICE;
1416: req.bRequest = RAL_READ_MAC;
1417: USETW(req.wValue, 0);
1418: USETW(req.wIndex, reg);
1419: USETW(req.wLength, sizeof (uint16_t));
1420:
1421: error = usbd_do_request(sc->sc_udev, &req, &val);
1422: if (error != 0) {
1423: printf("%s: could not read MAC register: %s\n",
1424: sc->sc_dev.dv_xname, usbd_errstr(error));
1425: return 0;
1426: }
1427: return letoh16(val);
1428: }
1429:
1430: void
1431: ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1432: {
1433: usb_device_request_t req;
1434: usbd_status error;
1435:
1436: req.bmRequestType = UT_READ_VENDOR_DEVICE;
1437: req.bRequest = RAL_READ_MULTI_MAC;
1438: USETW(req.wValue, 0);
1439: USETW(req.wIndex, reg);
1440: USETW(req.wLength, len);
1441:
1442: error = usbd_do_request(sc->sc_udev, &req, buf);
1443: if (error != 0) {
1444: printf("%s: could not read MAC register: %s\n",
1445: sc->sc_dev.dv_xname, usbd_errstr(error));
1446: }
1447: }
1448:
1449: void
1450: ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1451: {
1452: usb_device_request_t req;
1453: usbd_status error;
1454:
1455: req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1456: req.bRequest = RAL_WRITE_MAC;
1457: USETW(req.wValue, val);
1458: USETW(req.wIndex, reg);
1459: USETW(req.wLength, 0);
1460:
1461: error = usbd_do_request(sc->sc_udev, &req, NULL);
1462: if (error != 0) {
1463: printf("%s: could not write MAC register: %s\n",
1464: sc->sc_dev.dv_xname, usbd_errstr(error));
1465: }
1466: }
1467:
1468: void
1469: ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1470: {
1471: usb_device_request_t req;
1472: usbd_status error;
1473:
1474: req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1475: req.bRequest = RAL_WRITE_MULTI_MAC;
1476: USETW(req.wValue, 0);
1477: USETW(req.wIndex, reg);
1478: USETW(req.wLength, len);
1479:
1480: error = usbd_do_request(sc->sc_udev, &req, buf);
1481: if (error != 0) {
1482: printf("%s: could not write MAC register: %s\n",
1483: sc->sc_dev.dv_xname, usbd_errstr(error));
1484: }
1485: }
1486:
1487: void
1488: ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1489: {
1490: uint16_t tmp;
1491: int ntries;
1492:
1493: for (ntries = 0; ntries < 5; ntries++) {
1494: if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1495: break;
1496: }
1497: if (ntries == 5) {
1498: printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
1499: return;
1500: }
1501:
1502: tmp = reg << 8 | val;
1503: ural_write(sc, RAL_PHY_CSR7, tmp);
1504: }
1505:
1506: uint8_t
1507: ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1508: {
1509: uint16_t val;
1510: int ntries;
1511:
1512: val = RAL_BBP_WRITE | reg << 8;
1513: ural_write(sc, RAL_PHY_CSR7, val);
1514:
1515: for (ntries = 0; ntries < 5; ntries++) {
1516: if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1517: break;
1518: }
1519: if (ntries == 5) {
1520: printf("%s: could not read BBP\n", sc->sc_dev.dv_xname);
1521: return 0;
1522: }
1523: return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1524: }
1525:
1526: void
1527: ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1528: {
1529: uint32_t tmp;
1530: int ntries;
1531:
1532: for (ntries = 0; ntries < 5; ntries++) {
1533: if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1534: break;
1535: }
1536: if (ntries == 5) {
1537: printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
1538: return;
1539: }
1540:
1541: tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1542: ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1543: ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1544:
1545: /* remember last written value in sc */
1546: sc->rf_regs[reg] = val;
1547:
1548: DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
1549: }
1550:
1551: void
1552: ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1553: {
1554: struct ieee80211com *ic = &sc->sc_ic;
1555: uint8_t power, tmp;
1556: u_int chan;
1557:
1558: chan = ieee80211_chan2ieee(ic, c);
1559: if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1560: return;
1561:
1562: power = min(sc->txpow[chan - 1], 31);
1563:
1564: DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
1565:
1566: switch (sc->rf_rev) {
1567: case RAL_RF_2522:
1568: ural_rf_write(sc, RAL_RF1, 0x00814);
1569: ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1570: ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1571: break;
1572:
1573: case RAL_RF_2523:
1574: ural_rf_write(sc, RAL_RF1, 0x08804);
1575: ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1576: ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1577: ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1578: break;
1579:
1580: case RAL_RF_2524:
1581: ural_rf_write(sc, RAL_RF1, 0x0c808);
1582: ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1583: ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1584: ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1585: break;
1586:
1587: case RAL_RF_2525:
1588: ural_rf_write(sc, RAL_RF1, 0x08808);
1589: ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1590: ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1591: ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1592:
1593: ural_rf_write(sc, RAL_RF1, 0x08808);
1594: ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1595: ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1596: ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1597: break;
1598:
1599: case RAL_RF_2525E:
1600: ural_rf_write(sc, RAL_RF1, 0x08808);
1601: ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1602: ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1603: ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1604: break;
1605:
1606: case RAL_RF_2526:
1607: ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1608: ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1609: ural_rf_write(sc, RAL_RF1, 0x08804);
1610:
1611: ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1612: ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1613: ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1614: break;
1615: }
1616:
1617: if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1618: ic->ic_state != IEEE80211_S_SCAN) {
1619: /* set Japan filter bit for channel 14 */
1620: tmp = ural_bbp_read(sc, 70);
1621:
1622: tmp &= ~RAL_JAPAN_FILTER;
1623: if (chan == 14)
1624: tmp |= RAL_JAPAN_FILTER;
1625:
1626: ural_bbp_write(sc, 70, tmp);
1627:
1628: /* clear CRC errors */
1629: ural_read(sc, RAL_STA_CSR0);
1630:
1631: DELAY(1000); /* RF needs a 1ms delay here */
1632: ural_disable_rf_tune(sc);
1633: }
1634: }
1635:
1636: /*
1637: * Disable RF auto-tuning.
1638: */
1639: void
1640: ural_disable_rf_tune(struct ural_softc *sc)
1641: {
1642: uint32_t tmp;
1643:
1644: if (sc->rf_rev != RAL_RF_2523) {
1645: tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1646: ural_rf_write(sc, RAL_RF1, tmp);
1647: }
1648:
1649: tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1650: ural_rf_write(sc, RAL_RF3, tmp);
1651:
1652: DPRINTFN(2, ("disabling RF autotune\n"));
1653: }
1654:
1655: /*
1656: * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1657: * synchronization.
1658: */
1659: void
1660: ural_enable_tsf_sync(struct ural_softc *sc)
1661: {
1662: struct ieee80211com *ic = &sc->sc_ic;
1663: uint16_t logcwmin, preload, tmp;
1664:
1665: /* first, disable TSF synchronization */
1666: ural_write(sc, RAL_TXRX_CSR19, 0);
1667:
1668: tmp = (16 * ic->ic_bss->ni_intval) << 4;
1669: ural_write(sc, RAL_TXRX_CSR18, tmp);
1670:
1671: logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1672: preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1673: tmp = logcwmin << 12 | preload;
1674: ural_write(sc, RAL_TXRX_CSR20, tmp);
1675:
1676: /* finally, enable TSF synchronization */
1677: tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1678: if (ic->ic_opmode == IEEE80211_M_STA)
1679: tmp |= RAL_ENABLE_TSF_SYNC(1);
1680: else
1681: tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1682: ural_write(sc, RAL_TXRX_CSR19, tmp);
1683:
1684: DPRINTF(("enabling TSF synchronization\n"));
1685: }
1686:
1687: void
1688: ural_update_slot(struct ural_softc *sc)
1689: {
1690: struct ieee80211com *ic = &sc->sc_ic;
1691: uint16_t slottime, sifs, eifs;
1692:
1693: slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1694:
1695: /*
1696: * These settings may sound a bit inconsistent but this is what the
1697: * reference driver does.
1698: */
1699: if (ic->ic_curmode == IEEE80211_MODE_11B) {
1700: sifs = 16 - RAL_RXTX_TURNAROUND;
1701: eifs = 364;
1702: } else {
1703: sifs = 10 - RAL_RXTX_TURNAROUND;
1704: eifs = 64;
1705: }
1706:
1707: ural_write(sc, RAL_MAC_CSR10, slottime);
1708: ural_write(sc, RAL_MAC_CSR11, sifs);
1709: ural_write(sc, RAL_MAC_CSR12, eifs);
1710: }
1711:
1712: void
1713: ural_set_txpreamble(struct ural_softc *sc)
1714: {
1715: uint16_t tmp;
1716:
1717: tmp = ural_read(sc, RAL_TXRX_CSR10);
1718:
1719: tmp &= ~RAL_SHORT_PREAMBLE;
1720: if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
1721: tmp |= RAL_SHORT_PREAMBLE;
1722:
1723: ural_write(sc, RAL_TXRX_CSR10, tmp);
1724: }
1725:
1726: void
1727: ural_set_basicrates(struct ural_softc *sc)
1728: {
1729: struct ieee80211com *ic = &sc->sc_ic;
1730:
1731: /* update basic rate set */
1732: if (ic->ic_curmode == IEEE80211_MODE_11B) {
1733: /* 11b basic rates: 1, 2Mbps */
1734: ural_write(sc, RAL_TXRX_CSR11, 0x3);
1735: } else {
1736: /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */
1737: ural_write(sc, RAL_TXRX_CSR11, 0xf);
1738: }
1739: }
1740:
1741: void
1742: ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1743: {
1744: uint16_t tmp;
1745:
1746: tmp = bssid[0] | bssid[1] << 8;
1747: ural_write(sc, RAL_MAC_CSR5, tmp);
1748:
1749: tmp = bssid[2] | bssid[3] << 8;
1750: ural_write(sc, RAL_MAC_CSR6, tmp);
1751:
1752: tmp = bssid[4] | bssid[5] << 8;
1753: ural_write(sc, RAL_MAC_CSR7, tmp);
1754:
1755: DPRINTF(("setting BSSID to %s\n", ether_sprintf((uint8_t *)bssid)));
1756: }
1757:
1758: void
1759: ural_set_macaddr(struct ural_softc *sc, const uint8_t *addr)
1760: {
1761: uint16_t tmp;
1762:
1763: tmp = addr[0] | addr[1] << 8;
1764: ural_write(sc, RAL_MAC_CSR2, tmp);
1765:
1766: tmp = addr[2] | addr[3] << 8;
1767: ural_write(sc, RAL_MAC_CSR3, tmp);
1768:
1769: tmp = addr[4] | addr[5] << 8;
1770: ural_write(sc, RAL_MAC_CSR4, tmp);
1771:
1772: DPRINTF(("setting MAC address to %s\n",
1773: ether_sprintf((uint8_t *)addr)));
1774: }
1775:
1776: void
1777: ural_update_promisc(struct ural_softc *sc)
1778: {
1779: struct ifnet *ifp = &sc->sc_ic.ic_if;
1780: uint16_t tmp;
1781:
1782: tmp = ural_read(sc, RAL_TXRX_CSR2);
1783:
1784: tmp &= ~RAL_DROP_NOT_TO_ME;
1785: if (!(ifp->if_flags & IFF_PROMISC))
1786: tmp |= RAL_DROP_NOT_TO_ME;
1787:
1788: ural_write(sc, RAL_TXRX_CSR2, tmp);
1789:
1790: DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1791: "entering" : "leaving"));
1792: }
1793:
1794: const char *
1795: ural_get_rf(int rev)
1796: {
1797: switch (rev) {
1798: case RAL_RF_2522: return "RT2522";
1799: case RAL_RF_2523: return "RT2523";
1800: case RAL_RF_2524: return "RT2524";
1801: case RAL_RF_2525: return "RT2525";
1802: case RAL_RF_2525E: return "RT2525e";
1803: case RAL_RF_2526: return "RT2526";
1804: case RAL_RF_5222: return "RT5222";
1805: default: return "unknown";
1806: }
1807: }
1808:
1809: void
1810: ural_read_eeprom(struct ural_softc *sc)
1811: {
1812: struct ieee80211com *ic = &sc->sc_ic;
1813: uint16_t val;
1814:
1815: /* retrieve MAC/BBP type */
1816: ural_eeprom_read(sc, RAL_EEPROM_MACBBP, &val, 2);
1817: sc->macbbp_rev = letoh16(val);
1818:
1819: ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1820: val = letoh16(val);
1821: sc->rf_rev = (val >> 11) & 0x7;
1822: sc->hw_radio = (val >> 10) & 0x1;
1823: sc->led_mode = (val >> 6) & 0x7;
1824: sc->rx_ant = (val >> 4) & 0x3;
1825: sc->tx_ant = (val >> 2) & 0x3;
1826: sc->nb_ant = val & 0x3;
1827:
1828: /* read MAC address */
1829: ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
1830:
1831: /* read default values for BBP registers */
1832: ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1833:
1834: /* read Tx power for all b/g channels */
1835: ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1836: }
1837:
1838: int
1839: ural_bbp_init(struct ural_softc *sc)
1840: {
1841: #define N(a) (sizeof (a) / sizeof ((a)[0]))
1842: int i, ntries;
1843:
1844: /* wait for BBP to be ready */
1845: for (ntries = 0; ntries < 100; ntries++) {
1846: if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1847: break;
1848: DELAY(1000);
1849: }
1850: if (ntries == 100) {
1851: printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
1852: return EIO;
1853: }
1854:
1855: /* initialize BBP registers to default values */
1856: for (i = 0; i < N(ural_def_bbp); i++)
1857: ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1858:
1859: #if 0
1860: /* initialize BBP registers to values stored in EEPROM */
1861: for (i = 0; i < 16; i++) {
1862: if (sc->bbp_prom[i].reg == 0xff)
1863: continue;
1864: ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1865: }
1866: #endif
1867:
1868: return 0;
1869: #undef N
1870: }
1871:
1872: void
1873: ural_set_txantenna(struct ural_softc *sc, int antenna)
1874: {
1875: uint16_t tmp;
1876: uint8_t tx;
1877:
1878: tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
1879: if (antenna == 1)
1880: tx |= RAL_BBP_ANTA;
1881: else if (antenna == 2)
1882: tx |= RAL_BBP_ANTB;
1883: else
1884: tx |= RAL_BBP_DIVERSITY;
1885:
1886: /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
1887: if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
1888: sc->rf_rev == RAL_RF_5222)
1889: tx |= RAL_BBP_FLIPIQ;
1890:
1891: ural_bbp_write(sc, RAL_BBP_TX, tx);
1892:
1893: /* update flags in PHY_CSR5 and PHY_CSR6 too */
1894: tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
1895: ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
1896:
1897: tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
1898: ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
1899: }
1900:
1901: void
1902: ural_set_rxantenna(struct ural_softc *sc, int antenna)
1903: {
1904: uint8_t rx;
1905:
1906: rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
1907: if (antenna == 1)
1908: rx |= RAL_BBP_ANTA;
1909: else if (antenna == 2)
1910: rx |= RAL_BBP_ANTB;
1911: else
1912: rx |= RAL_BBP_DIVERSITY;
1913:
1914: /* need to force no I/Q flip for RF 2525e and 2526 */
1915: if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
1916: rx &= ~RAL_BBP_FLIPIQ;
1917:
1918: ural_bbp_write(sc, RAL_BBP_RX, rx);
1919: }
1920:
1921: int
1922: ural_init(struct ifnet *ifp)
1923: {
1924: #define N(a) (sizeof (a) / sizeof ((a)[0]))
1925: struct ural_softc *sc = ifp->if_softc;
1926: struct ieee80211com *ic = &sc->sc_ic;
1927: uint16_t tmp;
1928: usbd_status error;
1929: int i, ntries;
1930:
1931: ural_stop(ifp, 0);
1932:
1933: /* initialize MAC registers to default values */
1934: for (i = 0; i < N(ural_def_mac); i++)
1935: ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
1936:
1937: /* wait for BBP and RF to wake up (this can take a long time!) */
1938: for (ntries = 0; ntries < 100; ntries++) {
1939: tmp = ural_read(sc, RAL_MAC_CSR17);
1940: if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
1941: (RAL_BBP_AWAKE | RAL_RF_AWAKE))
1942: break;
1943: DELAY(1000);
1944: }
1945: if (ntries == 100) {
1946: printf("%s: timeout waiting for BBP/RF to wakeup\n",
1947: sc->sc_dev.dv_xname);
1948: error = EIO;
1949: goto fail;
1950: }
1951:
1952: /* we're ready! */
1953: ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
1954:
1955: /* set basic rate set (will be updated later) */
1956: ural_write(sc, RAL_TXRX_CSR11, 0x153);
1957:
1958: error = ural_bbp_init(sc);
1959: if (error != 0)
1960: goto fail;
1961:
1962: /* set default BSS channel */
1963: ic->ic_bss->ni_chan = ic->ic_ibss_chan;
1964: ural_set_chan(sc, ic->ic_bss->ni_chan);
1965:
1966: /* clear statistic registers (STA_CSR0 to STA_CSR10) */
1967: ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
1968:
1969: /* set default sensitivity */
1970: ural_bbp_write(sc, 17, 0x48);
1971:
1972: ural_set_txantenna(sc, 1);
1973: ural_set_rxantenna(sc, 1);
1974:
1975: IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
1976: ural_set_macaddr(sc, ic->ic_myaddr);
1977:
1978: /*
1979: * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31).
1980: */
1981: for (i = 0; i < IEEE80211_WEP_NKID; i++) {
1982: struct ieee80211_key *k = &ic->ic_nw_keys[i];
1983: ural_write_multi(sc, RAL_SEC_CSR0 + i * IEEE80211_KEYBUF_SIZE,
1984: k->k_key, IEEE80211_KEYBUF_SIZE);
1985: }
1986:
1987: /*
1988: * Allocate xfer for AMRR statistics requests.
1989: */
1990: sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev);
1991: if (sc->amrr_xfer == NULL) {
1992: printf("%s: could not allocate AMRR xfer\n",
1993: sc->sc_dev.dv_xname);
1994: goto fail;
1995: }
1996:
1997: /*
1998: * Open Tx and Rx USB bulk pipes.
1999: */
2000: error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
2001: &sc->sc_tx_pipeh);
2002: if (error != 0) {
2003: printf("%s: could not open Tx pipe: %s\n",
2004: sc->sc_dev.dv_xname, usbd_errstr(error));
2005: goto fail;
2006: }
2007: error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
2008: &sc->sc_rx_pipeh);
2009: if (error != 0) {
2010: printf("%s: could not open Rx pipe: %s\n",
2011: sc->sc_dev.dv_xname, usbd_errstr(error));
2012: goto fail;
2013: }
2014:
2015: /*
2016: * Allocate Tx and Rx xfer queues.
2017: */
2018: error = ural_alloc_tx_list(sc);
2019: if (error != 0) {
2020: printf("%s: could not allocate Tx list\n",
2021: sc->sc_dev.dv_xname);
2022: goto fail;
2023: }
2024: error = ural_alloc_rx_list(sc);
2025: if (error != 0) {
2026: printf("%s: could not allocate Rx list\n",
2027: sc->sc_dev.dv_xname);
2028: goto fail;
2029: }
2030:
2031: /*
2032: * Start up the receive pipe.
2033: */
2034: for (i = 0; i < RAL_RX_LIST_COUNT; i++) {
2035: struct ural_rx_data *data = &sc->rx_data[i];
2036:
2037: usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
2038: MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof);
2039: error = usbd_transfer(data->xfer);
2040: if (error != 0 && error != USBD_IN_PROGRESS) {
2041: printf("%s: could not queue Rx transfer\n",
2042: sc->sc_dev.dv_xname);
2043: goto fail;
2044: }
2045: }
2046:
2047: /* kick Rx */
2048: tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
2049: if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2050: tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
2051: if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2052: tmp |= RAL_DROP_TODS;
2053: if (!(ifp->if_flags & IFF_PROMISC))
2054: tmp |= RAL_DROP_NOT_TO_ME;
2055: }
2056: ural_write(sc, RAL_TXRX_CSR2, tmp);
2057:
2058: ifp->if_flags &= ~IFF_OACTIVE;
2059: ifp->if_flags |= IFF_RUNNING;
2060:
2061: if (ic->ic_opmode == IEEE80211_M_MONITOR)
2062: ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2063: else
2064: ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2065:
2066: return 0;
2067:
2068: fail: ural_stop(ifp, 1);
2069: return error;
2070: #undef N
2071: }
2072:
2073: void
2074: ural_stop(struct ifnet *ifp, int disable)
2075: {
2076: struct ural_softc *sc = ifp->if_softc;
2077: struct ieee80211com *ic = &sc->sc_ic;
2078:
2079: sc->sc_tx_timer = 0;
2080: ifp->if_timer = 0;
2081: ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2082:
2083: ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */
2084:
2085: /* disable Rx */
2086: ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2087:
2088: /* reset ASIC and BBP (but won't reset MAC registers!) */
2089: ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2090: ural_write(sc, RAL_MAC_CSR1, 0);
2091:
2092: if (sc->amrr_xfer != NULL) {
2093: usbd_free_xfer(sc->amrr_xfer);
2094: sc->amrr_xfer = NULL;
2095: }
2096: if (sc->sc_rx_pipeh != NULL) {
2097: usbd_abort_pipe(sc->sc_rx_pipeh);
2098: usbd_close_pipe(sc->sc_rx_pipeh);
2099: sc->sc_rx_pipeh = NULL;
2100: }
2101: if (sc->sc_tx_pipeh != NULL) {
2102: usbd_abort_pipe(sc->sc_tx_pipeh);
2103: usbd_close_pipe(sc->sc_tx_pipeh);
2104: sc->sc_tx_pipeh = NULL;
2105: }
2106:
2107: ural_free_rx_list(sc);
2108: ural_free_tx_list(sc);
2109: }
2110:
2111: void
2112: ural_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
2113: {
2114: /* start with lowest Tx rate */
2115: ni->ni_txrate = 0;
2116: }
2117:
2118: void
2119: ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2120: {
2121: int i;
2122:
2123: /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2124: ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2125:
2126: ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
2127:
2128: /* set rate to some reasonable initial value */
2129: for (i = ni->ni_rates.rs_nrates - 1;
2130: i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
2131: i--);
2132: ni->ni_txrate = i;
2133:
2134: timeout_add(&sc->amrr_to, hz);
2135: }
2136:
2137: void
2138: ural_amrr_timeout(void *arg)
2139: {
2140: struct ural_softc *sc = arg;
2141: usb_device_request_t req;
2142: int s;
2143:
2144: s = splusb();
2145:
2146: /*
2147: * Asynchronously read statistic registers (cleared by read).
2148: */
2149: req.bmRequestType = UT_READ_VENDOR_DEVICE;
2150: req.bRequest = RAL_READ_MULTI_MAC;
2151: USETW(req.wValue, 0);
2152: USETW(req.wIndex, RAL_STA_CSR0);
2153: USETW(req.wLength, sizeof sc->sta);
2154:
2155: usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
2156: USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
2157: ural_amrr_update);
2158: (void)usbd_transfer(sc->amrr_xfer);
2159:
2160: splx(s);
2161: }
2162:
2163: void
2164: ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv,
2165: usbd_status status)
2166: {
2167: struct ural_softc *sc = (struct ural_softc *)priv;
2168: struct ifnet *ifp = &sc->sc_ic.ic_if;
2169:
2170: if (status != USBD_NORMAL_COMPLETION) {
2171: printf("%s: could not retrieve Tx statistics - cancelling "
2172: "automatic rate control\n", sc->sc_dev.dv_xname);
2173: return;
2174: }
2175:
2176: /* count TX retry-fail as Tx errors */
2177: ifp->if_oerrors += letoh16(sc->sta[9]);
2178:
2179: sc->amn.amn_retrycnt =
2180: letoh16(sc->sta[7]) + /* TX one-retry ok count */
2181: letoh16(sc->sta[8]) + /* TX more-retry ok count */
2182: letoh16(sc->sta[9]); /* TX retry-fail count */
2183:
2184: sc->amn.amn_txcnt =
2185: sc->amn.amn_retrycnt +
2186: letoh16(sc->sta[6]); /* TX no-retry ok count */
2187:
2188: ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
2189:
2190: timeout_add(&sc->amrr_to, hz);
2191: }
2192:
2193: int
2194: ural_activate(struct device *self, enum devact act)
2195: {
2196: switch (act) {
2197: case DVACT_ACTIVATE:
2198: break;
2199:
2200: case DVACT_DEACTIVATE:
2201: break;
2202: }
2203:
2204: return 0;
2205: }
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to if_ral.c CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / dev / usb