Annotation of sys/dev/sbus/qecreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: qecreg.h,v 1.1 2001/08/20 22:09:27 jason Exp $ */
2: /* $NetBSD: qecreg.h,v 1.2 1999/01/16 12:46:08 pk Exp $ */
3:
4: /*-
5: * Copyright (c) 1998 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Paul Kranenburg.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: /*
41: * Copyright (c) 1998 Theo de Raadt and Jason L. Wright.
42: * All rights reserved.
43: *
44: * Redistribution and use in source and binary forms, with or without
45: * modification, are permitted provided that the following conditions
46: * are met:
47: * 1. Redistributions of source code must retain the above copyright
48: * notice, this list of conditions and the following disclaimer.
49: * 2. Redistributions in binary form must reproduce the above copyright
50: * notice, this list of conditions and the following disclaimer in the
51: * documentation and/or other materials provided with the distribution.
52: * 3. The name of the authors may not be used to endorse or promote products
53: * derived from this software without specific prior written permission.
54: *
55: * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
56: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
57: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
58: * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
59: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
60: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
64: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65: */
66:
67: /*
68: * QEC registers layout
69: *-
70: struct qecregs {
71: u_int32_t qec_ctrl; // control
72: u_int32_t qec_stat; // status
73: u_int32_t qec_psize; // packet size
74: u_int32_t qec_msize; // local-mem size (64K)
75: u_int32_t qec_rsize; // receive partition size
76: u_int32_t qec_tsize; // transmit partition size
77: };
78: */
79: #define QEC_QRI_CTRL (0*4)
80: #define QEC_QRI_STAT (1*4)
81: #define QEC_QRI_PSIZE (2*4)
82: #define QEC_QRI_MSIZE (3*4)
83: #define QEC_QRI_RSIZE (4*4)
84: #define QEC_QRI_TSIZE (5*4)
85:
86: #define QEC_CTRL_MODEMASK 0xf0000000 /* QEC mode: */
87: #define QEC_CTRL_MMODE 0x40000000 /* MACE qec mode */
88: #define QEC_CTRL_BMODE 0x10000000 /* BE qec mode */
89: #define QEC_CTRL_EPAR 0x00000020 /* enable parity */
90: #define QEC_CTRL_ACNTRL 0x00000018 /* sbus arbitration control */
91: #define QEC_CTRL_B64 0x00000004 /* 64 byte dvma bursts */
92: #define QEC_CTRL_B32 0x00000002 /* 32 byte dvma bursts */
93: #define QEC_CTRL_B16 0x00000000 /* 16 byte dvma bursts */
94: #define QEC_CTRL_RESET 0x00000001 /* reset the qec */
95:
96: #define QEC_STAT_TX 0x00000008 /* bigmac transmit irq */
97: #define QEC_STAT_RX 0x00000004 /* bigmac receive irq */
98: #define QEC_STAT_BM 0x00000002 /* bigmac qec irq */
99: #define QEC_STAT_ER 0x00000001 /* bigmac error irq */
100:
101: #define QEC_PSIZE_2048 0x00 /* 2k packet size */
102: #define QEC_PSIZE_4096 0x01 /* 4k packet size */
103: #define QEC_PSIZE_6144 0x10 /* 6k packet size */
104: #define QEC_PSIZE_8192 0x11 /* 8k packet size */
105:
106:
107:
108: /*
109: * Transmit & receive buffer descriptor.
110: */
111: struct qec_xd {
112: volatile u_int32_t xd_flags; /* see below */
113: volatile u_int32_t xd_addr; /* Buffer address (DMA) */
114: };
115: #define QEC_XD_OWN 0x80000000 /* ownership: 1=hw, 0=sw */
116: #define QEC_XD_SOP 0x40000000 /* start of packet marker (xmit) */
117: #define QEC_XD_EOP 0x20000000 /* end of packet marker (xmit) */
118: #define QEC_XD_UPDATE 0x10000000 /* being updated? */
119: #define QEC_XD_LENGTH 0x00001fff /* packet length mask */
120: /* Descriptor ring size is fixed */
121: #define QEC_XD_RING_MAXSIZE 256 /* maximum ring size */
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