Annotation of sys/dev/sbus/if_le.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: if_le.c,v 1.13 2007/05/31 17:23:14 sobrado Exp $ */
2: /* $NetBSD: if_le.c,v 1.17 2001/05/30 11:46:35 mrg Exp $ */
3:
4: /*-
5: * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace
10: * Simulation Facility, NASA Ames Research Center; Paul Kranenburg.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: #include "bpfilter.h"
42:
43: #include <sys/param.h>
44: #include <sys/systm.h>
45: #include <sys/mbuf.h>
46: #include <sys/syslog.h>
47: #include <sys/socket.h>
48: #include <sys/device.h>
49: #include <sys/malloc.h>
50:
51: #include <net/if.h>
52: #include <net/if_media.h>
53:
54: #ifdef INET
55: #include <netinet/in.h>
56: #include <netinet/if_ether.h>
57: #endif
58:
59: #include <machine/bus.h>
60: #include <machine/intr.h>
61: #include <machine/autoconf.h>
62:
63: #include <dev/sbus/sbusvar.h>
64: #include <dev/sbus/lebuffervar.h> /*XXX*/
65:
66: #include <dev/ic/am7990reg.h>
67: #include <dev/ic/am7990var.h>
68:
69: /*
70: * LANCE registers.
71: */
72: #define LEREG1_RDP 0 /* Register Data port */
73: #define LEREG1_RAP 2 /* Register Address port */
74:
75: struct le_softc {
76: struct am7990_softc sc_am7990; /* glue to MI code */
77: bus_space_tag_t sc_bustag;
78: bus_dma_tag_t sc_dmatag;
79: bus_dmamap_t sc_dmamap;
80: bus_space_handle_t sc_reg;
81: };
82:
83: #define MEMSIZE 0x4000 /* LANCE memory size */
84:
85: int lematch_sbus(struct device *, void *, void *);
86: void leattach_sbus(struct device *, struct device *, void *);
87:
88: /*
89: * Media types supported.
90: */
91: struct cfattach le_sbus_ca = {
92: sizeof(struct le_softc), lematch_sbus, leattach_sbus
93: };
94:
95: void le_sbus_wrcsr(struct am7990_softc *, u_int16_t, u_int16_t);
96: u_int16_t le_sbus_rdcsr(struct am7990_softc *, u_int16_t);
97:
98: void
99: le_sbus_wrcsr(struct am7990_softc *sc, u_int16_t port, u_int16_t val)
100: {
101: struct le_softc *lesc = (struct le_softc *)sc;
102:
103: bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port);
104: bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, 2,
105: BUS_SPACE_BARRIER_WRITE);
106: bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, val);
107: bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, 2,
108: BUS_SPACE_BARRIER_WRITE);
109:
110: #if defined(SUN4M)
111: /*
112: * We need to flush the SBus->MBus write buffers. This can most
113: * easily be accomplished by reading back the register that we
114: * just wrote (thanks to Chris Torek for this solution).
115: */
116: if (CPU_ISSUN4M) {
117: volatile u_int16_t discard;
118: discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg,
119: LEREG1_RDP);
120: }
121: #endif
122: }
123:
124: u_int16_t
125: le_sbus_rdcsr(struct am7990_softc *sc, u_int16_t port)
126: {
127: struct le_softc *lesc = (struct le_softc *)sc;
128:
129: bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port);
130: bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, 2,
131: BUS_SPACE_BARRIER_WRITE);
132: return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP));
133: }
134:
135:
136: int
137: lematch_sbus(struct device *parent, void *vcf, void *aux)
138: {
139: struct cfdata *cf = vcf;
140: struct sbus_attach_args *sa = aux;
141:
142: return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
143: }
144:
145: void
146: leattach_sbus(struct device *parent, struct device *self, void *aux)
147: {
148: struct sbus_attach_args *sa = aux;
149: struct le_softc *lesc = (struct le_softc *)self;
150: struct am7990_softc *sc = &lesc->sc_am7990;
151: bus_dma_tag_t dmatag;
152: /* XXX the following declarations should be elsewhere */
153: extern void myetheraddr(u_char *);
154: extern struct cfdriver lebuffer_cd;
155:
156: lesc->sc_bustag = sa->sa_bustag;
157: lesc->sc_dmatag = dmatag = sa->sa_dmatag;
158:
159: if (sbus_bus_map(sa->sa_bustag, sa->sa_reg[0].sbr_slot,
160: sa->sa_reg[0].sbr_offset, sa->sa_reg[0].sbr_size,
161: BUS_SPACE_MAP_LINEAR, 0, &lesc->sc_reg) != 0) {
162: printf(": cannot map registers\n");
163: return;
164: }
165:
166: /*
167: * Look for an "unallocated" lebuffer and pair it with
168: * this `le' device on the assumption that we're on
169: * a pre-historic ROM that doesn't establish le<=>lebuffer
170: * parent-child relationships.
171: */
172: if (lebuffer_cd.cd_ndevs != 0) {
173: struct lebuf_softc *lebuf;
174: int i;
175:
176: for (i = 0; i < lebuffer_cd.cd_ndevs; i++) {
177: lebuf = (struct lebuf_softc *)lebuffer_cd.cd_devs[i];
178: if (lebuf == NULL || lebuf->attached != 0)
179: continue;
180:
181: sc->sc_mem = lebuf->sc_buffer;
182: sc->sc_memsize = lebuf->sc_bufsiz;
183: /* Lance view is offset by buffer location */
184: sc->sc_addr = 0;
185: lebuf->attached = 1;
186:
187: /* That old black magic... */
188: sc->sc_conf3 = getpropint(sa->sa_node,
189: "busmaster-regval",
190: LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON);
191: break;
192: }
193: }
194:
195: if (sc->sc_mem == 0) {
196: bus_dma_segment_t seg;
197: int rseg, error;
198:
199: /* Get a DMA handle */
200: if ((error = bus_dmamap_create(dmatag, MEMSIZE, 1, MEMSIZE, 0,
201: BUS_DMA_NOWAIT|BUS_DMA_24BIT, &lesc->sc_dmamap)) != 0) {
202: printf(": DMA map create error %d\n", error);
203: return;
204: }
205:
206: /* Allocate DMA buffer */
207: if ((error = bus_dmamem_alloc(dmatag, MEMSIZE, 0, 0,
208: &seg, 1, &rseg, BUS_DMA_NOWAIT|BUS_DMA_24BIT)) != 0){
209: printf(": DMA buffer allocation error %d\n", error);
210: return;
211: }
212:
213: /* Map DMA buffer into kernel space */
214: if ((error = bus_dmamem_map(dmatag, &seg, rseg, MEMSIZE,
215: (caddr_t *)&sc->sc_mem,
216: BUS_DMA_NOWAIT|BUS_DMA_COHERENT|BUS_DMA_24BIT)) != 0) {
217: printf(": DMA buffer map error %d\n", error);
218: bus_dmamem_free(lesc->sc_dmatag, &seg, rseg);
219: return;
220: }
221:
222: /* Load DMA buffer */
223: if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap, sc->sc_mem,
224: MEMSIZE, NULL, BUS_DMA_NOWAIT|BUS_DMA_COHERENT|BUS_DMA_24BIT)) != 0) {
225: printf(": DMA buffer map load error %d\n", error);
226: bus_dmamem_free(dmatag, &seg, rseg);
227: bus_dmamem_unmap(dmatag, sc->sc_mem, MEMSIZE);
228: return;
229: }
230:
231: sc->sc_addr = lesc->sc_dmamap->dm_segs[0].ds_addr & 0xffffff;
232: sc->sc_memsize = MEMSIZE;
233: sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
234: }
235:
236: myetheraddr(sc->sc_arpcom.ac_enaddr);
237:
238: sc->sc_copytodesc = am7990_copytobuf_contig;
239: sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
240: sc->sc_copytobuf = am7990_copytobuf_contig;
241: sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
242: sc->sc_zerobuf = am7990_zerobuf_contig;
243:
244: sc->sc_rdcsr = le_sbus_rdcsr;
245: sc->sc_wrcsr = le_sbus_wrcsr;
246:
247: am7990_config(&lesc->sc_am7990);
248:
249: /* Establish interrupt handler */
250: if (sa->sa_nintr != 0)
251: (void)bus_intr_establish(lesc->sc_bustag, sa->sa_pri,
252: IPL_NET, 0, am7990_intr, sc, self->dv_xname);
253: }
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