Return to asioreg.h CVS log

Up to [local] / sys / dev / sbus

Annotation of sys/dev/sbus/asioreg.h, Revision 1.1

1.1     ! nbrk        1: /*     $OpenBSD: asioreg.h,v 1.3 2003/06/02 18:32:41 jason Exp $       */
        !             2:
        !             3: /*
        !             4:  * Copyright (c) 2002 Jason L. Wright (jason@thought.net)
        !             5:  * All rights reserved.
        !             6:  *
        !             7:  * Redistribution and use in source and binary forms, with or without
        !             8:  * modification, are permitted provided that the following conditions
        !             9:  * are met:
        !            10:  * 1. Redistributions of source code must retain the above copyright
        !            11:  *    notice, this list of conditions and the following disclaimer.
        !            12:  * 2. Redistributions in binary form must reproduce the above copyright
        !            13:  *    notice, this list of conditions and the following disclaimer in the
        !            14:  *    documentation and/or other materials provided with the distribution.
        !            15:  *
        !            16:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
        !            17:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
        !            18:  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
        !            19:  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
        !            20:  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
        !            21:  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
        !            22:  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
        !            23:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
        !            24:  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
        !            25:  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
        !            26:  * POSSIBILITY OF SUCH DAMAGE.
        !            27:  *
        !            28:  * Effort sponsored in part by the Defense Advanced Research Projects
        !            29:  * Agency (DARPA) and Air Force Research Laboratory, Air Force
        !            30:  * Materiel Command, USAF, under agreement number F30602-01-2-0537.
        !            31:  *
        !            32:  */
        !            33:
        !            34: #define        ASIO_CSR                0       /* bus space offset */
        !            35: /*
        !            36:  * As a feature, different board revisions 's' and 'sj' define the
        !            37:  * interrupt enables differently.
        !            38:  */
        !            39: #define        ASIO_CSR_SBUS_INT7      0x80    /* sbus interrupt 7 */
        !            40: #define        ASIO_CSR_SBUS_INT6      0x40    /* sbus interrupt 6 */
        !            41: #define        ASIO_CSR_SBUS_INT5      0x20    /* sbus interrupt 5 */
        !            42: #define        ASIO_CSR_S_PAR_INTEN    0x08    /* parallel interrupt enable */
        !            43: #define        ASIO_CSR_SJ_UART0_INTEN 0x08    /* sj: uart0 interrupt enable */
        !            44: #define        ASIO_CSR_UART1_INTEN    0x04    /* uart1 interrupt enable */
        !            45: #define        ASIO_CSR_S_UART0_INTEN  0x02    /* s: uart0 interrupt enable */
        !            46: #define        ASIO_CSR_SJ_PAR_INTEN   0x02    /* sj: parallel interrupt enable */
        !            47: #define        ASIO_CSR_LPTOE          0x01