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File: [local] / sys / dev / pci / pciide_svwsata_reg.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:13:48 2008 UTC (16 years, 6 months ago) by nbrk
Import of OpenBSD 4.2 release kernel tree with initial code to support Jornada 720/728, StrongARM 1110-based handheld PC. At this point kernel roots on NFS and boots into vfs_mountroot() and traps. What is supported: - glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode (needs some palette tweaks for non black/white/blue colors, i think) - saic, SA11x0 interrupt controller (needs cleanup) - sacom, SA11x0 UART (supported only as boot console for now) - SA11x0 GPIO controller fully supported (but can't handle multiple interrupt handlers on one gpio pin) - sassp, SSP port on SA11x0 that attaches spibus - Jornada microcontroller (jmcu) to control kbd, battery, etc throught the SPI bus (wskbd attaches on jmcu, but not tested) - tod functions seem work - initial code for SA-1111 (chip companion) : this is TODO Next important steps, i think: - gpio and intc on sa1111 - pcmcia support for sa11x0 (and sa1111 help logic) - REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs) - root on wd0! (using already supported PCMCIA-ATA) |
/* $OpenBSD: pciide_svwsata_reg.h,v 1.4 2006/02/10 21:45:41 kettenis Exp $ */ /* * Copyright (c) 2005 Mark Kettenis * * Permission to use, copy, modify, and distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef _DEV_PCI_PCIIDE_SVWSATA_REG_H_ #define _DEV_PCI_PCIIDE_SVWSATA_REG_H_ struct pciide_svwsata { bus_space_tag_t ba5_st; bus_space_handle_t ba5_sh; }; #define SVWSATA_TF0 0x00 #define SVWSATA_TF8 0x20 #define SVWSATA_DMA 0x30 #define SVWSATA_SSTATUS 0x40 #define SVWSATA_SERROR 0x44 #define SVWSATA_SCONTROL 0x48 #define SVWSATA_SICR1 0x80 #define SVWSATA_SICR2 0x84 #define SVWSATA_SIM 0x88 u_int8_t svwsata_read_reg(struct channel_softc *, enum wdc_regs); void svwsata_write_reg(struct channel_softc *, enum wdc_regs, u_int8_t); void svwsata_lba48_write_reg(struct channel_softc *, enum wdc_regs, u_int16_t); struct channel_softc_vtbl wdc_svwsata_vtbl = { svwsata_read_reg, svwsata_write_reg, svwsata_lba48_write_reg, wdc_default_read_raw_multi_2, wdc_default_write_raw_multi_2, wdc_default_read_raw_multi_4, wdc_default_write_raw_multi_4 }; #endif /* !_DEV_PCI_PCIIDE_SVWSATA_REG_H_ */