Annotation of sys/dev/pci/pciide_pdc202xx_reg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: pciide_pdc202xx_reg.h,v 1.14 2006/06/24 07:51:30 jsg Exp $ */
! 2: /* $NetBSD: pciide_pdc202xx_reg.h,v 1.5 2001/07/05 08:38:27 toshii Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 1999 Manuel Bouyer.
! 6: *
! 7: * Redistribution and use in source and binary forms, with or without
! 8: * modification, are permitted provided that the following conditions
! 9: * are met:
! 10: * 1. Redistributions of source code must retain the above copyright
! 11: * notice, this list of conditions and the following disclaimer.
! 12: * 2. Redistributions in binary form must reproduce the above copyright
! 13: * notice, this list of conditions and the following disclaimer in the
! 14: * documentation and/or other materials provided with the distribution.
! 15: * 3. All advertising materials mentioning features or use of this software
! 16: * must display the following acknowledgement:
! 17: * This product includes software developed by Manuel Bouyer.
! 18: * 4. Neither the name of the University nor the names of its contributors
! 19: * may be used to endorse or promote products derived from this software
! 20: * without specific prior written permission.
! 21: *
! 22: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 23: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 24: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 25: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
! 26: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
! 27: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
! 28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
! 29: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
! 30: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
! 31: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! 32: *
! 33: */
! 34:
! 35: #ifndef _DEV_PCI_PCIIDE_PDC202XX_REG_H_
! 36: #define _DEV_PCI_PCIIDE_PDC202XX_REG_H_
! 37:
! 38: /*
! 39: * Registers definitions for PROMISE PDC20246/PDC20262 PCI IDE controller.
! 40: * Unfortunably the HW docs are not publically available. I've been able
! 41: * to get a partial one for the PDC20246, and a better one for the PDC20262
! 42: * from Promise.
! 43: */
! 44:
! 45: #define PDC2xx_STATE 0x50
! 46: #define PDC2xx_STATE_IDERAID 0x0001
! 47: #define PDC2xx_STATE_NATIVE 0x0080
! 48: /* controller initial state values(PDC20246 only) */
! 49: #define PDC246_STATE_SHIPID 0x8000
! 50: #define PDC246_STATE_IOCHRDY 0x0400
! 51: #define PDC246_STATE_LBA(channel) (0x0100 << (channel))
! 52: #define PDC246_STATE_ISAIRQ 0x0008
! 53: #define PDC246_STATE_EN(channel) (0x0002 << (channel))
! 54: /* controller initial state values(PDC20262 only) */
! 55: #define PDC262_STATE_EN(chan) (0x1000 << (chan))
! 56: #define PDC262_STATE_80P(chan) (0x0400 << (chan))
! 57:
! 58: /* per-drive timings */
! 59: #define PDC2xx_TIM(channel, drive) (0x60 + 4 * (drive) + 8 * (channel))
! 60: #define PDC2xx_TIM_SET_PA(r, x) (((r) & 0xfffffff0) | ((x) & 0xf))
! 61: #define PDC2xx_TIM_SET_PB(r, x) (((r) & 0xffffe0ff) | (((x) & 0x1f) << 8))
! 62: #define PDC2xx_TIM_SET_MB(r, x) (((r) & 0xffff1fff) | (((x) & 0x7) << 13))
! 63: #define PDC2xx_TIM_SET_MC(r, x) (((r) & 0xfff0ffff) | (((x) & 0xf) << 16))
! 64: #define PDC2xx_TIM_PRE 0x00000010
! 65: #define PDC2xx_TIM_IORDY 0x00000020
! 66: #define PDC2xx_TIM_ERRDY 0x00000040
! 67: #define PDC2xx_TIM_SYNC 0x00000080
! 68: #define PDC2xx_TIM_DMAW 0x00100000
! 69: #define PDC2xx_TIM_DMAR 0x00200000
! 70: #define PDC2xx_TIM_IORDYp 0x00400000
! 71: #define PDC2xx_TIM_DMARQp 0x00800000
! 72:
! 73: /* The following are extensions of the DMA registers */
! 74:
! 75: /* Ultra-DMA mode 3/4 control (PDC20262 only, 1 byte) */
! 76: #define PDC262_U66 0x11
! 77: #define PDC262_U66_EN(chan) (0x2 << ((chan) *2))
! 78: /* primary mode (1 byte) */
! 79: #define PDC2xx_PM 0x1a
! 80: /* secondary mode (1 byte) */
! 81: #define PDC2xx_SM 0x1b
! 82: /* System control register (4 bytes) */
! 83: #define PDC2xx_SCR 0x1c
! 84: #define PDC2xx_SCR_SET_GEN(r,x) (((r) & 0xffffff00) | ((x) & 0xff))
! 85: #define PDC2xx_SCR_EMPTY(channel) (0x00000100 << (4 * channel))
! 86: #define PDC2xx_SCR_FULL(channel) (0x00000200 << (4 * channel))
! 87: #define PDC2xx_SCR_INT(channel) (0x00000400 << (4 * channel))
! 88: #define PDC2xx_SCR_ERR(channel) (0x00000800 << (4 * channel))
! 89: #define PDC2xx_SCR_SET_I2C(r,x) (((r) & 0xfff0ffff) | (((x) & 0xf) << 16))
! 90: #define PDC2xx_SCR_SET_POLL(r,x) (((r) & 0xff0fffff) | (((x) & 0xf) << 20))
! 91: #define PDC2xx_SCR_DMA 0x01000000
! 92: #define PDC2xx_SCR_IORDY 0x02000000
! 93: #define PDC2xx_SCR_G2FD 0x04000000
! 94: #define PDC2xx_SCR_FLOAT 0x08000000
! 95: #define PDC2xx_SCR_RSET 0x10000000
! 96: #define PDC2xx_SCR_TST 0x20000000
! 97: /* Values for "General Purpose Register" (PDC20262 only) */
! 98: #define PDC262_SCR_GEN_LAT 0x20
! 99:
! 100: /* ATAPI port ((PDC20262 only) (4 bytes) */
! 101: #define PDC262_ATAPI(chan) (0x20 + (4 * (chan)))
! 102: #define PDC262_ATAPI_WC_MASK 0x00000fff
! 103: #define PDC262_ATAPI_DMA_READ 0x00001000
! 104: #define PDC262_ATAPI_DMA_WRITE 0x00002000
! 105: #define PDC262_ATAPI_UDMA 0x00004000
! 106: #define PDC262_ATAPI_LBA48_READ 0x05000000
! 107: #define PDC262_ATAPI_LBA48_WRITE 0x06000000
! 108:
! 109: /*
! 110: * The timings provided here cmoes from the PDC20262 docs. I hope they are
! 111: * rigth for the PDC20246 too ...
! 112: */
! 113:
! 114: static int8_t pdc2xx_pa[] = {0x9, 0x5, 0x3, 0x2, 0x1};
! 115: static int8_t pdc2xx_pb[] = {0x13, 0xc, 0x8, 0x6, 0x4};
! 116: static int8_t pdc2xx_dma_mb[] = {0x3, 0x3, 0x3};
! 117: static int8_t pdc2xx_dma_mc[] = {0x5, 0x4, 0x3};
! 118: static int8_t pdc2xx_udma_mb[] = {0x3, 0x2, 0x1, 0x2, 0x1, 0x1};
! 119: static int8_t pdc2xx_udma_mc[] = {0x3, 0x2, 0x1, 0x2, 0x1, 0x1};
! 120:
! 121: /*
! 122: * Registers definitions for Promise PDC20268 and above chips
! 123: */
! 124: #define PDC268_INDEX(chan) (0x01 + IDEDMA_SCH_OFFSET * (chan))
! 125: #define PDC268_DATA(chan) (0x03 + IDEDMA_SCH_OFFSET * (chan))
! 126: #define PDC268_CABLE 0x04
! 127: #define PDC268_INTR 0x20
! 128:
! 129: /*
! 130: * PDC203xx register definitions.
! 131: */
! 132: #define PDC203xx_NCHANNELS 4
! 133: #define PDC203xx_BAR_IDEREGS 0x1c
! 134:
! 135: /*
! 136: * PDC205xx register definitions.
! 137: */
! 138: #define PDC40718_NCHANNELS 4
! 139: #define PDC20575_NCHANNELS 3
! 140:
! 141: #define PDC205_REGADDR(base,ch) ((base)+((ch)<<8))
! 142: #define PDC205_SSTATUS(ch) PDC205_REGADDR(0x400,ch)
! 143: #define PDC205_SERROR(ch) PDC205_REGADDR(0x404,ch)
! 144: #define PDC205_SCONTROL(ch) PDC205_REGADDR(0x408,ch)
! 145: #define PDC205_MULTIPLIER(ch) PDC205_REGADDR(0x4e8,ch)
! 146:
! 147: #define SCONTROL_WRITE(ps,channel,scontrol) \
! 148: bus_space_write_4((ps)->ba5_st, (ps)->ba5_sh, \
! 149: PDC205_SCONTROL(channel), scontrol)
! 150:
! 151: #define SSTATUS_READ(sc,channel) \
! 152: bus_space_read_4((ps)->ba5_st, (ps)->ba5_sh, \
! 153: PDC205_SSTATUS(channel))
! 154:
! 155:
! 156: /* Private data */
! 157: struct pciide_pdcsata {
! 158: bus_space_tag_t ba5_st;
! 159: bus_space_handle_t ba5_sh;
! 160:
! 161: struct {
! 162: bus_space_tag_t cmd_iot;
! 163: bus_space_handle_t cmd_iohs[WDC_NREG+WDC_NSHADOWREG];
! 164:
! 165: bus_space_tag_t ctl_iot;
! 166: bus_space_handle_t ctl_ioh;
! 167:
! 168: bus_space_handle_t dma_iohs[IDEDMA_NREGS];
! 169: } regs[PDC203xx_NCHANNELS];
! 170: };
! 171:
! 172: u_int8_t pdc203xx_read_reg(struct channel_softc *, enum wdc_regs);
! 173: void pdc203xx_write_reg(struct channel_softc *, enum wdc_regs, u_int8_t);
! 174:
! 175: struct channel_softc_vtbl wdc_pdc203xx_vtbl = {
! 176: pdc203xx_read_reg,
! 177: pdc203xx_write_reg,
! 178: wdc_default_lba48_write_reg,
! 179: wdc_default_read_raw_multi_2,
! 180: wdc_default_write_raw_multi_2,
! 181: wdc_default_read_raw_multi_4,
! 182: wdc_default_write_raw_multi_4
! 183: };
! 184:
! 185: #endif /* !_DEV_PCI_PCIIDE_PDC202XX_REG_H_ */
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to pciide_pdc202xx_reg.h CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / dev / pci