File: [local] / sys / dev / pci / pciide_amd_reg.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:13:48 2008 UTC (16 years, 5 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: pciide_amd_reg.h,v 1.8 2004/09/24 07:38:38 grange Exp $ */
/* $NetBSD: pciide_amd_reg.h,v 1.2 2000/07/06 15:08:11 bouyer Exp $ */
/*
* Copyright (c) 2000 David Sainty.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
#ifndef _DEV_PCI_PCIIDE_AMD_REG_H_
#define _DEV_PCI_PCIIDE_AMD_REG_H_
/*
* Registers definitions for AMD 756 PCI IDE controller. Documentation
* available at: http://www.amd.com/products/cpg/athlon/techdocs/pdf/22548.pdf
*/
/* Chip revisions */
#define AMD756_CHIPREV_D2 3
/* Chip revision tests */
/*
* The AMD756 chip revision D2 has a bug affecting DMA (but not UDMA)
* modes. The workaround documented by AMD is to not use DMA on any
* drive which does not support UDMA modes.
*
* See: http://www.amd.com/products/cpg/athlon/techdocs/pdf/22591.pdf
*/
#define AMD756_CHIPREV_DISABLEDMA(product, rev) \
((product) == PCI_PRODUCT_AMD_PBC756_IDE && (rev) <= AMD756_CHIPREV_D2)
/* Channel enable */
#define AMD756_CHANSTATUS_EN 0x40
#define AMD756_CHAN_EN(chan) (0x01 << (1 - (chan)))
#define AMD756_CABLE(chan, drive) (0x00010000 << ((chan) * 2 + (drive)))
/* Data port timing controls */
#define AMD756_DATATIM 0x48
#define AMD756_DATATIM_MASK(channel) (0xffff << ((1 - (channel)) << 4))
#define AMD756_DATATIM_RECOV(channel, drive, x) (((x) & 0xf) << \
(((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
#define AMD756_DATATIM_PULSE(channel, drive, x) (((x) & 0xf) << \
(((1 - (channel)) << 4) + ((1 - (drive)) << 3) + 4))
static const int8_t amd756_pio_set[] = {0x0a, 0x0a, 0x0a, 0x02, 0x02};
static const int8_t amd756_pio_rec[] = {0x08, 0x08, 0x08, 0x02, 0x00};
/* Ultra-DMA/33 control */
#define AMD756_UDMA 0x50
#define AMD756_UDMA_MASK(channel) (0xffff << ((1 - (channel)) << 4))
#define AMD756_UDMA_TIME(channel, drive, x) (((x) & 0x7) << \
(((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
#define AMD756_UDMA_EN(channel, drive) (0x40 << \
(((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
#define AMD756_UDMA_EN_MTH(channel, drive) (0x80 << \
(((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
static const int8_t amd756_udma_tim[] =
{0x02, 0x01, 0x00, 0x04, 0x05, 0x06, 0x07};
#endif /* !_DEV_PCI_PCIIDE_AMD_REG_H_ */