Annotation of sys/dev/pci/if_sandrv.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: if_sandrv.h,v 1.4 2005/04/01 21:42:36 canacar Exp $ */
2:
3: /*-
4: * Copyright (c) 2001-2004 Sangoma Technologies (SAN)
5: * All rights reserved. www.sangoma.com
6: *
7: * This code is written by Alex Feldman <al.feldman@sangoma.com> for SAN.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above
15: * copyright notice, this list of conditions and the following disclaimer
16: * in the documentation and/or other materials provided with the
17: * distribution.
18: * 3. Neither the name of Sangoma Technologies nor the names of its
19: * contributors may be used to endorse or promote products derived
20: * from this software without specific prior written permission.
21: *
22: * THIS SOFTWARE IS PROVIDED BY SANGOMA TECHNOLOGIES AND CONTRIBUTORS
23: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32: * THE POSSIBILITY OF SUCH DAMAGE.
33: */
34:
35: #ifndef __IF_SANDRV_H
36: # define __IF_SANDRV_H
37:
38: #ifdef __SDLADRV__
39: # define EXTERN
40: #else
41: # define EXTERN extern
42: #endif
43:
44:
45:
46: #define WAN_MAILBOX_SIZE 16
47: #define WAN_MAX_DATA_SIZE 2032
48: #pragma pack(1)
49: typedef struct {
50: union {
51: struct {
52: unsigned char opp_flag;
53: unsigned char command;
54: unsigned short data_len;
55: unsigned char return_code;
56: } wan_p_cmd;
57: unsigned char mbox[WAN_MAILBOX_SIZE];
58: } wan_cmd_u;
59: #define wan_cmd_opp_flag wan_cmd_u.wan_p_cmd.opp_flag
60: #define wan_cmd_command wan_cmd_u.wan_p_cmd.command
61: #define wan_cmd_data_len wan_cmd_u.wan_p_cmd.data_len
62: #define wan_cmd_return_code wan_cmd_u.wan_p_cmd.return_code
63: } wan_cmd_t;
64: #pragma pack()
65:
66: /************************************************
67: * GLOBAL DEFINITION FOR SANGOMA MAILBOX *
68: ************************************************/
69: #pragma pack(1)
70: typedef struct {
71: wan_cmd_t wan_cmd;
72: unsigned char wan_data[WAN_MAX_DATA_SIZE];
73: #define wan_opp_flag wan_cmd.wan_cmd_opp_flag
74: #define wan_command wan_cmd.wan_cmd_command
75: #define wan_data_len wan_cmd.wan_cmd_data_len
76: #define wan_return_code wan_cmd.wan_cmd_return_code
77: } wan_mbox_t;
78: #pragma pack()
79: #define WAN_MBOX_INIT(mbox) memset(mbox, 0, sizeof(wan_cmd_t));
80:
81:
82: #if defined(_KERNEL)
83:
84: /*
85: ******************************************************************
86: ** D E F I N E S **
87: ******************************************************************
88: */
89: #define SDLADRV_MAJOR_VER 2
90: #define SDLADRV_MINOR_VER 1
91: #define SDLA_WINDOWSIZE 0x2000 /* default dual-port memory window size */
92:
93: /* Adapter types */
94: #define SDLA_S508 5080
95: #define SDLA_S514 5140
96: #define SDLA_ADSL 6000
97: #define SDLA_AFT 7000
98:
99: #define SDLA_PRI_PORT 1
100: #define SDLA_SEC_PORT 2
101:
102: /* Firmware supported version */
103: #define SFM_VERSION 2
104: #define SFM_SIGNATURE "SFM - Sangoma SDLA Firmware Module"
105:
106: /* min/max */
107: #define SFM_IMAGE_SIZE 0x8000 /* max size of SDLA code image file */
108: #define SFM_DESCR_LEN 256 /* max length of description string */
109: #define SFM_MAX_SDLA 16 /* max number of compatible adapters */
110:
111: /* Firmware identification numbers:
112: * 0 .. 999 Test & Diagnostics
113: * 1000 .. 1999 Streaming HDLC
114: * 2000 .. 2999 Bisync
115: * 3000 .. 3999 SDLC
116: * 4000 .. 4999 HDLC
117: * 5000 .. 5999 X.25
118: * 6000 .. 6999 Frame Relay
119: * 7000 .. 7999 PPP
120: * 8000 .. 8999 Cisco HDLC
121: */
122: #define SFID_HDLC502 4200
123: #define SFID_HDLC508 4800
124: #define SFID_CHDLC508 8800
125: #define SFID_CHDLC514 8140
126: #define SFID_AFT 30000
127:
128: /* */
129: #define SDLA_MEMBASE 0x01
130: #define SDLA_MEMEND 0x02
131: #define SDLA_MEMSIZE 0x03
132: #define SDLA_MEMORY 0x05
133: #define SDLA_BASEADDR 0x06
134: #define SDLA_DMATAG 0x04
135: #define SDLA_IRQ 0x07
136: #define SDLA_BUS 0x08
137: #define SDLA_CPU 0x0A
138: #define SDLA_SLOT 0x0B
139: #define SDLA_ADAPTERTYPE 0x0C
140: #define SDLA_CARDTYPE 0x0D
141: #define SDLA_PCIEXTRAVER 0x0E
142:
143: /* S514 PCI adapter CPU numbers */
144: #define SDLA_MAX_CPUS 2
145: #define S514_CPU_A 'A'
146: #define S514_CPU_B 'B'
147: #define SDLA_CPU_A 1
148: #define SDLA_CPU_B 2
149: #define SDLA_GET_CPU(cpu_no) (cpu_no==SDLA_CPU_A)?S514_CPU_A:S514_CPU_B
150:
151: #define AFT_CORE_ID_MASK 0x00FF
152: #define AFT_CORE_REV_MASK 0xFF00
153: #define AFT_HDLC_CORE_ID 0x00 /* HDLC core */
154: #define AFT_ATM_CORE_ID 0x01 /* ATM core */
155: #define AFT_SS7_CORE_ID 0x02 /* SS7 core */
156:
157: #define XILINX_PCI_MEM_SIZE 0x2FF
158: #define XILINX_PCI_LATENCY 0x0000FF00
159:
160: #define XILINX_PCI_CMD_REG 0x04
161: #define XILINX_PCI_LATENCY_REG 0x0C
162:
163: /* Local PCI register offsets */
164: #if 0
165: #define PCI_VENDOR_ID_WORD 0x00 /* vendor ID */
166: #define PCI_DEVICE_ID_WORD 0x02 /* device ID */
167: #define PCI_SUBCLASS_ID_BYTE 0x0a /* subclass ID byte */
168: #endif
169: #define PCI_IO_BASE_DWORD 0x10 /* IO base */
170: #define PCI_MEM_BASE0_DWORD 0x14 /* memory base - apperture 0 */
171: #define PCI_MEM_BASE1_DWORD 0x18 /* memory base - apperture 1 */
172: #if 0
173: #define PCI_SUBSYS_VENDOR_WORD 0x2C /* subsystem vendor ID */
174: #define PCI_SUBSYS_ID_WORD 0x2E /* subsystem ID */
175: #define PCI_INT_LINE_BYTE 0x3C /* interrupt line */
176: #define PCI_INT_PIN_BYTE 0x3D /* interrupt pin */
177: #endif
178: #define PCI_MAP0_DWORD 0x40 /* PCI to local bus address 0 */
179: #define PCI_MAP1_DWORD 0x44 /* PCI to local bus address 1 */
180: #define PCI_INT_STATUS 0x48 /* interrupt status */
181: #define PCI_INT_CONFIG 0x4C /* interrupt configuration */
182:
183: #define PCI_DEV_SLOT_MASK 0x1F /* mask for slot numbering */
184: #define PCI_IRQ_NOT_ALLOCATED 0xFF /* interrupt line for no IRQ */
185: /* Local PCI register usage */
186: #define PCI_MEMORY_ENABLE 0x00000003 /* enable PCI memory */
187: #define PCI_CPU_A_MEM_DISABLE 0x00000002 /* disable CPU A memory */
188: #define PCI_CPU_B_MEM_DISABLE 0x00100002 /* disable CPU B memory */
189: #define PCI_ENABLE_IRQ_CPU_A 0x005A0004 /* enable IRQ for CPU A */
190: #define PCI_ENABLE_IRQ_CPU_B 0x005A0008 /* enable IRQ for CPU B */
191: #define PCI_ENABLE_IRQ_DMA0 0x01000000 /* enable IRQ for DMA 0 */
192: #define PCI_ENABLE_IRQ_DMA1 0x02000000 /* enable IRQ for DMA 1 */
193: #define PCI_DISABLE_IRQ_CPU_A 0x00000004 /* disable IRQ for CPU A */
194: #define PCI_DISABLE_IRQ_CPU_B 0x00000008 /* disable IRQ for CPU B */
195: #define PCI_DISABLE_IRQ_DMA0 0x01000000 /* disable IRQ for DMA 0 */
196: #define PCI_DISABLE_IRQ_DMA1 0x02000000 /* disable IRQ for DMA 1 */
197:
198: /* Setting for the Interrupt Status register */
199: #define IRQ_DMA0 0x01000000 /* IRQ for DMA0 */
200: #define IRQ_DMA1 0x02000000 /* IRQ for DMA1 */
201: #define IRQ_LOCAL_CPU_A 0x00000004 /* IRQ for CPU A */
202: #define IRQ_LOCAL_CPU_B 0x00000008 /* IRQ for CPU B */
203: #define IRQ_CPU_A 0x04 /* IRQ for CPU A */
204: #define IRQ_CPU_B 0x08 /* IRQ for CPU B */
205:
206: /* The maximum size of the S514 memory */
207: #define MAX_SIZEOF_S514_MEMORY (256 * 1024)
208:
209: /* S514 control register offsets within the memory address space */
210: #define S514_CTRL_REG_BYTE 0x80000
211:
212: /* S514 adapter control bytes */
213: #define S514_CPU_HALT 0x00
214: #define S514_CPU_START 0x01
215:
216: /* The maximum number of S514 adapters supported */
217: #define MAX_S514_CARDS 20
218:
219: #define WAN_CMD_OK 0 /* normal firmware return code */
220: #define WAN_CMD_TIMEOUT 0xFF /* firmware command timed out */
221:
222: /* signature: 'SDLA' reversed */
223: #define SDLAHW_MAGIC 0x414C4453L
224:
225: /*
226: ******************************************************************
227: ** M A C R O S **
228: ******************************************************************
229: */
230: #define AFT_CORE_ID_DECODE(core_id) \
231: (core_id == AFT_HDLC_CORE_ID) ? "HDLC" : \
232: (core_id == AFT_ATM_CORE_ID) ? "ATM" : \
233: (core_id == AFT_SS7_CORE_ID) ? "SS7" : \
234: "Unknown"
235: #define WAN_ASSERT(val) \
236: if (val){ \
237: log(LOG_INFO, "********** ASSERT FAILED **********\n"); \
238: log(LOG_INFO, "%s:%d - Critical error\n", \
239: __FILE__,__LINE__); \
240: return -EINVAL; \
241: }
242:
243: #define WAN_ASSERT1(val) \
244: if (val){ \
245: log(LOG_INFO, "********** ASSERT FAILED **********\n"); \
246: log(LOG_INFO, "%s:%d - Critical error\n", \
247: __FILE__,__LINE__); \
248: return; \
249: }
250:
251: #define WAN_ASSERT2(val, ret) \
252: if (val){ \
253: log(LOG_INFO, "********** ASSERT FAILED **********\n"); \
254: log(LOG_INFO, "%s:%d - Critical error\n", \
255: __FILE__,__LINE__); \
256: return ret; \
257: }
258:
259: #define SDLA_MAGIC(hw) WAN_ASSERT((hw)->magic != SDLAHW_MAGIC)
260: /*
261: ******************************************************************
262: ** S T R U C T U R E S **
263: ******************************************************************
264: */
265:
266: typedef struct sfm_info /* firmware module information */
267: {
268: unsigned short codeid; /* firmware ID */
269: unsigned short version; /* firmaware version number */
270: unsigned short adapter[SFM_MAX_SDLA]; /* compatible adapter types */
271: unsigned long memsize; /* minimum memory size */
272: unsigned short reserved[2]; /* reserved */
273: unsigned short startoffs; /* entry point offset */
274: unsigned short winoffs; /* dual-port memory window offset */
275: unsigned short codeoffs; /* code load offset */
276: unsigned short codesize; /* code size */
277: unsigned short dataoffs; /* configuration data load offset */
278: unsigned short datasize; /* configuration data size */
279: } sfm_info_t;
280:
281: typedef struct sfm /* SDLA firmware file structire */
282: {
283: char signature[80]; /* SFM file signature */
284: unsigned short version; /* file format version */
285: unsigned short checksum; /* info + image */
286: unsigned short reserved[6]; /* reserved */
287: char descr[SFM_DESCR_LEN]; /* description string */
288: sfm_info_t info; /* firmware module info */
289: unsigned char image[1]; /* code image (variable size) */
290: } sfm_t;
291:
292:
293: typedef struct sdla_hw_type_cnt
294: {
295: unsigned char AFT_adapters;
296: }sdla_hw_type_cnt_t;
297:
298: /****** Function Prototypes *************************************************/
299: extern int san_dev_attach(void*, u_int8_t*, int);
300:
301: /* Hardware interface function */
302: extern int sdladrv_init(void);
303: extern int sdladrv_exit(void);
304: extern int sdla_get_hw_devices(void);
305: extern void *sdla_get_hw_adptr_cnt(void);
306:
307: extern int sdla_setup (void*);
308: extern int sdla_down (void*);
309: extern int sdla_read_int_stat (void*, u_int32_t*);
310: extern int sdla_check_mismatch(void*, unsigned char);
311: extern int sdla_cmd (void*, unsigned long, wan_mbox_t*);
312: extern int sdla_getcfg(void*, int, void*);
313: extern int sdla_bus_write_1(void*, unsigned int, u_int8_t);
314: extern int sdla_bus_write_2(void*, unsigned int, u_int16_t);
315: extern int sdla_bus_write_4(void*, unsigned int, u_int32_t);
316: extern int sdla_bus_read_1(void*, unsigned int, u_int8_t*);
317: extern int sdla_bus_read_2(void*, unsigned int, u_int16_t*);
318: extern int sdla_bus_read_4(void*, unsigned int, u_int32_t*);
319: extern int sdla_peek (void*, unsigned long, void*, unsigned);
320: extern int sdla_poke (void*, unsigned long, void*, unsigned);
321: extern int sdla_poke_byte (void*, unsigned long, u_int8_t);
322: extern int sdla_set_bit (void*, unsigned long, u_int8_t);
323: extern int sdla_clear_bit (void*, unsigned long, u_int8_t);
324: extern int sdla_intr_establish(void*, int(*intr_func)(void*), void*);
325: extern int sdla_intr_disestablish(void*);
326: extern int sdla_get_hwprobe(void*, void**);
327: extern int sdla_get_hwcard(void*, void**);
328: extern int sdla_is_te1(void*);
329:
330: #endif
331:
332: #undef EXTERN
333: #endif /* __IF_SANDRV_H */
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