Annotation of sys/dev/pci/if_ixgb.h, Revision 1.1.1.1
1.1 nbrk 1: /**************************************************************************
2:
3: Copyright (c) 2001-2005, Intel Corporation
4: All rights reserved.
5:
6: Redistribution and use in source and binary forms, with or without
7: modification, are permitted provided that the following conditions are met:
8:
9: 1. Redistributions of source code must retain the above copyright notice,
10: this list of conditions and the following disclaimer.
11:
12: 2. Redistributions in binary form must reproduce the above copyright
13: notice, this list of conditions and the following disclaimer in the
14: documentation and/or other materials provided with the distribution.
15:
16: 3. Neither the name of the Intel Corporation nor the names of its
17: contributors may be used to endorse or promote products derived from
18: this software without specific prior written permission.
19:
20: THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21: AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22: IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23: ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24: LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25: CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26: SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27: INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28: CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29: ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30: POSSIBILITY OF SUCH DAMAGE.
31:
32: ***************************************************************************/
33:
34: /* $OpenBSD: if_ixgb.h,v 1.10 2006/11/28 04:45:08 brad Exp $ */
35:
36: #ifndef _IXGB_H_DEFINED_
37: #define _IXGB_H_DEFINED_
38:
39: #include "bpfilter.h"
40: #include "vlan.h"
41:
42: #include <sys/param.h>
43: #include <sys/systm.h>
44: #include <sys/sockio.h>
45: #include <sys/mbuf.h>
46: #include <sys/malloc.h>
47: #include <sys/kernel.h>
48: #include <sys/device.h>
49: #include <sys/socket.h>
50:
51: #include <net/if.h>
52: #include <net/if_dl.h>
53: #include <net/if_media.h>
54:
55: #ifdef INET
56: #include <netinet/in.h>
57: #include <netinet/in_systm.h>
58: #include <netinet/in_var.h>
59: #include <netinet/ip.h>
60: #include <netinet/if_ether.h>
61: #include <netinet/tcp.h>
62: #include <netinet/udp.h>
63: #endif
64:
65: #if NVLAN > 0
66: #include <net/if_types.h>
67: #include <net/if_vlan_var.h>
68: #endif
69:
70: #if NBPFILTER > 0
71: #include <net/bpf.h>
72: #endif
73:
74: #include <uvm/uvm_extern.h>
75:
76: #include <dev/pci/pcireg.h>
77: #include <dev/pci/pcivar.h>
78: #include <dev/pci/pcidevs.h>
79:
80: #include <dev/pci/ixgb_hw.h>
81: #include <dev/pci/ixgb_ee.h>
82: #include <dev/pci/ixgb_ids.h>
83:
84: /* Tunables */
85:
86: /*
87: * TxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the
88: * number of transmit descriptors allocated by the driver. Increasing this
89: * value allows the driver to queue more transmits. Each descriptor is 16
90: * bytes.
91: */
92: #define IXGB_MAX_TXD 2048
93:
94: /*
95: * RxDescriptors Valid Range: 64-4096 Default Value: 1024 This value is the
96: * number of receive descriptors allocated by the driver. Increasing this
97: * value allows the driver to buffer more incoming packets. Each descriptor
98: * is 16 bytes. A receive buffer is also allocated for each descriptor. The
99: * maximum MTU size is 16110.
100: */
101: #define IXGB_MAX_RXD 1024
102:
103: /*
104: * TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value
105: * delays the generation of transmit interrupts in units of 1.024
106: * microseconds. Transmit interrupt reduction can improve CPU efficiency if
107: * properly tuned for specific network traffic. If the system is reporting
108: * dropped transmits, this value may be set too high causing the driver to
109: * run out of available transmit descriptors.
110: */
111: #define TIDV 32
112:
113: /*
114: * RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value
115: * delays the generation of receive interrupts in units of 1.024
116: * microseconds. Receive interrupt reduction can improve CPU efficiency if
117: * properly tuned for specific network traffic. Increasing this value adds
118: * extra latency to frame reception and can end up decreasing the throughput
119: * of TCP traffic. If the system is reporting dropped receives, this value
120: * may be set too high, causing the driver to run out of available receive
121: * descriptors.
122: */
123: #define RDTR 72
124:
125: /*
126: * This parameter controls the duration of transmit watchdog timer.
127: */
128: #define IXGB_TX_TIMEOUT 5 /* set to 5 seconds */
129:
130: /*
131: * This parameter controls when the driver calls the routine to reclaim
132: * transmit descriptors.
133: */
134: #define IXGB_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8)
135:
136: /*
137: * Flow Control Types.
138: * 1. ixgb_fc_none - Flow Control Disabled
139: * 2. ixgb_fc_rx_pause - Flow Control Receive Only
140: * 3. ixgb_fc_tx_pause - Flow Control Transmit Only
141: * 4. ixgb_fc_full - Flow Control Enabled
142: */
143: #define FLOW_CONTROL_NONE ixgb_fc_none
144: #define FLOW_CONTROL_RX_PAUSE ixgb_fc_rx_pause
145: #define FLOW_CONTROL_TX_PAUSE ixgb_fc_tx_pause
146: #define FLOW_CONTROL_FULL ixgb_fc_full
147:
148: /*
149: * Set the flow control type. Assign one of the above flow control types to be enabled.
150: * Default Value: FLOW_CONTROL_FULL
151: */
152: #define FLOW_CONTROL FLOW_CONTROL_FULL
153:
154: /*
155: * Receive Flow control low threshold (when we send a resume frame) (FCRTL)
156: * Valid Range: 64 - 262,136 (0x40 - 0x3FFF8, 8 byte granularity) must be
157: * less than high threshold by at least 8 bytes Default Value: 163,840
158: * (0x28000)
159: */
160: #define FCRTL 0x28000
161:
162: /*
163: * Receive Flow control high threshold (when we send a pause frame) (FCRTH)
164: * Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default
165: * Value: 196,608 (0x30000)
166: */
167: #define FCRTH 0x30000
168:
169: /*
170: * Flow control request timeout (how long to pause the link partner's tx)
171: * (PAP 15:0) Valid Range: 1 - 65535 Default Value: 256 (0x100)
172: */
173: #define FCPAUSE 0x100
174:
175: /* Tunables -- End */
176:
177: #define IXGB_MMBA 0x0010 /* Mem base address */
178: #define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
179:
180: #define MAX_NUM_MULTICAST_ADDRESSES 128
181:
182: /* Defines for printing debug information */
183: #define DEBUG_INIT 0
184: #define DEBUG_IOCTL 0
185: #define DEBUG_HW 0
186:
187: #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
188: #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
189: #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
190: #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
191: #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
192: #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
193: #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
194: #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
195: #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
196:
197: /* Supported RX Buffer Sizes */
198: #define IXGB_RXBUFFER_2048 2048
199: #define IXGB_RXBUFFER_4096 4096
200: #define IXGB_RXBUFFER_8192 8192
201: #define IXGB_RXBUFFER_16384 16384
202:
203: #define IXGB_MAX_SCATTER 100
204:
205: struct ixgb_buffer {
206: struct mbuf *m_head;
207: bus_dmamap_t map; /* bus_dma map for packet */
208: };
209:
210: /*
211: * Bus dma allocation structure used by
212: * ixgb_dma_malloc and ixgb_dma_free.
213: */
214: struct ixgb_dma_alloc {
215: bus_addr_t dma_paddr;
216: caddr_t dma_vaddr;
217: bus_dma_tag_t dma_tag;
218: bus_dmamap_t dma_map;
219: bus_dma_segment_t dma_seg;
220: bus_size_t dma_size;
221: int dma_nseg;
222: };
223:
224: typedef enum _XSUM_CONTEXT_T {
225: OFFLOAD_NONE,
226: OFFLOAD_TCP_IP,
227: OFFLOAD_UDP_IP
228: } XSUM_CONTEXT_T;
229:
230: /* Our adapter structure */
231: struct ixgb_softc {
232: struct device sc_dv;
233: struct arpcom interface_data;
234: struct ixgb_hw hw;
235:
236: /* OpenBSD operating-system-specific structures */
237: struct ixgb_osdep osdep;
238: struct ifmedia media;
239: int io_rid;
240:
241: void *sc_intrhand;
242: struct timeout ixgb_intr_enable;
243: struct timeout timer_handle;
244: int if_flags;
245: void *sc_powerhook;
246: void *sc_shutdownhook;
247:
248: /* Info about the board itself */
249: u_int32_t part_num;
250: u_int8_t link_active;
251: u_int16_t link_speed;
252: u_int16_t link_duplex;
253: u_int32_t tx_int_delay;
254: u_int32_t tx_abs_int_delay;
255: u_int32_t rx_int_delay;
256: u_int32_t rx_abs_int_delay;
257:
258: int raidc;
259:
260: XSUM_CONTEXT_T active_checksum_context;
261:
262: /*
263: * Transmit definitions
264: *
265: * We have an array of num_tx_desc descriptors (handled by the
266: * controller) paired with an array of tx_buffers (at
267: * tx_buffer_area). The index of the next available descriptor is
268: * next_avail_tx_desc. The number of remaining tx_desc is
269: * num_tx_desc_avail.
270: */
271: struct ixgb_dma_alloc txdma; /* bus_dma glue for tx desc */
272: struct ixgb_tx_desc *tx_desc_base;
273: u_int32_t next_avail_tx_desc;
274: u_int32_t oldest_used_tx_desc;
275: volatile u_int16_t num_tx_desc_avail;
276: u_int16_t num_tx_desc;
277: u_int32_t txd_cmd;
278: struct ixgb_buffer *tx_buffer_area;
279: bus_dma_tag_t txtag; /* dma tag for tx */
280:
281: /*
282: * Receive definitions
283: *
284: * we have an array of num_rx_desc rx_desc (handled by the controller),
285: * and paired with an array of rx_buffers (at rx_buffer_area). The
286: * next pair to check on receive is at offset next_rx_desc_to_check
287: */
288: struct ixgb_dma_alloc rxdma; /* bus_dma glue for rx desc */
289: struct ixgb_rx_desc *rx_desc_base;
290: u_int32_t next_rx_desc_to_check;
291: u_int16_t num_rx_desc;
292: u_int32_t rx_buffer_len;
293: struct ixgb_buffer *rx_buffer_area;
294: bus_dma_tag_t rxtag; /* dma tag for Rx */
295: u_int32_t next_rx_desc_to_use;
296:
297: /*
298: * First/last mbuf pointers, for
299: * collecting multisegment RX packets.
300: */
301: struct mbuf *fmp;
302: struct mbuf *lmp;
303:
304: /* Misc stats maintained by the driver */
305: unsigned long dropped_pkts;
306: unsigned long mbuf_alloc_failed;
307: unsigned long mbuf_cluster_failed;
308: unsigned long no_tx_desc_avail1;
309: unsigned long no_tx_desc_avail2;
310: unsigned long no_tx_map_avail;
311: unsigned long no_tx_dma_setup;
312: unsigned long watchdog_events;
313:
314: struct ixgb_hw_stats stats;
315: };
316:
317: #endif /* _IXGB_H_DEFINED_ */
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