Annotation of sys/dev/pci/if_atw_pci.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: if_atw_pci.c,v 1.7 2005/09/08 12:44:55 jsg Exp $ */
2: /* $NetBSD: if_atw_pci.c,v 1.7 2004/07/23 07:07:55 dyoung Exp $ */
3:
4: /*-
5: * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center; Charles M. Hannum; and David Young.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: /*
42: * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip.
43: *
44: * Derived from the ``Tulip'' PCI bus front-end.
45: */
46:
47: #include <sys/param.h>
48: #include <sys/systm.h>
49: #include <sys/mbuf.h>
50: #include <sys/malloc.h>
51: #include <sys/kernel.h>
52: #include <sys/socket.h>
53: #include <sys/ioctl.h>
54: #include <sys/errno.h>
55: #include <sys/device.h>
56:
57: #include <machine/endian.h>
58:
59: #include <net/if.h>
60: #include <net/if_dl.h>
61: #include <net/if_media.h>
62: #ifdef INET
63: #include <netinet/in.h>
64: #include <netinet/if_ether.h>
65: #endif
66:
67: #include <net80211/ieee80211_radiotap.h>
68: #include <net80211/ieee80211_var.h>
69:
70: #include <machine/bus.h>
71: #include <machine/intr.h>
72:
73: #include <dev/ic/atwreg.h>
74: #include <dev/ic/rf3000reg.h>
75: #include <dev/ic/si4136reg.h>
76: #include <dev/ic/atwvar.h>
77:
78: #include <dev/pci/pcivar.h>
79: #include <dev/pci/pcireg.h>
80: #include <dev/pci/pcidevs.h>
81:
82: /*
83: * PCI configuration space registers used by the ADM8211.
84: */
85: #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
86: #define ATW_PCI_MMBA 0x14 /* memory mapped base */
87:
88: struct atw_pci_softc {
89: struct atw_softc psc_atw; /* real ADM8211 softc */
90:
91: pci_intr_handle_t psc_ih; /* interrupt handle */
92: void *psc_intrcookie;
93:
94: pci_chipset_tag_t psc_pc; /* our PCI chipset */
95: pcitag_t psc_pcitag; /* our PCI tag */
96: };
97:
98: int atw_pci_match(struct device *, void *, void *);
99: void atw_pci_attach(struct device *, struct device *, void *);
100:
101: struct cfattach atw_pci_ca = {
102: sizeof (struct atw_softc), atw_pci_match, atw_pci_attach
103: };
104:
105: const struct pci_matchid atw_pci_devices[] = {
106: { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211 },
107: };
108:
109: int
110: atw_pci_match(struct device *parent, void *match, void *aux)
111: {
112: return (pci_matchbyid((struct pci_attach_args *)aux, atw_pci_devices,
113: sizeof(atw_pci_devices)/sizeof(atw_pci_devices[0])));
114: }
115:
116: static int
117: atw_pci_enable(struct atw_softc *sc)
118: {
119: struct atw_pci_softc *psc = (void *)sc;
120:
121: /* Establish the interrupt. */
122: psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih,
123: IPL_NET, atw_intr, sc, sc->sc_dev.dv_xname);
124: if (psc->psc_intrcookie == NULL) {
125: printf("%s: unable to establish interrupt\n",
126: sc->sc_dev.dv_xname);
127: return (1);
128: }
129:
130: return (0);
131: }
132:
133: static void
134: atw_pci_disable(struct atw_softc *sc)
135: {
136: struct atw_pci_softc *psc = (void *)sc;
137:
138: /* Unhook the interrupt handler. */
139: pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie);
140: psc->psc_intrcookie = NULL;
141: }
142:
143: void
144: atw_pci_attach(struct device *parent, struct device *self, void *aux)
145: {
146: struct atw_pci_softc *psc = (void *) self;
147: struct atw_softc *sc = &psc->psc_atw;
148: struct pci_attach_args *pa = aux;
149: pci_chipset_tag_t pc = pa->pa_pc;
150: const char *intrstr = NULL;
151: bus_space_tag_t iot, memt;
152: bus_space_handle_t ioh, memh;
153: int ioh_valid, memh_valid;
154: pcireg_t reg;
155: int pmreg;
156:
157: psc->psc_pc = pa->pa_pc;
158: psc->psc_pcitag = pa->pa_tag;
159:
160: /*
161: * No power management hooks.
162: * XXX Maybe we should add some!
163: */
164: sc->sc_flags |= ATWF_ENABLED;
165:
166: /*
167: * Get revision info, and set some chip-specific variables.
168: */
169: sc->sc_rev = PCI_REVISION(pa->pa_class);
170:
171: /*
172: * Check to see if the device is in power-save mode, and
173: * being it out if necessary.
174: *
175: * XXX This code comes almost verbatim from if_tlp_pci.c. I do
176: * not understand it. Tulip clears the "sleep mode" bit in the
177: * CFDA register, first. There is an equivalent (?) register at the
178: * same place in the ADM8211, but the docs do not assign its bits
179: * any meanings. -dcy
180: */
181: if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
182: reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
183: switch (reg & PCI_PMCSR_STATE_MASK) {
184: case PCI_PMCSR_STATE_D1:
185: case PCI_PMCSR_STATE_D2:
186: printf(": waking up from power state D%d\n%s",
187: reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
188: pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
189: (reg & ~PCI_PMCSR_STATE_MASK) |
190: PCI_PMCSR_STATE_D0);
191: break;
192: case PCI_PMCSR_STATE_D3:
193: /*
194: * The card has lost all configuration data in
195: * this state, so punt.
196: */
197: printf(": unable to wake up from power state D3, "
198: "reboot required.\n");
199: pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
200: (reg & ~PCI_PMCSR_STATE_MASK) |
201: PCI_PMCSR_STATE_D0);
202: return;
203: }
204: }
205:
206: /*
207: * Map the device.
208: */
209: ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA,
210: PCI_MAPREG_TYPE_IO, 0,
211: &iot, &ioh, NULL, NULL, 0) == 0);
212: memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA,
213: PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
214: &memt, &memh, NULL, NULL, 0) == 0);
215:
216: if (memh_valid) {
217: sc->sc_st = memt;
218: sc->sc_sh = memh;
219: } else if (ioh_valid) {
220: sc->sc_st = iot;
221: sc->sc_sh = ioh;
222: } else {
223: printf(": unable to map device registers\n");
224: return;
225: }
226:
227: sc->sc_dmat = pa->pa_dmat;
228:
229: /*
230: * Get the cacheline size.
231: */
232: sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
233: PCI_BHLC_REG));
234:
235: /*
236: * Get PCI data moving command info.
237: */
238: if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */
239: sc->sc_flags |= ATWF_MRL;
240: if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */
241: sc->sc_flags |= ATWF_MRM;
242: if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */
243: sc->sc_flags |= ATWF_MWI;
244:
245: /*
246: * Map and establish our interrupt.
247: */
248: if (pci_intr_map(pa, &psc->psc_ih)) {
249: printf(": unable to map interrupt\n");
250: return;
251: }
252: intrstr = pci_intr_string(pc, psc->psc_ih);
253: psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET,
254: atw_intr, sc, sc->sc_dev.dv_xname);
255: if (psc->psc_intrcookie == NULL) {
256: printf(": unable to establish interrupt");
257: if (intrstr != NULL)
258: printf(" at %s", intrstr);
259: printf("\n");
260: return;
261: }
262:
263: printf(": %s\n", intrstr);
264:
265: sc->sc_enable = atw_pci_enable;
266: sc->sc_disable = atw_pci_disable;
267:
268: /*
269: * Finish off the attach.
270: */
271: atw_attach(sc);
272: }
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