Annotation of sys/dev/pci/bktr/bktr_reg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: bktr_reg.h,v 1.10 2007/06/11 08:10:22 robert Exp $ */
2: /*
3: * $FreeBSD: src/sys/dev/bktr/bktr_reg.h,v 1.42 2000/10/31 13:09:56 roger Exp $
4: *
5: * Copyright (c) 1999 Roger Hardiman
6: * Copyright (c) 1998 Amancio Hasty
7: * Copyright (c) 1995 Mark Tinguely and Jim Lowe
8: * All rights reserved.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by Mark Tinguely and Jim Lowe
21: * 4. The name of the author may not be used to endorse or promote products
22: * derived from this software without specific prior written permission.
23: *
24: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
28: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
32: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
33: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34: * POSSIBILITY OF SUCH DAMAGE.
35: *
36: */
37:
38: #include <machine/bus.h> /* struct device */
39: #include <sys/device.h>
40: #include <sys/selinfo.h> /* struct selinfo */
41:
42: #ifdef DEBUG
43: # define bootverbose 1
44: #else
45: # define bootverbose 0
46: #endif
47:
48: /*
49: * The kernel options for the driver now all begin with BKTR.
50: * Support the older kernel options on OpenBSD.
51: *
52: */
53: #if defined(BROOKTREE_ALLOC_PAGES)
54: #define BKTR_ALLOC_PAGES BROOKTREE_ALLOC_PAGES
55: #endif
56:
57: #if defined(BROOKTREE_SYSTEM_DEFAULT)
58: #define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT
59: #endif
60:
61: #if defined(OVERRIDE_CARD)
62: #define BKTR_OVERRIDE_CARD OVERRIDE_CARD
63: #endif
64:
65: #if defined(OVERRIDE_TUNER)
66: #define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER
67: #endif
68:
69: #if defined(OVERRIDE_DBX)
70: #define BKTR_OVERRIDE_DBX OVERRIDE_DBX
71: #endif
72:
73: #if defined(OVERRIDE_MSP)
74: #define BKTR_OVERRIDE_MSP OVERRIDE_MSP
75: #endif
76:
77: #ifndef PCI_LATENCY_TIMER
78: #define PCI_LATENCY_TIMER 0x0c /* pci timer register */
79: #endif
80:
81: /*
82: * Definitions for the Brooktree 848/878 video capture to pci interface.
83: */
84: #include <dev/pci/pcivar.h>
85:
86: /* PCI vendor ID */
87: #define PCI_VENDOR_BROOKTREE 0x109e /* Brooktree */
88: /* Brooktree products */
89: #define PCI_PRODUCT_BROOKTREE_BT848 0x0350 /* Bt848 Video Capture */
90: #define PCI_PRODUCT_BROOKTREE_BT849 0x0351 /* Bt849 Video Capture */
91: #define PCI_PRODUCT_BROOKTREE_BT878 0x036e /* Bt878 Video Capture */
92: #define PCI_PRODUCT_BROOKTREE_BT879 0x036f /* Bt879 Video Capture */
93:
94: #define BROOKTREE_848 1
95: #define BROOKTREE_848A 2
96: #define BROOKTREE_849A 3
97: #define BROOKTREE_878 4
98: #define BROOKTREE_879 5
99:
100: typedef volatile u_int bregister_t;
101: /*
102: * if other persuasion endian, then compiler will probably require that
103: * these next
104: * macros be reversed
105: */
106: #define BTBYTE(what) bregister_t what:8; int :24
107: #define BTWORD(what) bregister_t what:16; int: 16
108: #define BTLONG(what) bregister_t what:32
109:
110: struct bt848_registers {
111: BTBYTE (dstatus); /* 0, 1,2,3 */
112: #define BT848_DSTATUS_PRES (1<<7)
113: #define BT848_DSTATUS_HLOC (1<<6)
114: #define BT848_DSTATUS_FIELD (1<<5)
115: #define BT848_DSTATUS_NUML (1<<4)
116: #define BT848_DSTATUS_CSEL (1<<3)
117: #define BT848_DSTATUS_PLOCK (1<<2)
118: #define BT848_DSTATUS_LOF (1<<1)
119: #define BT848_DSTATUS_COF (1<<0)
120: BTBYTE (iform); /* 4, 5,6,7 */
121: #define BT848_IFORM_MUXSEL (0x3<<5)
122: # define BT848_IFORM_M_MUX1 (0x03<<5)
123: # define BT848_IFORM_M_MUX0 (0x02<<5)
124: # define BT848_IFORM_M_MUX2 (0x01<<5)
125: # define BT848_IFORM_M_MUX3 (0x0)
126: # define BT848_IFORM_M_RSVD (0x00<<5)
127: #define BT848_IFORM_XTSEL (0x3<<3)
128: # define BT848_IFORM_X_AUTO (0x03<<3)
129: # define BT848_IFORM_X_XT1 (0x02<<3)
130: # define BT848_IFORM_X_XT0 (0x01<<3)
131: # define BT848_IFORM_X_RSVD (0x00<<3)
132: BTBYTE (tdec); /* 8, 9,a,b */
133: BTBYTE (e_crop); /* c, d,e,f */
134: BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */
135: BTBYTE (e_vactive_lo); /* 14, 15,16,17 */
136: BTBYTE (e_delay_lo); /* 18, 19,1a,1b */
137: BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */
138: BTBYTE (e_hscale_hi); /* 20, 21,22,23 */
139: BTBYTE (e_hscale_lo); /* 24, 25,26,27 */
140: BTBYTE (bright); /* 28, 29,2a,2b */
141: BTBYTE (e_control); /* 2c, 2d,2e,2f */
142: #define BT848_E_CONTROL_LNOTCH (1<<7)
143: #define BT848_E_CONTROL_COMP (1<<6)
144: #define BT848_E_CONTROL_LDEC (1<<5)
145: #define BT848_E_CONTROL_CBSENSE (1<<4)
146: #define BT848_E_CONTROL_RSVD (1<<3)
147: #define BT848_E_CONTROL_CON_MSB (1<<2)
148: #define BT848_E_CONTROL_SAT_U_MSB (1<<1)
149: #define BT848_E_CONTROL_SAT_V_MSB (1<<0)
150: BTBYTE (contrast_lo); /* 30, 31,32,33 */
151: BTBYTE (sat_u_lo); /* 34, 35,36,37 */
152: BTBYTE (sat_v_lo); /* 38, 39,3a,3b */
153: BTBYTE (hue); /* 3c, 3d,3e,3f */
154: BTBYTE (e_scloop); /* 40, 41,42,43 */
155: #define BT848_E_SCLOOP_RSVD1 (1<<7)
156: #define BT848_E_SCLOOP_CAGC (1<<6)
157: #define BT848_E_SCLOOP_CKILL (1<<5)
158: #define BT848_E_SCLOOP_HFILT (0x3<<3)
159: # define BT848_E_SCLOOP_HFILT_ICON (0x3<<3)
160: # define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3)
161: # define BT848_E_SCLOOP_HFILT_CIF (0x1<<3)
162: # define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3)
163: #define BT848_E_SCLOOP_RSVD0 (0x7<<0)
164: int :32; /* 44, 45,46,47 */
165: BTBYTE (oform); /* 48, 49,4a,4b */
166: BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */
167: BTBYTE (e_vscale_lo); /* 50, 51,52,53 */
168: BTBYTE (test); /* 54, 55,56,57 */
169: int :32; /* 58, 59,5a,5b */
170: int :32; /* 5c, 5d,5e,5f */
171: BTLONG (adelay); /* 60, 61,62,63 */
172: BTBYTE (bdelay); /* 64, 65,66,67 */
173: BTBYTE (adc); /* 68, 69,6a,6b */
174: #define BT848_ADC_RESERVED (0x80) /* required pattern */
175: #define BT848_ADC_SYNC_T (1<<5)
176: #define BT848_ADC_AGC_EN (1<<4)
177: #define BT848_ADC_CLK_SLEEP (1<<3)
178: #define BT848_ADC_Y_SLEEP (1<<2)
179: #define BT848_ADC_C_SLEEP (1<<1)
180: #define BT848_ADC_CRUSH (1<<0)
181: BTBYTE (e_vtc); /* 6c, 6d,6e,6f */
182: int :32; /* 70, 71,72,73 */
183: int :32; /* 74, 75,76,77 */
184: int :32; /* 78, 79,7a,7b */
185: BTLONG (sreset); /* 7c, 7d,7e,7f */
186: u_char filler1[0x84-0x80];
187: BTBYTE (tgctrl); /* 84, 85,86,87 */
188: #define BT848_TGCTRL_TGCKI (3<<3)
189: #define BT848_TGCTRL_TGCKI_XTAL (0<<3)
190: #define BT848_TGCTRL_TGCKI_PLL (1<<3)
191: #define BT848_TGCTRL_TGCKI_GPCLK (2<<3)
192: #define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3)
193: u_char filler[0x8c-0x88];
194: BTBYTE (o_crop); /* 8c, 8d,8e,8f */
195: BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */
196: BTBYTE (o_vactive_lo); /* 94, 95,96,97 */
197: BTBYTE (o_delay_lo); /* 98, 99,9a,9b */
198: BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */
199: BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */
200: BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */
201: int :32; /* a8, a9,aa,ab */
202: BTBYTE (o_control); /* ac, ad,ae,af */
203: #define BT848_O_CONTROL_LNOTCH (1<<7)
204: #define BT848_O_CONTROL_COMP (1<<6)
205: #define BT848_O_CONTROL_LDEC (1<<5)
206: #define BT848_O_CONTROL_CBSENSE (1<<4)
207: #define BT848_O_CONTROL_RSVD (1<<3)
208: #define BT848_O_CONTROL_CON_MSB (1<<2)
209: #define BT848_O_CONTROL_SAT_U_MSB (1<<1)
210: #define BT848_O_CONTROL_SAT_V_MSB (1<<0)
211: u_char fillter4[16];
212: BTBYTE (o_scloop); /* c0, c1,c2,c3 */
213: #define BT848_O_SCLOOP_RSVD1 (1<<7)
214: #define BT848_O_SCLOOP_CAGC (1<<6)
215: #define BT848_O_SCLOOP_CKILL (1<<5)
216: #define BT848_O_SCLOOP_HFILT (0x3<<3)
217: #define BT848_O_SCLOOP_HFILT_ICON (0x3<<3)
218: #define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3)
219: #define BT848_O_SCLOOP_HFILT_CIF (0x1<<3)
220: #define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3)
221: #define BT848_O_SCLOOP_RSVD0 (0x7<<0)
222: int :32; /* c4, c5,c6,c7 */
223: int :32; /* c8, c9,ca,cb */
224: BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */
225: BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */
226: BTBYTE (color_fmt); /* d4, d5,d6,d7 */
227: bregister_t color_ctl_swap :4; /* d8 */
228: #define BT848_COLOR_CTL_WSWAP_ODD (1<<3)
229: #define BT848_COLOR_CTL_WSWAP_EVEN (1<<2)
230: #define BT848_COLOR_CTL_BSWAP_ODD (1<<1)
231: #define BT848_COLOR_CTL_BSWAP_EVEN (1<<0)
232: bregister_t color_ctl_gamma :1;
233: bregister_t color_ctl_rgb_ded :1;
234: bregister_t color_ctl_color_bars :1;
235: bregister_t color_ctl_ext_frmrate :1;
236: #define BT848_COLOR_CTL_GAMMA (1<<4)
237: #define BT848_COLOR_CTL_RGB_DED (1<<5)
238: #define BT848_COLOR_CTL_COLOR_BARS (1<<6)
239: #define BT848_COLOR_CTL_EXT_FRMRATE (1<<7)
240: int :24; /* d9,da,db */
241: BTBYTE (cap_ctl); /* dc, dd,de,df */
242: #define BT848_CAP_CTL_DITH_FRAME (1<<4)
243: #define BT848_CAP_CTL_VBI_ODD (1<<3)
244: #define BT848_CAP_CTL_VBI_EVEN (1<<2)
245: #define BT848_CAP_CTL_ODD (1<<1)
246: #define BT848_CAP_CTL_EVEN (1<<0)
247: BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */
248: BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */
249: int :32; /* e8, e9,ea,eb */
250: BTBYTE (o_vtc); /* ec, ed,ee,ef */
251: BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */
252: BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */
253: BTBYTE (pll_f_xci); /* f8, f9,fa,fb */
254: #define BT848_PLL_F_C (1<<6)
255: #define BT848_PLL_F_X (1<<7)
256: u_char filler2[0x100-0xfc];
257: BTLONG (int_stat); /* 100, 101,102,103 */
258: BTLONG (int_mask); /* 104, 105,106,107 */
259: #define BT848_INT_RISCS (0xf<<28)
260: #define BT848_INT_RISC_EN (1<<27)
261: #define BT848_INT_RACK (1<<25)
262: #define BT848_INT_FIELD (1<<24)
263: #define BT848_INT_MYSTERYBIT (1<<23)
264: #define BT848_INT_SCERR (1<<19)
265: #define BT848_INT_OCERR (1<<18)
266: #define BT848_INT_PABORT (1<<17)
267: #define BT848_INT_RIPERR (1<<16)
268: #define BT848_INT_PPERR (1<<15)
269: #define BT848_INT_FDSR (1<<14)
270: #define BT848_INT_FTRGT (1<<13)
271: #define BT848_INT_FBUS (1<<12)
272: #define BT848_INT_RISCI (1<<11)
273: #define BT848_INT_GPINT (1<<9)
274: #define BT848_INT_I2CDONE (1<<8)
275: #define BT848_INT_RSV1 (1<<7)
276: #define BT848_INT_RSV0 (1<<6)
277: #define BT848_INT_VPRES (1<<5)
278: #define BT848_INT_HLOCK (1<<4)
279: #define BT848_INT_OFLOW (1<<3)
280: #define BT848_INT_HSYNC (1<<2)
281: #define BT848_INT_VSYNC (1<<1)
282: #define BT848_INT_FMTCHG (1<<0)
283: #define BT848_INT_BITS \
284: ("\020\01FMTCHG\02VSYNC\03HSYNC\04OFLOW\05HLOCK\06VPRES\07RSV0"\
285: "\010RSV1\011I2CDONE\012GPINT\014RISCI\015FBUS\016FTRGT\017FDSR"\
286: "\020PPERR\021RIPERR\022PABORT\023OCERR\024SCERR"\
287: "\030MYSTERYBIT\031FIELD\032RACK\034RISC_EN")
288: int :32; /* 108, 109,10a,10b */
289: BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */
290: #define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */
291: #define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */
292: #define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */
293: #define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */
294: #define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */
295: #define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */
296: #define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */
297: #define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */
298: #define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */
299: #define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */
300: #define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */
301: #define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */
302: #define BT848_DMA_CTL_RISC_EN (1<<1)
303: #define BT848_DMA_CTL_FIFO_EN (1<<0)
304: BTLONG (i2c_data_ctl); /* 110, 111,112,113 */
305: #define BT848_DATA_CTL_I2CDIV (0xf<<4)
306: #define BT848_DATA_CTL_I2CSYNC (1<<3)
307: #define BT848_DATA_CTL_I2CW3B (1<<2)
308: #define BT848_DATA_CTL_I2CSCL (1<<1)
309: #define BT848_DATA_CTL_I2CSDA (1<<0)
310: BTLONG (risc_strt_add); /* 114, 115,116,117 */
311: BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */
312: BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */
313: BTLONG (risc_count); /* 120, 121,122,123 */
314: u_char filler3[0x200-0x124];
315: BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */
316: };
317:
318:
319: #define BKTR_DSTATUS 0x000
320: #define BKTR_IFORM 0x004
321: #define BKTR_TDEC 0x008
322: #define BKTR_E_CROP 0x00C
323: #define BKTR_O_CROP 0x08C
324: #define BKTR_E_VDELAY_LO 0x010
325: #define BKTR_O_VDELAY_LO 0x090
326: #define BKTR_E_VACTIVE_LO 0x014
327: #define BKTR_O_VACTIVE_LO 0x094
328: #define BKTR_E_DELAY_LO 0x018
329: #define BKTR_O_DELAY_LO 0x098
330: #define BKTR_E_HACTIVE_LO 0x01C
331: #define BKTR_O_HACTIVE_LO 0x09C
332: #define BKTR_E_HSCALE_HI 0x020
333: #define BKTR_O_HSCALE_HI 0x0A0
334: #define BKTR_E_HSCALE_LO 0x024
335: #define BKTR_O_HSCALE_LO 0x0A4
336: #define BKTR_BRIGHT 0x028
337: #define BKTR_E_CONTROL 0x02C
338: #define BKTR_O_CONTROL 0x0AC
339: #define BKTR_CONTRAST_LO 0x030
340: #define BKTR_SAT_U_LO 0x034
341: #define BKTR_SAT_V_LO 0x038
342: #define BKTR_HUE 0x03C
343: #define BKTR_E_SCLOOP 0x040
344: #define BKTR_O_SCLOOP 0x0C0
345: #define BKTR_OFORM 0x048
346: #define BKTR_E_VSCALE_HI 0x04C
347: #define BKTR_O_VSCALE_HI 0x0CC
348: #define BKTR_E_VSCALE_LO 0x050
349: #define BKTR_O_VSCALE_LO 0x0D0
350: #define BKTR_TEST 0x054
351: #define BKTR_ADELAY 0x060
352: #define BKTR_BDELAY 0x064
353: #define BKTR_ADC 0x068
354: #define BKTR_E_VTC 0x06C
355: #define BKTR_O_VTC 0x0EC
356: #define BKTR_SRESET 0x07C
357: #define BKTR_COLOR_FMT 0x0D4
358: #define BKTR_COLOR_CTL 0x0D8
359: #define BKTR_CAP_CTL 0x0DC
360: #define BKTR_VBI_PACK_SIZE 0x0E0
361: #define BKTR_VBI_PACK_DEL 0x0E4
362: #define BKTR_INT_STAT 0x100
363: #define BKTR_INT_MASK 0x104
364: #define BKTR_RISC_COUNT 0x120
365: #define BKTR_RISC_STRT_ADD 0x114
366: #define BKTR_GPIO_DMA_CTL 0x10C
367: #define BKTR_GPIO_OUT_EN 0x118
368: #define BKTR_GPIO_REG_INP 0x11C
369: #define BKTR_GPIO_DATA 0x200
370: #define BKTR_I2C_DATA_CTL 0x110
371: #define BKTR_TGCTRL 0x084
372: #define BKTR_PLL_F_LO 0x0F0
373: #define BKTR_PLL_F_HI 0x0F4
374: #define BKTR_PLL_F_XCI 0x0F8
375:
376: /*
377: * device support for onboard tv tuners
378: */
379:
380: /* description of the LOGICAL tuner */
381: struct TVTUNER {
382: int frequency;
383: u_char chnlset;
384: u_char channel;
385: u_char band;
386: u_char afc;
387: u_char radio_mode; /* current mode of the radio mode */
388: int tuner_mode; /* current tuning mode */
389: #define BT848_TUNER_MODE_TV 1
390: #define BT848_TUNER_MODE_RADIO 2
391: };
392:
393: /* description of the PHYSICAL tuner */
394: struct TUNER {
395: char *name;
396: u_char type;
397: u_char pllControl[4];
398: u_char bandLimits[ 2 ];
399: u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV
400: ** bands. Last for radio
401: ** band (0x00=NoRadio).
402: */
403:
404: };
405:
406: /* description of the card */
407: #define EEPROMBLOCKSIZE 32
408: struct CARDTYPE {
409: unsigned int card_id; /* card id (from #define's) */
410: char *name;
411: const struct TUNER* tuner; /* Tuner details */
412: u_char tuner_pllAddr; /* Tuner i2c address */
413: u_char dbx; /* Has DBX chip? */
414: u_char msp3400c; /* Has msp3400c chip? */
415: u_char dpl3518a; /* Has dpl3518a chip? */
416: u_char eepromAddr;
417: u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */
418: u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */
419: /* int/unused (radio) */
420: /* mute, present */
421: u_int gpio_mux_bits; /* GPIO mask for audio mux */
422: };
423:
424: struct format_params {
425: /* Total lines, lines before image, image lines */
426: int vtotal, vdelay, vactive;
427: /* Total unscaled horizontal pixels, pixels before image, image pixels */
428: int htotal, hdelay, hactive;
429: /* Scaled horizontal image pixels, Total Scaled horizontal pixels */
430: int scaled_hactive, scaled_htotal;
431: /* frame rate . for ntsc is 30 frames per second */
432: int frame_rate;
433: /* A-delay and B-delay */
434: u_char adelay, bdelay;
435: /* Iform XTSEL value */
436: int iform_xtsel;
437: /* VBI number of lines per field, and number of samples per line */
438: int vbi_num_lines, vbi_num_samples;
439: };
440:
441: /* Bt848/878 register access
442: * The registers can either be access via a memory mapped structure
443: * or accessed via bus_space.
444: * bus_0pace access allows cross platform support, where as the
445: * memory mapped structure method only works on 32 bit processors
446: * with the right type of endianness.
447: */
448: #define INB(sc,o) (({ \
449: u_int8_t __v; \
450: __v = bus_space_read_1((sc)->memt, (sc)->memh, (o)); \
451: bus_space_barrier((sc)->memt, (sc)->memh, (o), 1, \
452: BUS_SPACE_BARRIER_READ); \
453: (__v); \
454: }))
455: #define INW(sc,o) (({ \
456: u_int16_t __v; \
457: __v = bus_space_read_2((sc)->memt, (sc)->memh, (o)); \
458: bus_space_barrier((sc)->memt, (sc)->memh, (o), 4, \
459: BUS_SPACE_BARRIER_READ); \
460: (__v); \
461: }))
462: #define INL(sc,o) (({ \
463: u_int32_t __v; \
464: __v = bus_space_read_4((sc)->memt, (sc)->memh, (o)); \
465: bus_space_barrier((sc)->memt, (sc)->memh, (o), 4, \
466: BUS_SPACE_BARRIER_READ); \
467: (__v); \
468: }))
469: #define OUTB(sc,o,v) do { \
470: bus_space_write_1((sc)->memt, (sc)->memh, (o), (v)); \
471: bus_space_barrier((sc)->memt, (sc)->memh, (o), 1, \
472: BUS_SPACE_BARRIER_WRITE); \
473: } while (0)
474: #define OUTW(sc,o,v) do { \
475: bus_space_write_2((sc)->memt, (sc)->memh, (o), (v)); \
476: bus_space_barrier((sc)->memt, (sc)->memh, (o), 2, \
477: BUS_SPACE_BARRIER_WRITE); \
478: } while (0)
479: #define OUTL(sc,o,v) do { \
480: bus_space_write_4((sc)->memt, (sc)->memh, (o), (v)); \
481: bus_space_barrier((sc)->memt, (sc)->memh, (o), 4, \
482: BUS_SPACE_BARRIER_WRITE); \
483: } while (0)
484:
485: typedef struct bktr_clip bktr_clip_t;
486:
487: /*
488: * BrookTree 848 info structure, one per bt848 card installed.
489: */
490: struct bktr_softc {
491: struct device bktr_dev; /* base device */
492: bus_dma_tag_t dmat; /* DMA tag */
493: bus_space_tag_t memt;
494: bus_space_handle_t memh;
495: bus_size_t obmemsz; /* size of en card (bytes) */
496: void *ih;
497: bus_dmamap_t dm_prog;
498: bus_dmamap_t dm_oprog;
499: bus_dmamap_t dm_mem;
500: bus_dmamap_t dm_vbidata;
501: bus_dmamap_t dm_vbibuffer;
502:
503: vaddr_t bigbuf; /* buffer that holds the captured image */
504: vaddr_t vbidata; /* RISC program puts VBI data from the current frame here */
505: vaddr_t vbibuffer; /* Circular buffer holding VBI data for the user */
506: vaddr_t dma_prog; /* RISC prog for single and/or even field capture*/
507: vaddr_t odd_dma_prog; /* RISC program for Odd field capture */
508:
509: /* the following definitions are common over all platforms */
510: int alloc_pages; /* number of pages in bigbuf */
511: int vbiinsert; /* Position for next write into circular buffer */
512: int vbistart; /* Position of last read from circular buffer */
513: int vbisize; /* Number of bytes in the circular buffer */
514: u_int vbi_sequence_number; /* sequence number for VBI */
515: int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */
516: struct selinfo vbi_select; /* Data used by select() on /dev/vbi */
517:
518:
519: struct proc *proc; /* process to receive raised signal */
520: int signal; /* signal to send to process */
521: int clr_on_start; /* clear cap buf on capture start? */
522: #define METEOR_SIG_MODE_MASK 0xffff0000
523: #define METEOR_SIG_FIELD_MODE 0x00010000
524: #define METEOR_SIG_FRAME_MODE 0x00000000
525: char dma_prog_loaded;
526: struct meteor_mem *mem; /* used to control sync. multi-frame output */
527: u_int synch_wait; /* wait for free buffer before continuing */
528: short current; /* frame number in buffer (1-frames) */
529: short rows; /* number of rows in a frame */
530: short cols; /* number of columns in a frame */
531: int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */
532: int capture_area_y_offset; /* captured. The capture area allows for */
533: int capture_area_x_size; /* example 320x200 pixels from the centre */
534: int capture_area_y_size; /* of the video image to be captured. */
535: char capture_area_enabled; /* When TRUE use user's capture area. */
536: int pixfmt; /* active pixel format (idx into fmt tbl) */
537: int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */
538: u_int format; /* frame format rgb, yuv, etc.. */
539: short frames; /* number of frames allocated */
540: int frame_size; /* number of bytes in a frame */
541: u_int fifo_errors; /* number of fifo capture errors since open */
542: u_int dma_errors; /* number of DMA capture errors since open */
543: u_int frames_captured;/* number of frames captured since open */
544: u_int even_fields_captured; /* number of even fields captured */
545: u_int odd_fields_captured; /* number of odd fields captured */
546: u_int range_enable; /* enable range checking ?? */
547: u_short capcontrol; /* reg 0xdc capture control */
548: u_short bktr_cap_ctl;
549: volatile u_int flags;
550: #define METEOR_INITALIZED 0x00000001
551: #define METEOR_OPEN 0x00000002
552: #define METEOR_MMAP 0x00000004
553: #define METEOR_INTR 0x00000008
554: #define METEOR_READ 0x00000010 /* XXX never gets referenced */
555: #define METEOR_SINGLE 0x00000020 /* get single frame */
556: #define METEOR_CONTIN 0x00000040 /* continuously get frames */
557: #define METEOR_SYNCAP 0x00000080 /* synchronously get frames */
558: #define METEOR_CAP_MASK 0x000000f0
559: #define METEOR_NTSC 0x00000100
560: #define METEOR_PAL 0x00000200
561: #define METEOR_SECAM 0x00000400
562: #define BROOKTREE_NTSC 0x00000100 /* used in video open() and */
563: #define BROOKTREE_PAL 0x00000200 /* in the kernel config */
564: #define BROOKTREE_SECAM 0x00000400 /* file */
565: #define METEOR_AUTOMODE 0x00000800
566: #define METEOR_FORM_MASK 0x00000f00
567: #define METEOR_DEV0 0x00001000
568: #define METEOR_DEV1 0x00002000
569: #define METEOR_DEV2 0x00004000
570: #define METEOR_DEV3 0x00008000
571: #define METEOR_DEV_SVIDEO 0x00006000
572: #define METEOR_DEV_RGB 0x0000a000
573: #define METEOR_DEV_MASK 0x0000f000
574: #define METEOR_RGB16 0x00010000
575: #define METEOR_RGB24 0x00020000
576: #define METEOR_YUV_PACKED 0x00040000
577: #define METEOR_YUV_PLANAR 0x00080000
578: #define METEOR_WANT_EVEN 0x00100000 /* want even frame */
579: #define METEOR_WANT_ODD 0x00200000 /* want odd frame */
580: #define METEOR_WANT_MASK 0x00300000
581: #define METEOR_ONLY_EVEN_FIELDS 0x01000000
582: #define METEOR_ONLY_ODD_FIELDS 0x02000000
583: #define METEOR_ONLY_FIELDS_MASK 0x03000000
584: #define METEOR_YUV_422 0x04000000
585: #define METEOR_OUTPUT_FMT_MASK 0x040f0000
586: #define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */
587: #define METEOR_RGB 0x20000000 /* meteor rgb unit */
588: #define METEOR_FIELD_MODE 0x80000000
589: u_char tflags; /* Tuner flags (/dev/tuner) */
590: #define TUNER_INITALIZED 0x00000001
591: #define TUNER_OPEN 0x00000002
592: u_char vbiflags; /* VBI flags (/dev/vbi) */
593: #define VBI_INITALIZED 0x00000001
594: #define VBI_OPEN 0x00000002
595: #define VBI_CAPTURE 0x00000004
596: u_short fps; /* frames per second */
597: struct meteor_video video;
598: struct TVTUNER tuner;
599: struct CARDTYPE card;
600: u_char audio_mux_select; /* current mode of the audio */
601: u_char audio_mute_state; /* mute state of the audio */
602: u_char format_params;
603: u_int current_sol;
604: u_int current_col;
605: int clip_start;
606: int line_length;
607: int last_y;
608: int y;
609: int y2;
610: int yclip;
611: int yclip2;
612: int max_clip_node;
613: bktr_clip_t clip_list[100];
614: int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */
615: int bt848_tuner;
616: int bt848_card;
617: u_int id;
618: #define BT848_USE_XTALS 0
619: #define BT848_USE_PLL 1
620: int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */
621: int remote_control; /* remote control detected */
622: int remote_control_addr; /* remote control i2c address */
623: char msp_version_string[9]; /* MSP version string 34xxx-xx */
624: int msp_addr; /* MSP i2c address */
625: char dpl_version_string[9]; /* DPL version string 35xxx-xx */
626: int dpl_addr; /* DPL i2c address */
627: int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */
628: /* 1 = use slow MSP3410/3415 programming sequence */
629: /* 2 = use Tuner's Mono audio output via the MSP chip */
630: int msp_use_mono_source; /* use Tuner's Mono audio output via the MSP chip */
631: int audio_mux_present; /* 1 = has audio mux on GPIO lines, 0 = no audio mux */
632: int msp_source_selected; /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */
633:
634: };
635:
636: typedef struct bktr_softc bktr_reg_t;
637: typedef struct bktr_softc* bktr_ptr_t;
638:
639: #define Bt848_MAX_SIGN 16
640:
641: struct bt848_card_sig {
642: int card;
643: int tuner;
644: u_char signature[Bt848_MAX_SIGN];
645: };
646:
647:
648: /***********************************************************/
649: /* ioctl_cmd_t int on old versions, u_long on new versions */
650: /***********************************************************/
651: typedef u_long ioctl_cmd_t;
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