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Annotation of sys/dev/mii/qsphyreg.h, Revision 1.1

1.1     ! nbrk        1: /*     $OpenBSD: qsphyreg.h,v 1.3 2003/10/22 09:39:29 jmc Exp $        */
        !             2: /*     $NetBSD: qsphyreg.h,v 1.1 1998/08/11 00:01:03 thorpej Exp $     */
        !             3:
        !             4: /*-
        !             5:  * Copyright (c) 1998 The NetBSD Foundation, Inc.
        !             6:  * All rights reserved.
        !             7:  *
        !             8:  * This code is derived from software contributed to The NetBSD Foundation
        !             9:  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
        !            10:  * NASA Ames Research Center.
        !            11:  *
        !            12:  * Redistribution and use in source and binary forms, with or without
        !            13:  * modification, are permitted provided that the following conditions
        !            14:  * are met:
        !            15:  * 1. Redistributions of source code must retain the above copyright
        !            16:  *    notice, this list of conditions and the following disclaimer.
        !            17:  * 2. Redistributions in binary form must reproduce the above copyright
        !            18:  *    notice, this list of conditions and the following disclaimer in the
        !            19:  *    documentation and/or other materials provided with the distribution.
        !            20:  * 3. All advertising materials mentioning features or use of this software
        !            21:  *    must display the following acknowledgement:
        !            22:  *     This product includes software developed by the NetBSD
        !            23:  *     Foundation, Inc. and its contributors.
        !            24:  * 4. Neither the name of The NetBSD Foundation nor the names of its
        !            25:  *    contributors may be used to endorse or promote products derived
        !            26:  *    from this software without specific prior written permission.
        !            27:  *
        !            28:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
        !            29:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
        !            30:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
        !            31:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
        !            32:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
        !            33:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
        !            34:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
        !            35:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
        !            36:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
        !            37:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
        !            38:  * POSSIBILITY OF SUCH DAMAGE.
        !            39:  */
        !            40:
        !            41: #ifndef _DEV_MII_QSPHYREG_H_
        !            42: #define        _DEV_MII_QSPHYREG_H_
        !            43:
        !            44: /*
        !            45:  * Register definitions for the Quality Semiconductor QS6612
        !            46:  * Further documentation can be found at:
        !            47:  *     http://www.qualitysemi.com/products/network.html
        !            48:  */
        !            49:
        !            50: #define        MII_QSPHY_MCTL          0x11    /* Mode control */
        !            51: #define        MCTL_T4PRE              0x1000  /* 100baseT4 interface present */
        !            52: #define        MCTL_BTEXT              0x0800  /* reduce 10baseT squelch level */
        !            53: #define        MCTL_FACTTEST           0x0100  /* factory test mode */
        !            54: #define        MCTL_PHYADDRMASK        0x00f8  /* PHY address */
        !            55: #define        MCTL_FACTTEST2          0x0004  /* another factory test mode */
        !            56: #define        MCTL_NLPDIS             0x0002  /* disable link pulse tx */
        !            57: #define        MCTL_SQEDIS             0x0001  /* disable SQE */
        !            58:
        !            59: #define        MII_QSPHY_ISRC          0x1d    /* Interrupt source */
        !            60: #define        MII_QSPHY_IMASK         0x1e    /* Interrupt mask */
        !            61: #define        IMASK_TLINTR            0x8000  /* ThunderLAN interrupt mode */
        !            62: #define        IMASK_ANCPL             0x0040  /* autonegotiation complete */
        !            63: #define        IMASK_RFD               0x0020  /* remote fault detected */
        !            64: #define        IMASK_LD                0x0010  /* link down */
        !            65: #define        IMASK_ANLPA             0x0008  /* autonegotiation LP ACK */
        !            66: #define        IMASK_PDT               0x0004  /* parallel detection fault */
        !            67: #define        IMASK_ANPR              0x0002  /* autonegotiation page received */
        !            68: #define        IMASK_REF               0x0001  /* receive error counter full */
        !            69:
        !            70: #define        MII_QSPHY_PCTL          0x1f    /* PHY control */
        !            71: #define        PCTL_RXERDIS            0x2000  /* receive error counter disable */
        !            72: #define        PCTL_ANC                0x1000  /* autonegotiation complete */
        !            73: #define        PCTL_RLBEN              0x0200  /* remote loopback enable */
        !            74: #define        PCTL_DCREN              0x0100  /* DC restoration enable */
        !            75: #define        PCTL_4B5BEN             0x0040  /* 4b/5b encoding */
        !            76: #define        PCTL_PHYISO             0x0020  /* isolate PHY */
        !            77: #define        PCTL_OPMASK             0x001c  /* operation mode mask */
        !            78: #define        PCTL_AN                 0x0000  /* autonegotiation in-progress */
        !            79: #define        PCTL_10_T               0x0004  /* 10baseT */
        !            80: #define        PCTL_100_TX             0x0008  /* 100baseTX */
        !            81: #define        PCTL_100_T4             0x0010  /* 100baseT4 */
        !            82: #define        PCTL_10_T_FDX           0x0014  /* 10baseT-FDX */
        !            83: #define        PCTL_100_TX_FDX         0x0018  /* 100baseTX-FDX */
        !            84: #define        PCTL_MLT3DIS            0x0002  /* disable MLT3 */
        !            85: #define        PCTL_SRCDIS             0x0001  /* disable scrambling */
        !            86:
        !            87: #endif /* _DEV_MII_QSPHYREG_H_ */