Annotation of sys/dev/microcode/aic7xxx/aic7xxx_reg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: aic7xxx_reg.h,v 1.11 2006/12/23 21:15:58 krw Exp $ */
! 2: /*
! 3: * DO NOT EDIT - This file is automatically generated
! 4: * from the following source files:
! 5: *
! 6: * Id: aic7xxx.seq,v 1.19 2006/12/23 21:08:01 krw Exp
! 7: * Id: aic7xxx.reg,v 1.10 2004/08/01 01:36:23 krw Exp
! 8: */
! 9: typedef int (ahc_reg_print_t)(u_int, u_int *, u_int);
! 10: typedef struct ahc_reg_parse_entry {
! 11: char *name;
! 12: uint8_t value;
! 13: uint8_t mask;
! 14: } ahc_reg_parse_entry_t;
! 15:
! 16: #if AIC_DEBUG_REGISTERS
! 17: ahc_reg_print_t ahc_scsiseq_print;
! 18: #else
! 19: #define ahc_scsiseq_print(regvalue, cur_col, wrap) \
! 20: ahc_print_register(NULL, 0, "SCSISEQ", 0x00, regvalue, cur_col, wrap)
! 21: #endif
! 22:
! 23: #if AIC_DEBUG_REGISTERS
! 24: ahc_reg_print_t ahc_sxfrctl0_print;
! 25: #else
! 26: #define ahc_sxfrctl0_print(regvalue, cur_col, wrap) \
! 27: ahc_print_register(NULL, 0, "SXFRCTL0", 0x01, regvalue, cur_col, wrap)
! 28: #endif
! 29:
! 30: #if AIC_DEBUG_REGISTERS
! 31: ahc_reg_print_t ahc_sxfrctl1_print;
! 32: #else
! 33: #define ahc_sxfrctl1_print(regvalue, cur_col, wrap) \
! 34: ahc_print_register(NULL, 0, "SXFRCTL1", 0x02, regvalue, cur_col, wrap)
! 35: #endif
! 36:
! 37: #if AIC_DEBUG_REGISTERS
! 38: ahc_reg_print_t ahc_scsisigi_print;
! 39: #else
! 40: #define ahc_scsisigi_print(regvalue, cur_col, wrap) \
! 41: ahc_print_register(NULL, 0, "SCSISIGI", 0x03, regvalue, cur_col, wrap)
! 42: #endif
! 43:
! 44: #if AIC_DEBUG_REGISTERS
! 45: ahc_reg_print_t ahc_scsisigo_print;
! 46: #else
! 47: #define ahc_scsisigo_print(regvalue, cur_col, wrap) \
! 48: ahc_print_register(NULL, 0, "SCSISIGO", 0x03, regvalue, cur_col, wrap)
! 49: #endif
! 50:
! 51: #if AIC_DEBUG_REGISTERS
! 52: ahc_reg_print_t ahc_scsirate_print;
! 53: #else
! 54: #define ahc_scsirate_print(regvalue, cur_col, wrap) \
! 55: ahc_print_register(NULL, 0, "SCSIRATE", 0x04, regvalue, cur_col, wrap)
! 56: #endif
! 57:
! 58: #if AIC_DEBUG_REGISTERS
! 59: ahc_reg_print_t ahc_scsiid_print;
! 60: #else
! 61: #define ahc_scsiid_print(regvalue, cur_col, wrap) \
! 62: ahc_print_register(NULL, 0, "SCSIID", 0x05, regvalue, cur_col, wrap)
! 63: #endif
! 64:
! 65: #if AIC_DEBUG_REGISTERS
! 66: ahc_reg_print_t ahc_scsidatl_print;
! 67: #else
! 68: #define ahc_scsidatl_print(regvalue, cur_col, wrap) \
! 69: ahc_print_register(NULL, 0, "SCSIDATL", 0x06, regvalue, cur_col, wrap)
! 70: #endif
! 71:
! 72: #if AIC_DEBUG_REGISTERS
! 73: ahc_reg_print_t ahc_scsidath_print;
! 74: #else
! 75: #define ahc_scsidath_print(regvalue, cur_col, wrap) \
! 76: ahc_print_register(NULL, 0, "SCSIDATH", 0x07, regvalue, cur_col, wrap)
! 77: #endif
! 78:
! 79: #if AIC_DEBUG_REGISTERS
! 80: ahc_reg_print_t ahc_optionmode_print;
! 81: #else
! 82: #define ahc_optionmode_print(regvalue, cur_col, wrap) \
! 83: ahc_print_register(NULL, 0, "OPTIONMODE", 0x08, regvalue, cur_col, wrap)
! 84: #endif
! 85:
! 86: #if AIC_DEBUG_REGISTERS
! 87: ahc_reg_print_t ahc_stcnt_print;
! 88: #else
! 89: #define ahc_stcnt_print(regvalue, cur_col, wrap) \
! 90: ahc_print_register(NULL, 0, "STCNT", 0x08, regvalue, cur_col, wrap)
! 91: #endif
! 92:
! 93: #if AIC_DEBUG_REGISTERS
! 94: ahc_reg_print_t ahc_targcrccnt_print;
! 95: #else
! 96: #define ahc_targcrccnt_print(regvalue, cur_col, wrap) \
! 97: ahc_print_register(NULL, 0, "TARGCRCCNT", 0x0a, regvalue, cur_col, wrap)
! 98: #endif
! 99:
! 100: #if AIC_DEBUG_REGISTERS
! 101: ahc_reg_print_t ahc_clrsint0_print;
! 102: #else
! 103: #define ahc_clrsint0_print(regvalue, cur_col, wrap) \
! 104: ahc_print_register(NULL, 0, "CLRSINT0", 0x0b, regvalue, cur_col, wrap)
! 105: #endif
! 106:
! 107: #if AIC_DEBUG_REGISTERS
! 108: ahc_reg_print_t ahc_sstat0_print;
! 109: #else
! 110: #define ahc_sstat0_print(regvalue, cur_col, wrap) \
! 111: ahc_print_register(NULL, 0, "SSTAT0", 0x0b, regvalue, cur_col, wrap)
! 112: #endif
! 113:
! 114: #if AIC_DEBUG_REGISTERS
! 115: ahc_reg_print_t ahc_clrsint1_print;
! 116: #else
! 117: #define ahc_clrsint1_print(regvalue, cur_col, wrap) \
! 118: ahc_print_register(NULL, 0, "CLRSINT1", 0x0c, regvalue, cur_col, wrap)
! 119: #endif
! 120:
! 121: #if AIC_DEBUG_REGISTERS
! 122: ahc_reg_print_t ahc_sstat1_print;
! 123: #else
! 124: #define ahc_sstat1_print(regvalue, cur_col, wrap) \
! 125: ahc_print_register(NULL, 0, "SSTAT1", 0x0c, regvalue, cur_col, wrap)
! 126: #endif
! 127:
! 128: #if AIC_DEBUG_REGISTERS
! 129: ahc_reg_print_t ahc_sstat2_print;
! 130: #else
! 131: #define ahc_sstat2_print(regvalue, cur_col, wrap) \
! 132: ahc_print_register(NULL, 0, "SSTAT2", 0x0d, regvalue, cur_col, wrap)
! 133: #endif
! 134:
! 135: #if AIC_DEBUG_REGISTERS
! 136: ahc_reg_print_t ahc_sstat3_print;
! 137: #else
! 138: #define ahc_sstat3_print(regvalue, cur_col, wrap) \
! 139: ahc_print_register(NULL, 0, "SSTAT3", 0x0e, regvalue, cur_col, wrap)
! 140: #endif
! 141:
! 142: #if AIC_DEBUG_REGISTERS
! 143: ahc_reg_print_t ahc_scsiid_ultra2_print;
! 144: #else
! 145: #define ahc_scsiid_ultra2_print(regvalue, cur_col, wrap) \
! 146: ahc_print_register(NULL, 0, "SCSIID_ULTRA2", 0x0f, regvalue, cur_col, wrap)
! 147: #endif
! 148:
! 149: #if AIC_DEBUG_REGISTERS
! 150: ahc_reg_print_t ahc_simode0_print;
! 151: #else
! 152: #define ahc_simode0_print(regvalue, cur_col, wrap) \
! 153: ahc_print_register(NULL, 0, "SIMODE0", 0x10, regvalue, cur_col, wrap)
! 154: #endif
! 155:
! 156: #if AIC_DEBUG_REGISTERS
! 157: ahc_reg_print_t ahc_simode1_print;
! 158: #else
! 159: #define ahc_simode1_print(regvalue, cur_col, wrap) \
! 160: ahc_print_register(NULL, 0, "SIMODE1", 0x11, regvalue, cur_col, wrap)
! 161: #endif
! 162:
! 163: #if AIC_DEBUG_REGISTERS
! 164: ahc_reg_print_t ahc_scsibusl_print;
! 165: #else
! 166: #define ahc_scsibusl_print(regvalue, cur_col, wrap) \
! 167: ahc_print_register(NULL, 0, "SCSIBUSL", 0x12, regvalue, cur_col, wrap)
! 168: #endif
! 169:
! 170: #if AIC_DEBUG_REGISTERS
! 171: ahc_reg_print_t ahc_sxfrctl2_print;
! 172: #else
! 173: #define ahc_sxfrctl2_print(regvalue, cur_col, wrap) \
! 174: ahc_print_register(NULL, 0, "SXFRCTL2", 0x13, regvalue, cur_col, wrap)
! 175: #endif
! 176:
! 177: #if AIC_DEBUG_REGISTERS
! 178: ahc_reg_print_t ahc_scsibush_print;
! 179: #else
! 180: #define ahc_scsibush_print(regvalue, cur_col, wrap) \
! 181: ahc_print_register(NULL, 0, "SCSIBUSH", 0x13, regvalue, cur_col, wrap)
! 182: #endif
! 183:
! 184: #if AIC_DEBUG_REGISTERS
! 185: ahc_reg_print_t ahc_shaddr_print;
! 186: #else
! 187: #define ahc_shaddr_print(regvalue, cur_col, wrap) \
! 188: ahc_print_register(NULL, 0, "SHADDR", 0x14, regvalue, cur_col, wrap)
! 189: #endif
! 190:
! 191: #if AIC_DEBUG_REGISTERS
! 192: ahc_reg_print_t ahc_seltimer_print;
! 193: #else
! 194: #define ahc_seltimer_print(regvalue, cur_col, wrap) \
! 195: ahc_print_register(NULL, 0, "SELTIMER", 0x18, regvalue, cur_col, wrap)
! 196: #endif
! 197:
! 198: #if AIC_DEBUG_REGISTERS
! 199: ahc_reg_print_t ahc_selid_print;
! 200: #else
! 201: #define ahc_selid_print(regvalue, cur_col, wrap) \
! 202: ahc_print_register(NULL, 0, "SELID", 0x19, regvalue, cur_col, wrap)
! 203: #endif
! 204:
! 205: #if AIC_DEBUG_REGISTERS
! 206: ahc_reg_print_t ahc_scamctl_print;
! 207: #else
! 208: #define ahc_scamctl_print(regvalue, cur_col, wrap) \
! 209: ahc_print_register(NULL, 0, "SCAMCTL", 0x1a, regvalue, cur_col, wrap)
! 210: #endif
! 211:
! 212: #if AIC_DEBUG_REGISTERS
! 213: ahc_reg_print_t ahc_targid_print;
! 214: #else
! 215: #define ahc_targid_print(regvalue, cur_col, wrap) \
! 216: ahc_print_register(NULL, 0, "TARGID", 0x1b, regvalue, cur_col, wrap)
! 217: #endif
! 218:
! 219: #if AIC_DEBUG_REGISTERS
! 220: ahc_reg_print_t ahc_spiocap_print;
! 221: #else
! 222: #define ahc_spiocap_print(regvalue, cur_col, wrap) \
! 223: ahc_print_register(NULL, 0, "SPIOCAP", 0x1b, regvalue, cur_col, wrap)
! 224: #endif
! 225:
! 226: #if AIC_DEBUG_REGISTERS
! 227: ahc_reg_print_t ahc_brdctl_print;
! 228: #else
! 229: #define ahc_brdctl_print(regvalue, cur_col, wrap) \
! 230: ahc_print_register(NULL, 0, "BRDCTL", 0x1d, regvalue, cur_col, wrap)
! 231: #endif
! 232:
! 233: #if AIC_DEBUG_REGISTERS
! 234: ahc_reg_print_t ahc_seectl_print;
! 235: #else
! 236: #define ahc_seectl_print(regvalue, cur_col, wrap) \
! 237: ahc_print_register(NULL, 0, "SEECTL", 0x1e, regvalue, cur_col, wrap)
! 238: #endif
! 239:
! 240: #if AIC_DEBUG_REGISTERS
! 241: ahc_reg_print_t ahc_sblkctl_print;
! 242: #else
! 243: #define ahc_sblkctl_print(regvalue, cur_col, wrap) \
! 244: ahc_print_register(NULL, 0, "SBLKCTL", 0x1f, regvalue, cur_col, wrap)
! 245: #endif
! 246:
! 247: #if AIC_DEBUG_REGISTERS
! 248: ahc_reg_print_t ahc_busy_targets_print;
! 249: #else
! 250: #define ahc_busy_targets_print(regvalue, cur_col, wrap) \
! 251: ahc_print_register(NULL, 0, "BUSY_TARGETS", 0x20, regvalue, cur_col, wrap)
! 252: #endif
! 253:
! 254: #if AIC_DEBUG_REGISTERS
! 255: ahc_reg_print_t ahc_ultra_enb_print;
! 256: #else
! 257: #define ahc_ultra_enb_print(regvalue, cur_col, wrap) \
! 258: ahc_print_register(NULL, 0, "ULTRA_ENB", 0x30, regvalue, cur_col, wrap)
! 259: #endif
! 260:
! 261: #if AIC_DEBUG_REGISTERS
! 262: ahc_reg_print_t ahc_disc_dsb_print;
! 263: #else
! 264: #define ahc_disc_dsb_print(regvalue, cur_col, wrap) \
! 265: ahc_print_register(NULL, 0, "DISC_DSB", 0x32, regvalue, cur_col, wrap)
! 266: #endif
! 267:
! 268: #if AIC_DEBUG_REGISTERS
! 269: ahc_reg_print_t ahc_cmdsize_table_tail_print;
! 270: #else
! 271: #define ahc_cmdsize_table_tail_print(regvalue, cur_col, wrap) \
! 272: ahc_print_register(NULL, 0, "CMDSIZE_TABLE_TAIL", 0x34, regvalue, cur_col, wrap)
! 273: #endif
! 274:
! 275: #if AIC_DEBUG_REGISTERS
! 276: ahc_reg_print_t ahc_mwi_residual_print;
! 277: #else
! 278: #define ahc_mwi_residual_print(regvalue, cur_col, wrap) \
! 279: ahc_print_register(NULL, 0, "MWI_RESIDUAL", 0x38, regvalue, cur_col, wrap)
! 280: #endif
! 281:
! 282: #if AIC_DEBUG_REGISTERS
! 283: ahc_reg_print_t ahc_next_queued_scb_print;
! 284: #else
! 285: #define ahc_next_queued_scb_print(regvalue, cur_col, wrap) \
! 286: ahc_print_register(NULL, 0, "NEXT_QUEUED_SCB", 0x39, regvalue, cur_col, wrap)
! 287: #endif
! 288:
! 289: #if AIC_DEBUG_REGISTERS
! 290: ahc_reg_print_t ahc_msg_out_print;
! 291: #else
! 292: #define ahc_msg_out_print(regvalue, cur_col, wrap) \
! 293: ahc_print_register(NULL, 0, "MSG_OUT", 0x3a, regvalue, cur_col, wrap)
! 294: #endif
! 295:
! 296: #if AIC_DEBUG_REGISTERS
! 297: ahc_reg_print_t ahc_dmaparams_print;
! 298: #else
! 299: #define ahc_dmaparams_print(regvalue, cur_col, wrap) \
! 300: ahc_print_register(NULL, 0, "DMAPARAMS", 0x3b, regvalue, cur_col, wrap)
! 301: #endif
! 302:
! 303: #if AIC_DEBUG_REGISTERS
! 304: ahc_reg_print_t ahc_seq_flags_print;
! 305: #else
! 306: #define ahc_seq_flags_print(regvalue, cur_col, wrap) \
! 307: ahc_print_register(NULL, 0, "SEQ_FLAGS", 0x3c, regvalue, cur_col, wrap)
! 308: #endif
! 309:
! 310: #if AIC_DEBUG_REGISTERS
! 311: ahc_reg_print_t ahc_saved_scsiid_print;
! 312: #else
! 313: #define ahc_saved_scsiid_print(regvalue, cur_col, wrap) \
! 314: ahc_print_register(NULL, 0, "SAVED_SCSIID", 0x3d, regvalue, cur_col, wrap)
! 315: #endif
! 316:
! 317: #if AIC_DEBUG_REGISTERS
! 318: ahc_reg_print_t ahc_saved_lun_print;
! 319: #else
! 320: #define ahc_saved_lun_print(regvalue, cur_col, wrap) \
! 321: ahc_print_register(NULL, 0, "SAVED_LUN", 0x3e, regvalue, cur_col, wrap)
! 322: #endif
! 323:
! 324: #if AIC_DEBUG_REGISTERS
! 325: ahc_reg_print_t ahc_lastphase_print;
! 326: #else
! 327: #define ahc_lastphase_print(regvalue, cur_col, wrap) \
! 328: ahc_print_register(NULL, 0, "LASTPHASE", 0x3f, regvalue, cur_col, wrap)
! 329: #endif
! 330:
! 331: #if AIC_DEBUG_REGISTERS
! 332: ahc_reg_print_t ahc_waiting_scbh_print;
! 333: #else
! 334: #define ahc_waiting_scbh_print(regvalue, cur_col, wrap) \
! 335: ahc_print_register(NULL, 0, "WAITING_SCBH", 0x40, regvalue, cur_col, wrap)
! 336: #endif
! 337:
! 338: #if AIC_DEBUG_REGISTERS
! 339: ahc_reg_print_t ahc_disconnected_scbh_print;
! 340: #else
! 341: #define ahc_disconnected_scbh_print(regvalue, cur_col, wrap) \
! 342: ahc_print_register(NULL, 0, "DISCONNECTED_SCBH", 0x41, regvalue, cur_col, wrap)
! 343: #endif
! 344:
! 345: #if AIC_DEBUG_REGISTERS
! 346: ahc_reg_print_t ahc_free_scbh_print;
! 347: #else
! 348: #define ahc_free_scbh_print(regvalue, cur_col, wrap) \
! 349: ahc_print_register(NULL, 0, "FREE_SCBH", 0x42, regvalue, cur_col, wrap)
! 350: #endif
! 351:
! 352: #if AIC_DEBUG_REGISTERS
! 353: ahc_reg_print_t ahc_complete_scbh_print;
! 354: #else
! 355: #define ahc_complete_scbh_print(regvalue, cur_col, wrap) \
! 356: ahc_print_register(NULL, 0, "COMPLETE_SCBH", 0x43, regvalue, cur_col, wrap)
! 357: #endif
! 358:
! 359: #if AIC_DEBUG_REGISTERS
! 360: ahc_reg_print_t ahc_hscb_addr_print;
! 361: #else
! 362: #define ahc_hscb_addr_print(regvalue, cur_col, wrap) \
! 363: ahc_print_register(NULL, 0, "HSCB_ADDR", 0x44, regvalue, cur_col, wrap)
! 364: #endif
! 365:
! 366: #if AIC_DEBUG_REGISTERS
! 367: ahc_reg_print_t ahc_shared_data_addr_print;
! 368: #else
! 369: #define ahc_shared_data_addr_print(regvalue, cur_col, wrap) \
! 370: ahc_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x48, regvalue, cur_col, wrap)
! 371: #endif
! 372:
! 373: #if AIC_DEBUG_REGISTERS
! 374: ahc_reg_print_t ahc_kernel_qinpos_print;
! 375: #else
! 376: #define ahc_kernel_qinpos_print(regvalue, cur_col, wrap) \
! 377: ahc_print_register(NULL, 0, "KERNEL_QINPOS", 0x4c, regvalue, cur_col, wrap)
! 378: #endif
! 379:
! 380: #if AIC_DEBUG_REGISTERS
! 381: ahc_reg_print_t ahc_qinpos_print;
! 382: #else
! 383: #define ahc_qinpos_print(regvalue, cur_col, wrap) \
! 384: ahc_print_register(NULL, 0, "QINPOS", 0x4d, regvalue, cur_col, wrap)
! 385: #endif
! 386:
! 387: #if AIC_DEBUG_REGISTERS
! 388: ahc_reg_print_t ahc_qoutpos_print;
! 389: #else
! 390: #define ahc_qoutpos_print(regvalue, cur_col, wrap) \
! 391: ahc_print_register(NULL, 0, "QOUTPOS", 0x4e, regvalue, cur_col, wrap)
! 392: #endif
! 393:
! 394: #if AIC_DEBUG_REGISTERS
! 395: ahc_reg_print_t ahc_kernel_tqinpos_print;
! 396: #else
! 397: #define ahc_kernel_tqinpos_print(regvalue, cur_col, wrap) \
! 398: ahc_print_register(NULL, 0, "KERNEL_TQINPOS", 0x4f, regvalue, cur_col, wrap)
! 399: #endif
! 400:
! 401: #if AIC_DEBUG_REGISTERS
! 402: ahc_reg_print_t ahc_tqinpos_print;
! 403: #else
! 404: #define ahc_tqinpos_print(regvalue, cur_col, wrap) \
! 405: ahc_print_register(NULL, 0, "TQINPOS", 0x50, regvalue, cur_col, wrap)
! 406: #endif
! 407:
! 408: #if AIC_DEBUG_REGISTERS
! 409: ahc_reg_print_t ahc_arg_1_print;
! 410: #else
! 411: #define ahc_arg_1_print(regvalue, cur_col, wrap) \
! 412: ahc_print_register(NULL, 0, "ARG_1", 0x51, regvalue, cur_col, wrap)
! 413: #endif
! 414:
! 415: #if AIC_DEBUG_REGISTERS
! 416: ahc_reg_print_t ahc_arg_2_print;
! 417: #else
! 418: #define ahc_arg_2_print(regvalue, cur_col, wrap) \
! 419: ahc_print_register(NULL, 0, "ARG_2", 0x52, regvalue, cur_col, wrap)
! 420: #endif
! 421:
! 422: #if AIC_DEBUG_REGISTERS
! 423: ahc_reg_print_t ahc_last_msg_print;
! 424: #else
! 425: #define ahc_last_msg_print(regvalue, cur_col, wrap) \
! 426: ahc_print_register(NULL, 0, "LAST_MSG", 0x53, regvalue, cur_col, wrap)
! 427: #endif
! 428:
! 429: #if AIC_DEBUG_REGISTERS
! 430: ahc_reg_print_t ahc_scsiseq_template_print;
! 431: #else
! 432: #define ahc_scsiseq_template_print(regvalue, cur_col, wrap) \
! 433: ahc_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x54, regvalue, cur_col, wrap)
! 434: #endif
! 435:
! 436: #if AIC_DEBUG_REGISTERS
! 437: ahc_reg_print_t ahc_ha_274_biosglobal_print;
! 438: #else
! 439: #define ahc_ha_274_biosglobal_print(regvalue, cur_col, wrap) \
! 440: ahc_print_register(NULL, 0, "HA_274_BIOSGLOBAL", 0x56, regvalue, cur_col, wrap)
! 441: #endif
! 442:
! 443: #if AIC_DEBUG_REGISTERS
! 444: ahc_reg_print_t ahc_seq_flags2_print;
! 445: #else
! 446: #define ahc_seq_flags2_print(regvalue, cur_col, wrap) \
! 447: ahc_print_register(NULL, 0, "SEQ_FLAGS2", 0x57, regvalue, cur_col, wrap)
! 448: #endif
! 449:
! 450: #if AIC_DEBUG_REGISTERS
! 451: ahc_reg_print_t ahc_scsiconf_print;
! 452: #else
! 453: #define ahc_scsiconf_print(regvalue, cur_col, wrap) \
! 454: ahc_print_register(NULL, 0, "SCSICONF", 0x5a, regvalue, cur_col, wrap)
! 455: #endif
! 456:
! 457: #if AIC_DEBUG_REGISTERS
! 458: ahc_reg_print_t ahc_intdef_print;
! 459: #else
! 460: #define ahc_intdef_print(regvalue, cur_col, wrap) \
! 461: ahc_print_register(NULL, 0, "INTDEF", 0x5c, regvalue, cur_col, wrap)
! 462: #endif
! 463:
! 464: #if AIC_DEBUG_REGISTERS
! 465: ahc_reg_print_t ahc_hostconf_print;
! 466: #else
! 467: #define ahc_hostconf_print(regvalue, cur_col, wrap) \
! 468: ahc_print_register(NULL, 0, "HOSTCONF", 0x5d, regvalue, cur_col, wrap)
! 469: #endif
! 470:
! 471: #if AIC_DEBUG_REGISTERS
! 472: ahc_reg_print_t ahc_ha_274_biosctrl_print;
! 473: #else
! 474: #define ahc_ha_274_biosctrl_print(regvalue, cur_col, wrap) \
! 475: ahc_print_register(NULL, 0, "HA_274_BIOSCTRL", 0x5f, regvalue, cur_col, wrap)
! 476: #endif
! 477:
! 478: #if AIC_DEBUG_REGISTERS
! 479: ahc_reg_print_t ahc_seqctl_print;
! 480: #else
! 481: #define ahc_seqctl_print(regvalue, cur_col, wrap) \
! 482: ahc_print_register(NULL, 0, "SEQCTL", 0x60, regvalue, cur_col, wrap)
! 483: #endif
! 484:
! 485: #if AIC_DEBUG_REGISTERS
! 486: ahc_reg_print_t ahc_seqram_print;
! 487: #else
! 488: #define ahc_seqram_print(regvalue, cur_col, wrap) \
! 489: ahc_print_register(NULL, 0, "SEQRAM", 0x61, regvalue, cur_col, wrap)
! 490: #endif
! 491:
! 492: #if AIC_DEBUG_REGISTERS
! 493: ahc_reg_print_t ahc_seqaddr0_print;
! 494: #else
! 495: #define ahc_seqaddr0_print(regvalue, cur_col, wrap) \
! 496: ahc_print_register(NULL, 0, "SEQADDR0", 0x62, regvalue, cur_col, wrap)
! 497: #endif
! 498:
! 499: #if AIC_DEBUG_REGISTERS
! 500: ahc_reg_print_t ahc_seqaddr1_print;
! 501: #else
! 502: #define ahc_seqaddr1_print(regvalue, cur_col, wrap) \
! 503: ahc_print_register(NULL, 0, "SEQADDR1", 0x63, regvalue, cur_col, wrap)
! 504: #endif
! 505:
! 506: #if AIC_DEBUG_REGISTERS
! 507: ahc_reg_print_t ahc_accum_print;
! 508: #else
! 509: #define ahc_accum_print(regvalue, cur_col, wrap) \
! 510: ahc_print_register(NULL, 0, "ACCUM", 0x64, regvalue, cur_col, wrap)
! 511: #endif
! 512:
! 513: #if AIC_DEBUG_REGISTERS
! 514: ahc_reg_print_t ahc_sindex_print;
! 515: #else
! 516: #define ahc_sindex_print(regvalue, cur_col, wrap) \
! 517: ahc_print_register(NULL, 0, "SINDEX", 0x65, regvalue, cur_col, wrap)
! 518: #endif
! 519:
! 520: #if AIC_DEBUG_REGISTERS
! 521: ahc_reg_print_t ahc_dindex_print;
! 522: #else
! 523: #define ahc_dindex_print(regvalue, cur_col, wrap) \
! 524: ahc_print_register(NULL, 0, "DINDEX", 0x66, regvalue, cur_col, wrap)
! 525: #endif
! 526:
! 527: #if AIC_DEBUG_REGISTERS
! 528: ahc_reg_print_t ahc_allones_print;
! 529: #else
! 530: #define ahc_allones_print(regvalue, cur_col, wrap) \
! 531: ahc_print_register(NULL, 0, "ALLONES", 0x69, regvalue, cur_col, wrap)
! 532: #endif
! 533:
! 534: #if AIC_DEBUG_REGISTERS
! 535: ahc_reg_print_t ahc_none_print;
! 536: #else
! 537: #define ahc_none_print(regvalue, cur_col, wrap) \
! 538: ahc_print_register(NULL, 0, "NONE", 0x6a, regvalue, cur_col, wrap)
! 539: #endif
! 540:
! 541: #if AIC_DEBUG_REGISTERS
! 542: ahc_reg_print_t ahc_allzeros_print;
! 543: #else
! 544: #define ahc_allzeros_print(regvalue, cur_col, wrap) \
! 545: ahc_print_register(NULL, 0, "ALLZEROS", 0x6a, regvalue, cur_col, wrap)
! 546: #endif
! 547:
! 548: #if AIC_DEBUG_REGISTERS
! 549: ahc_reg_print_t ahc_flags_print;
! 550: #else
! 551: #define ahc_flags_print(regvalue, cur_col, wrap) \
! 552: ahc_print_register(NULL, 0, "FLAGS", 0x6b, regvalue, cur_col, wrap)
! 553: #endif
! 554:
! 555: #if AIC_DEBUG_REGISTERS
! 556: ahc_reg_print_t ahc_sindir_print;
! 557: #else
! 558: #define ahc_sindir_print(regvalue, cur_col, wrap) \
! 559: ahc_print_register(NULL, 0, "SINDIR", 0x6c, regvalue, cur_col, wrap)
! 560: #endif
! 561:
! 562: #if AIC_DEBUG_REGISTERS
! 563: ahc_reg_print_t ahc_dindir_print;
! 564: #else
! 565: #define ahc_dindir_print(regvalue, cur_col, wrap) \
! 566: ahc_print_register(NULL, 0, "DINDIR", 0x6d, regvalue, cur_col, wrap)
! 567: #endif
! 568:
! 569: #if AIC_DEBUG_REGISTERS
! 570: ahc_reg_print_t ahc_function1_print;
! 571: #else
! 572: #define ahc_function1_print(regvalue, cur_col, wrap) \
! 573: ahc_print_register(NULL, 0, "FUNCTION1", 0x6e, regvalue, cur_col, wrap)
! 574: #endif
! 575:
! 576: #if AIC_DEBUG_REGISTERS
! 577: ahc_reg_print_t ahc_stack_print;
! 578: #else
! 579: #define ahc_stack_print(regvalue, cur_col, wrap) \
! 580: ahc_print_register(NULL, 0, "STACK", 0x6f, regvalue, cur_col, wrap)
! 581: #endif
! 582:
! 583: #if AIC_DEBUG_REGISTERS
! 584: ahc_reg_print_t ahc_targ_offset_print;
! 585: #else
! 586: #define ahc_targ_offset_print(regvalue, cur_col, wrap) \
! 587: ahc_print_register(NULL, 0, "TARG_OFFSET", 0x70, regvalue, cur_col, wrap)
! 588: #endif
! 589:
! 590: #if AIC_DEBUG_REGISTERS
! 591: ahc_reg_print_t ahc_sram_base_print;
! 592: #else
! 593: #define ahc_sram_base_print(regvalue, cur_col, wrap) \
! 594: ahc_print_register(NULL, 0, "SRAM_BASE", 0x70, regvalue, cur_col, wrap)
! 595: #endif
! 596:
! 597: #if AIC_DEBUG_REGISTERS
! 598: ahc_reg_print_t ahc_dscommand0_print;
! 599: #else
! 600: #define ahc_dscommand0_print(regvalue, cur_col, wrap) \
! 601: ahc_print_register(NULL, 0, "DSCOMMAND0", 0x84, regvalue, cur_col, wrap)
! 602: #endif
! 603:
! 604: #if AIC_DEBUG_REGISTERS
! 605: ahc_reg_print_t ahc_bctl_print;
! 606: #else
! 607: #define ahc_bctl_print(regvalue, cur_col, wrap) \
! 608: ahc_print_register(NULL, 0, "BCTL", 0x84, regvalue, cur_col, wrap)
! 609: #endif
! 610:
! 611: #if AIC_DEBUG_REGISTERS
! 612: ahc_reg_print_t ahc_bustime_print;
! 613: #else
! 614: #define ahc_bustime_print(regvalue, cur_col, wrap) \
! 615: ahc_print_register(NULL, 0, "BUSTIME", 0x85, regvalue, cur_col, wrap)
! 616: #endif
! 617:
! 618: #if AIC_DEBUG_REGISTERS
! 619: ahc_reg_print_t ahc_dscommand1_print;
! 620: #else
! 621: #define ahc_dscommand1_print(regvalue, cur_col, wrap) \
! 622: ahc_print_register(NULL, 0, "DSCOMMAND1", 0x85, regvalue, cur_col, wrap)
! 623: #endif
! 624:
! 625: #if AIC_DEBUG_REGISTERS
! 626: ahc_reg_print_t ahc_busspd_print;
! 627: #else
! 628: #define ahc_busspd_print(regvalue, cur_col, wrap) \
! 629: ahc_print_register(NULL, 0, "BUSSPD", 0x86, regvalue, cur_col, wrap)
! 630: #endif
! 631:
! 632: #if AIC_DEBUG_REGISTERS
! 633: ahc_reg_print_t ahc_hs_mailbox_print;
! 634: #else
! 635: #define ahc_hs_mailbox_print(regvalue, cur_col, wrap) \
! 636: ahc_print_register(NULL, 0, "HS_MAILBOX", 0x86, regvalue, cur_col, wrap)
! 637: #endif
! 638:
! 639: #if AIC_DEBUG_REGISTERS
! 640: ahc_reg_print_t ahc_dspcistatus_print;
! 641: #else
! 642: #define ahc_dspcistatus_print(regvalue, cur_col, wrap) \
! 643: ahc_print_register(NULL, 0, "DSPCISTATUS", 0x86, regvalue, cur_col, wrap)
! 644: #endif
! 645:
! 646: #if AIC_DEBUG_REGISTERS
! 647: ahc_reg_print_t ahc_hcntrl_print;
! 648: #else
! 649: #define ahc_hcntrl_print(regvalue, cur_col, wrap) \
! 650: ahc_print_register(NULL, 0, "HCNTRL", 0x87, regvalue, cur_col, wrap)
! 651: #endif
! 652:
! 653: #if AIC_DEBUG_REGISTERS
! 654: ahc_reg_print_t ahc_haddr_print;
! 655: #else
! 656: #define ahc_haddr_print(regvalue, cur_col, wrap) \
! 657: ahc_print_register(NULL, 0, "HADDR", 0x88, regvalue, cur_col, wrap)
! 658: #endif
! 659:
! 660: #if AIC_DEBUG_REGISTERS
! 661: ahc_reg_print_t ahc_hcnt_print;
! 662: #else
! 663: #define ahc_hcnt_print(regvalue, cur_col, wrap) \
! 664: ahc_print_register(NULL, 0, "HCNT", 0x8c, regvalue, cur_col, wrap)
! 665: #endif
! 666:
! 667: #if AIC_DEBUG_REGISTERS
! 668: ahc_reg_print_t ahc_scbptr_print;
! 669: #else
! 670: #define ahc_scbptr_print(regvalue, cur_col, wrap) \
! 671: ahc_print_register(NULL, 0, "SCBPTR", 0x90, regvalue, cur_col, wrap)
! 672: #endif
! 673:
! 674: #if AIC_DEBUG_REGISTERS
! 675: ahc_reg_print_t ahc_intstat_print;
! 676: #else
! 677: #define ahc_intstat_print(regvalue, cur_col, wrap) \
! 678: ahc_print_register(NULL, 0, "INTSTAT", 0x91, regvalue, cur_col, wrap)
! 679: #endif
! 680:
! 681: #if AIC_DEBUG_REGISTERS
! 682: ahc_reg_print_t ahc_error_print;
! 683: #else
! 684: #define ahc_error_print(regvalue, cur_col, wrap) \
! 685: ahc_print_register(NULL, 0, "ERROR", 0x92, regvalue, cur_col, wrap)
! 686: #endif
! 687:
! 688: #if AIC_DEBUG_REGISTERS
! 689: ahc_reg_print_t ahc_clrint_print;
! 690: #else
! 691: #define ahc_clrint_print(regvalue, cur_col, wrap) \
! 692: ahc_print_register(NULL, 0, "CLRINT", 0x92, regvalue, cur_col, wrap)
! 693: #endif
! 694:
! 695: #if AIC_DEBUG_REGISTERS
! 696: ahc_reg_print_t ahc_dfcntrl_print;
! 697: #else
! 698: #define ahc_dfcntrl_print(regvalue, cur_col, wrap) \
! 699: ahc_print_register(NULL, 0, "DFCNTRL", 0x93, regvalue, cur_col, wrap)
! 700: #endif
! 701:
! 702: #if AIC_DEBUG_REGISTERS
! 703: ahc_reg_print_t ahc_dfstatus_print;
! 704: #else
! 705: #define ahc_dfstatus_print(regvalue, cur_col, wrap) \
! 706: ahc_print_register(NULL, 0, "DFSTATUS", 0x94, regvalue, cur_col, wrap)
! 707: #endif
! 708:
! 709: #if AIC_DEBUG_REGISTERS
! 710: ahc_reg_print_t ahc_dfwaddr_print;
! 711: #else
! 712: #define ahc_dfwaddr_print(regvalue, cur_col, wrap) \
! 713: ahc_print_register(NULL, 0, "DFWADDR", 0x95, regvalue, cur_col, wrap)
! 714: #endif
! 715:
! 716: #if AIC_DEBUG_REGISTERS
! 717: ahc_reg_print_t ahc_dfraddr_print;
! 718: #else
! 719: #define ahc_dfraddr_print(regvalue, cur_col, wrap) \
! 720: ahc_print_register(NULL, 0, "DFRADDR", 0x97, regvalue, cur_col, wrap)
! 721: #endif
! 722:
! 723: #if AIC_DEBUG_REGISTERS
! 724: ahc_reg_print_t ahc_dfdat_print;
! 725: #else
! 726: #define ahc_dfdat_print(regvalue, cur_col, wrap) \
! 727: ahc_print_register(NULL, 0, "DFDAT", 0x99, regvalue, cur_col, wrap)
! 728: #endif
! 729:
! 730: #if AIC_DEBUG_REGISTERS
! 731: ahc_reg_print_t ahc_scbcnt_print;
! 732: #else
! 733: #define ahc_scbcnt_print(regvalue, cur_col, wrap) \
! 734: ahc_print_register(NULL, 0, "SCBCNT", 0x9a, regvalue, cur_col, wrap)
! 735: #endif
! 736:
! 737: #if AIC_DEBUG_REGISTERS
! 738: ahc_reg_print_t ahc_qinfifo_print;
! 739: #else
! 740: #define ahc_qinfifo_print(regvalue, cur_col, wrap) \
! 741: ahc_print_register(NULL, 0, "QINFIFO", 0x9b, regvalue, cur_col, wrap)
! 742: #endif
! 743:
! 744: #if AIC_DEBUG_REGISTERS
! 745: ahc_reg_print_t ahc_qincnt_print;
! 746: #else
! 747: #define ahc_qincnt_print(regvalue, cur_col, wrap) \
! 748: ahc_print_register(NULL, 0, "QINCNT", 0x9c, regvalue, cur_col, wrap)
! 749: #endif
! 750:
! 751: #if AIC_DEBUG_REGISTERS
! 752: ahc_reg_print_t ahc_crccontrol1_print;
! 753: #else
! 754: #define ahc_crccontrol1_print(regvalue, cur_col, wrap) \
! 755: ahc_print_register(NULL, 0, "CRCCONTROL1", 0x9d, regvalue, cur_col, wrap)
! 756: #endif
! 757:
! 758: #if AIC_DEBUG_REGISTERS
! 759: ahc_reg_print_t ahc_qoutfifo_print;
! 760: #else
! 761: #define ahc_qoutfifo_print(regvalue, cur_col, wrap) \
! 762: ahc_print_register(NULL, 0, "QOUTFIFO", 0x9d, regvalue, cur_col, wrap)
! 763: #endif
! 764:
! 765: #if AIC_DEBUG_REGISTERS
! 766: ahc_reg_print_t ahc_qoutcnt_print;
! 767: #else
! 768: #define ahc_qoutcnt_print(regvalue, cur_col, wrap) \
! 769: ahc_print_register(NULL, 0, "QOUTCNT", 0x9e, regvalue, cur_col, wrap)
! 770: #endif
! 771:
! 772: #if AIC_DEBUG_REGISTERS
! 773: ahc_reg_print_t ahc_scsiphase_print;
! 774: #else
! 775: #define ahc_scsiphase_print(regvalue, cur_col, wrap) \
! 776: ahc_print_register(NULL, 0, "SCSIPHASE", 0x9e, regvalue, cur_col, wrap)
! 777: #endif
! 778:
! 779: #if AIC_DEBUG_REGISTERS
! 780: ahc_reg_print_t ahc_sfunct_print;
! 781: #else
! 782: #define ahc_sfunct_print(regvalue, cur_col, wrap) \
! 783: ahc_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap)
! 784: #endif
! 785:
! 786: #if AIC_DEBUG_REGISTERS
! 787: ahc_reg_print_t ahc_scb_base_print;
! 788: #else
! 789: #define ahc_scb_base_print(regvalue, cur_col, wrap) \
! 790: ahc_print_register(NULL, 0, "SCB_BASE", 0xa0, regvalue, cur_col, wrap)
! 791: #endif
! 792:
! 793: #if AIC_DEBUG_REGISTERS
! 794: ahc_reg_print_t ahc_scb_cdb_ptr_print;
! 795: #else
! 796: #define ahc_scb_cdb_ptr_print(regvalue, cur_col, wrap) \
! 797: ahc_print_register(NULL, 0, "SCB_CDB_PTR", 0xa0, regvalue, cur_col, wrap)
! 798: #endif
! 799:
! 800: #if AIC_DEBUG_REGISTERS
! 801: ahc_reg_print_t ahc_scb_residual_sgptr_print;
! 802: #else
! 803: #define ahc_scb_residual_sgptr_print(regvalue, cur_col, wrap) \
! 804: ahc_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR", 0xa4, regvalue, cur_col, wrap)
! 805: #endif
! 806:
! 807: #if AIC_DEBUG_REGISTERS
! 808: ahc_reg_print_t ahc_scb_scsi_status_print;
! 809: #else
! 810: #define ahc_scb_scsi_status_print(regvalue, cur_col, wrap) \
! 811: ahc_print_register(NULL, 0, "SCB_SCSI_STATUS", 0xa8, regvalue, cur_col, wrap)
! 812: #endif
! 813:
! 814: #if AIC_DEBUG_REGISTERS
! 815: ahc_reg_print_t ahc_scb_target_phases_print;
! 816: #else
! 817: #define ahc_scb_target_phases_print(regvalue, cur_col, wrap) \
! 818: ahc_print_register(NULL, 0, "SCB_TARGET_PHASES", 0xa9, regvalue, cur_col, wrap)
! 819: #endif
! 820:
! 821: #if AIC_DEBUG_REGISTERS
! 822: ahc_reg_print_t ahc_scb_target_data_dir_print;
! 823: #else
! 824: #define ahc_scb_target_data_dir_print(regvalue, cur_col, wrap) \
! 825: ahc_print_register(NULL, 0, "SCB_TARGET_DATA_DIR", 0xaa, regvalue, cur_col, wrap)
! 826: #endif
! 827:
! 828: #if AIC_DEBUG_REGISTERS
! 829: ahc_reg_print_t ahc_scb_target_itag_print;
! 830: #else
! 831: #define ahc_scb_target_itag_print(regvalue, cur_col, wrap) \
! 832: ahc_print_register(NULL, 0, "SCB_TARGET_ITAG", 0xab, regvalue, cur_col, wrap)
! 833: #endif
! 834:
! 835: #if AIC_DEBUG_REGISTERS
! 836: ahc_reg_print_t ahc_scb_dataptr_print;
! 837: #else
! 838: #define ahc_scb_dataptr_print(regvalue, cur_col, wrap) \
! 839: ahc_print_register(NULL, 0, "SCB_DATAPTR", 0xac, regvalue, cur_col, wrap)
! 840: #endif
! 841:
! 842: #if AIC_DEBUG_REGISTERS
! 843: ahc_reg_print_t ahc_scb_datacnt_print;
! 844: #else
! 845: #define ahc_scb_datacnt_print(regvalue, cur_col, wrap) \
! 846: ahc_print_register(NULL, 0, "SCB_DATACNT", 0xb0, regvalue, cur_col, wrap)
! 847: #endif
! 848:
! 849: #if AIC_DEBUG_REGISTERS
! 850: ahc_reg_print_t ahc_scb_sgptr_print;
! 851: #else
! 852: #define ahc_scb_sgptr_print(regvalue, cur_col, wrap) \
! 853: ahc_print_register(NULL, 0, "SCB_SGPTR", 0xb4, regvalue, cur_col, wrap)
! 854: #endif
! 855:
! 856: #if AIC_DEBUG_REGISTERS
! 857: ahc_reg_print_t ahc_scb_control_print;
! 858: #else
! 859: #define ahc_scb_control_print(regvalue, cur_col, wrap) \
! 860: ahc_print_register(NULL, 0, "SCB_CONTROL", 0xb8, regvalue, cur_col, wrap)
! 861: #endif
! 862:
! 863: #if AIC_DEBUG_REGISTERS
! 864: ahc_reg_print_t ahc_scb_scsiid_print;
! 865: #else
! 866: #define ahc_scb_scsiid_print(regvalue, cur_col, wrap) \
! 867: ahc_print_register(NULL, 0, "SCB_SCSIID", 0xb9, regvalue, cur_col, wrap)
! 868: #endif
! 869:
! 870: #if AIC_DEBUG_REGISTERS
! 871: ahc_reg_print_t ahc_scb_lun_print;
! 872: #else
! 873: #define ahc_scb_lun_print(regvalue, cur_col, wrap) \
! 874: ahc_print_register(NULL, 0, "SCB_LUN", 0xba, regvalue, cur_col, wrap)
! 875: #endif
! 876:
! 877: #if AIC_DEBUG_REGISTERS
! 878: ahc_reg_print_t ahc_scb_tag_print;
! 879: #else
! 880: #define ahc_scb_tag_print(regvalue, cur_col, wrap) \
! 881: ahc_print_register(NULL, 0, "SCB_TAG", 0xbb, regvalue, cur_col, wrap)
! 882: #endif
! 883:
! 884: #if AIC_DEBUG_REGISTERS
! 885: ahc_reg_print_t ahc_scb_cdb_len_print;
! 886: #else
! 887: #define ahc_scb_cdb_len_print(regvalue, cur_col, wrap) \
! 888: ahc_print_register(NULL, 0, "SCB_CDB_LEN", 0xbc, regvalue, cur_col, wrap)
! 889: #endif
! 890:
! 891: #if AIC_DEBUG_REGISTERS
! 892: ahc_reg_print_t ahc_scb_scsirate_print;
! 893: #else
! 894: #define ahc_scb_scsirate_print(regvalue, cur_col, wrap) \
! 895: ahc_print_register(NULL, 0, "SCB_SCSIRATE", 0xbd, regvalue, cur_col, wrap)
! 896: #endif
! 897:
! 898: #if AIC_DEBUG_REGISTERS
! 899: ahc_reg_print_t ahc_scb_scsioffset_print;
! 900: #else
! 901: #define ahc_scb_scsioffset_print(regvalue, cur_col, wrap) \
! 902: ahc_print_register(NULL, 0, "SCB_SCSIOFFSET", 0xbe, regvalue, cur_col, wrap)
! 903: #endif
! 904:
! 905: #if AIC_DEBUG_REGISTERS
! 906: ahc_reg_print_t ahc_scb_next_print;
! 907: #else
! 908: #define ahc_scb_next_print(regvalue, cur_col, wrap) \
! 909: ahc_print_register(NULL, 0, "SCB_NEXT", 0xbf, regvalue, cur_col, wrap)
! 910: #endif
! 911:
! 912: #if AIC_DEBUG_REGISTERS
! 913: ahc_reg_print_t ahc_scb_64_spare_print;
! 914: #else
! 915: #define ahc_scb_64_spare_print(regvalue, cur_col, wrap) \
! 916: ahc_print_register(NULL, 0, "SCB_64_SPARE", 0xc0, regvalue, cur_col, wrap)
! 917: #endif
! 918:
! 919: #if AIC_DEBUG_REGISTERS
! 920: ahc_reg_print_t ahc_seectl_2840_print;
! 921: #else
! 922: #define ahc_seectl_2840_print(regvalue, cur_col, wrap) \
! 923: ahc_print_register(NULL, 0, "SEECTL_2840", 0xc0, regvalue, cur_col, wrap)
! 924: #endif
! 925:
! 926: #if AIC_DEBUG_REGISTERS
! 927: ahc_reg_print_t ahc_status_2840_print;
! 928: #else
! 929: #define ahc_status_2840_print(regvalue, cur_col, wrap) \
! 930: ahc_print_register(NULL, 0, "STATUS_2840", 0xc1, regvalue, cur_col, wrap)
! 931: #endif
! 932:
! 933: #if AIC_DEBUG_REGISTERS
! 934: ahc_reg_print_t ahc_scb_64_btt_print;
! 935: #else
! 936: #define ahc_scb_64_btt_print(regvalue, cur_col, wrap) \
! 937: ahc_print_register(NULL, 0, "SCB_64_BTT", 0xd0, regvalue, cur_col, wrap)
! 938: #endif
! 939:
! 940: #if AIC_DEBUG_REGISTERS
! 941: ahc_reg_print_t ahc_cchaddr_print;
! 942: #else
! 943: #define ahc_cchaddr_print(regvalue, cur_col, wrap) \
! 944: ahc_print_register(NULL, 0, "CCHADDR", 0xe0, regvalue, cur_col, wrap)
! 945: #endif
! 946:
! 947: #if AIC_DEBUG_REGISTERS
! 948: ahc_reg_print_t ahc_cchcnt_print;
! 949: #else
! 950: #define ahc_cchcnt_print(regvalue, cur_col, wrap) \
! 951: ahc_print_register(NULL, 0, "CCHCNT", 0xe8, regvalue, cur_col, wrap)
! 952: #endif
! 953:
! 954: #if AIC_DEBUG_REGISTERS
! 955: ahc_reg_print_t ahc_ccsgram_print;
! 956: #else
! 957: #define ahc_ccsgram_print(regvalue, cur_col, wrap) \
! 958: ahc_print_register(NULL, 0, "CCSGRAM", 0xe9, regvalue, cur_col, wrap)
! 959: #endif
! 960:
! 961: #if AIC_DEBUG_REGISTERS
! 962: ahc_reg_print_t ahc_ccsgaddr_print;
! 963: #else
! 964: #define ahc_ccsgaddr_print(regvalue, cur_col, wrap) \
! 965: ahc_print_register(NULL, 0, "CCSGADDR", 0xea, regvalue, cur_col, wrap)
! 966: #endif
! 967:
! 968: #if AIC_DEBUG_REGISTERS
! 969: ahc_reg_print_t ahc_ccsgctl_print;
! 970: #else
! 971: #define ahc_ccsgctl_print(regvalue, cur_col, wrap) \
! 972: ahc_print_register(NULL, 0, "CCSGCTL", 0xeb, regvalue, cur_col, wrap)
! 973: #endif
! 974:
! 975: #if AIC_DEBUG_REGISTERS
! 976: ahc_reg_print_t ahc_ccscbram_print;
! 977: #else
! 978: #define ahc_ccscbram_print(regvalue, cur_col, wrap) \
! 979: ahc_print_register(NULL, 0, "CCSCBRAM", 0xec, regvalue, cur_col, wrap)
! 980: #endif
! 981:
! 982: #if AIC_DEBUG_REGISTERS
! 983: ahc_reg_print_t ahc_ccscbaddr_print;
! 984: #else
! 985: #define ahc_ccscbaddr_print(regvalue, cur_col, wrap) \
! 986: ahc_print_register(NULL, 0, "CCSCBADDR", 0xed, regvalue, cur_col, wrap)
! 987: #endif
! 988:
! 989: #if AIC_DEBUG_REGISTERS
! 990: ahc_reg_print_t ahc_ccscbctl_print;
! 991: #else
! 992: #define ahc_ccscbctl_print(regvalue, cur_col, wrap) \
! 993: ahc_print_register(NULL, 0, "CCSCBCTL", 0xee, regvalue, cur_col, wrap)
! 994: #endif
! 995:
! 996: #if AIC_DEBUG_REGISTERS
! 997: ahc_reg_print_t ahc_ccscbcnt_print;
! 998: #else
! 999: #define ahc_ccscbcnt_print(regvalue, cur_col, wrap) \
! 1000: ahc_print_register(NULL, 0, "CCSCBCNT", 0xef, regvalue, cur_col, wrap)
! 1001: #endif
! 1002:
! 1003: #if AIC_DEBUG_REGISTERS
! 1004: ahc_reg_print_t ahc_scbbaddr_print;
! 1005: #else
! 1006: #define ahc_scbbaddr_print(regvalue, cur_col, wrap) \
! 1007: ahc_print_register(NULL, 0, "SCBBADDR", 0xf0, regvalue, cur_col, wrap)
! 1008: #endif
! 1009:
! 1010: #if AIC_DEBUG_REGISTERS
! 1011: ahc_reg_print_t ahc_ccscbptr_print;
! 1012: #else
! 1013: #define ahc_ccscbptr_print(regvalue, cur_col, wrap) \
! 1014: ahc_print_register(NULL, 0, "CCSCBPTR", 0xf1, regvalue, cur_col, wrap)
! 1015: #endif
! 1016:
! 1017: #if AIC_DEBUG_REGISTERS
! 1018: ahc_reg_print_t ahc_hnscb_qoff_print;
! 1019: #else
! 1020: #define ahc_hnscb_qoff_print(regvalue, cur_col, wrap) \
! 1021: ahc_print_register(NULL, 0, "HNSCB_QOFF", 0xf4, regvalue, cur_col, wrap)
! 1022: #endif
! 1023:
! 1024: #if AIC_DEBUG_REGISTERS
! 1025: ahc_reg_print_t ahc_snscb_qoff_print;
! 1026: #else
! 1027: #define ahc_snscb_qoff_print(regvalue, cur_col, wrap) \
! 1028: ahc_print_register(NULL, 0, "SNSCB_QOFF", 0xf6, regvalue, cur_col, wrap)
! 1029: #endif
! 1030:
! 1031: #if AIC_DEBUG_REGISTERS
! 1032: ahc_reg_print_t ahc_sdscb_qoff_print;
! 1033: #else
! 1034: #define ahc_sdscb_qoff_print(regvalue, cur_col, wrap) \
! 1035: ahc_print_register(NULL, 0, "SDSCB_QOFF", 0xf8, regvalue, cur_col, wrap)
! 1036: #endif
! 1037:
! 1038: #if AIC_DEBUG_REGISTERS
! 1039: ahc_reg_print_t ahc_qoff_ctlsta_print;
! 1040: #else
! 1041: #define ahc_qoff_ctlsta_print(regvalue, cur_col, wrap) \
! 1042: ahc_print_register(NULL, 0, "QOFF_CTLSTA", 0xfa, regvalue, cur_col, wrap)
! 1043: #endif
! 1044:
! 1045: #if AIC_DEBUG_REGISTERS
! 1046: ahc_reg_print_t ahc_dff_thrsh_print;
! 1047: #else
! 1048: #define ahc_dff_thrsh_print(regvalue, cur_col, wrap) \
! 1049: ahc_print_register(NULL, 0, "DFF_THRSH", 0xfb, regvalue, cur_col, wrap)
! 1050: #endif
! 1051:
! 1052: #if AIC_DEBUG_REGISTERS
! 1053: ahc_reg_print_t ahc_sg_cache_shadow_print;
! 1054: #else
! 1055: #define ahc_sg_cache_shadow_print(regvalue, cur_col, wrap) \
! 1056: ahc_print_register(NULL, 0, "SG_CACHE_SHADOW", 0xfc, regvalue, cur_col, wrap)
! 1057: #endif
! 1058:
! 1059: #if AIC_DEBUG_REGISTERS
! 1060: ahc_reg_print_t ahc_sg_cache_pre_print;
! 1061: #else
! 1062: #define ahc_sg_cache_pre_print(regvalue, cur_col, wrap) \
! 1063: ahc_print_register(NULL, 0, "SG_CACHE_PRE", 0xfc, regvalue, cur_col, wrap)
! 1064: #endif
! 1065:
! 1066:
! 1067: #define SCSISEQ 0x00
! 1068: #define TEMODE 0x80
! 1069: #define SCSIRSTO 0x01
! 1070:
! 1071: #define SXFRCTL0 0x01
! 1072: #define DFON 0x80
! 1073: #define DFPEXP 0x40
! 1074: #define FAST20 0x20
! 1075: #define CLRSTCNT 0x10
! 1076: #define SPIOEN 0x08
! 1077: #define SCAMEN 0x04
! 1078: #define CLRCHN 0x02
! 1079:
! 1080: #define SXFRCTL1 0x02
! 1081: #define STIMESEL 0x18
! 1082: #define BITBUCKET 0x80
! 1083: #define SWRAPEN 0x40
! 1084: #define ENSTIMER 0x04
! 1085: #define ACTNEGEN 0x02
! 1086: #define STPWEN 0x01
! 1087:
! 1088: #define SCSISIGI 0x03
! 1089: #define P_DATAIN_DT 0x60
! 1090: #define P_DATAOUT_DT 0x20
! 1091: #define ATNI 0x10
! 1092: #define SELI 0x08
! 1093: #define BSYI 0x04
! 1094: #define REQI 0x02
! 1095: #define ACKI 0x01
! 1096:
! 1097: #define SCSISIGO 0x03
! 1098: #define CDO 0x80
! 1099: #define IOO 0x40
! 1100: #define MSGO 0x20
! 1101: #define ATNO 0x10
! 1102: #define SELO 0x08
! 1103: #define BSYO 0x04
! 1104: #define REQO 0x02
! 1105: #define ACKO 0x01
! 1106:
! 1107: #define SCSIRATE 0x04
! 1108: #define SXFR 0x70
! 1109: #define SXFR_ULTRA2 0x0f
! 1110: #define SOFS 0x0f
! 1111: #define WIDEXFER 0x80
! 1112: #define ENABLE_CRC 0x40
! 1113: #define SINGLE_EDGE 0x10
! 1114:
! 1115: #define SCSIID 0x05
! 1116: #define SCSIOFFSET 0x05
! 1117: #define SOFS_ULTRA2 0x7f
! 1118:
! 1119: #define SCSIDATL 0x06
! 1120:
! 1121: #define SCSIDATH 0x07
! 1122:
! 1123: #define OPTIONMODE 0x08
! 1124: #define OPTIONMODE_DEFAULTS 0x03
! 1125: #define AUTORATEEN 0x80
! 1126: #define AUTOACKEN 0x40
! 1127: #define ATNMGMNTEN 0x20
! 1128: #define BUSFREEREV 0x10
! 1129: #define EXPPHASEDIS 0x08
! 1130: #define SCSIDATL_IMGEN 0x04
! 1131: #define AUTO_MSGOUT_DE 0x02
! 1132: #define DIS_MSGIN_DUALEDGE 0x01
! 1133:
! 1134: #define STCNT 0x08
! 1135:
! 1136: #define TARGCRCCNT 0x0a
! 1137:
! 1138: #define CLRSINT0 0x0b
! 1139: #define CLRSELDO 0x40
! 1140: #define CLRSELDI 0x20
! 1141: #define CLRSELINGO 0x10
! 1142: #define CLRIOERR 0x08
! 1143: #define CLRSWRAP 0x08
! 1144: #define CLRSPIORDY 0x02
! 1145:
! 1146: #define SSTAT0 0x0b
! 1147: #define TARGET 0x80
! 1148: #define SELDO 0x40
! 1149: #define SELDI 0x20
! 1150: #define SELINGO 0x10
! 1151: #define SWRAP 0x08
! 1152: #define IOERR 0x08
! 1153: #define SDONE 0x04
! 1154: #define SPIORDY 0x02
! 1155: #define DMADONE 0x01
! 1156:
! 1157: #define CLRSINT1 0x0c
! 1158: #define CLRSELTIMEO 0x80
! 1159: #define CLRATNO 0x40
! 1160: #define CLRSCSIRSTI 0x20
! 1161: #define CLRBUSFREE 0x08
! 1162: #define CLRSCSIPERR 0x04
! 1163: #define CLRPHASECHG 0x02
! 1164: #define CLRREQINIT 0x01
! 1165:
! 1166: #define SSTAT1 0x0c
! 1167: #define SELTO 0x80
! 1168: #define ATNTARG 0x40
! 1169: #define SCSIRSTI 0x20
! 1170: #define PHASEMIS 0x10
! 1171: #define BUSFREE 0x08
! 1172: #define SCSIPERR 0x04
! 1173: #define PHASECHG 0x02
! 1174: #define REQINIT 0x01
! 1175:
! 1176: #define SSTAT2 0x0d
! 1177: #define SFCNT 0x1f
! 1178: #define OVERRUN 0x80
! 1179: #define SHVALID 0x40
! 1180: #define EXP_ACTIVE 0x10
! 1181: #define CRCVALERR 0x08
! 1182: #define CRCENDERR 0x04
! 1183: #define CRCREQERR 0x02
! 1184: #define DUAL_EDGE_ERR 0x01
! 1185:
! 1186: #define SSTAT3 0x0e
! 1187: #define SCSICNT 0xf0
! 1188: #define U2OFFCNT 0x7f
! 1189: #define OFFCNT 0x0f
! 1190:
! 1191: #define SCSIID_ULTRA2 0x0f
! 1192:
! 1193: #define SIMODE0 0x10
! 1194: #define ENSELDO 0x40
! 1195: #define ENSELDI 0x20
! 1196: #define ENSELINGO 0x10
! 1197: #define ENIOERR 0x08
! 1198: #define ENSWRAP 0x08
! 1199: #define ENSDONE 0x04
! 1200: #define ENSPIORDY 0x02
! 1201: #define ENDMADONE 0x01
! 1202:
! 1203: #define SIMODE1 0x11
! 1204: #define ENSELTIMO 0x80
! 1205: #define ENATNTARG 0x40
! 1206: #define ENSCSIRST 0x20
! 1207: #define ENPHASEMIS 0x10
! 1208: #define ENBUSFREE 0x08
! 1209: #define ENSCSIPERR 0x04
! 1210: #define ENPHASECHG 0x02
! 1211: #define ENREQINIT 0x01
! 1212:
! 1213: #define SCSIBUSL 0x12
! 1214:
! 1215: #define SXFRCTL2 0x13
! 1216: #define ASYNC_SETUP 0x07
! 1217: #define AUTORSTDIS 0x10
! 1218: #define CMDDMAEN 0x08
! 1219:
! 1220: #define SCSIBUSH 0x13
! 1221:
! 1222: #define SHADDR 0x14
! 1223:
! 1224: #define SELTIMER 0x18
! 1225: #define TARGIDIN 0x18
! 1226: #define STAGE6 0x20
! 1227: #define STAGE5 0x10
! 1228: #define STAGE4 0x08
! 1229: #define STAGE3 0x04
! 1230: #define STAGE2 0x02
! 1231: #define STAGE1 0x01
! 1232:
! 1233: #define SELID 0x19
! 1234: #define SELID_MASK 0xf0
! 1235: #define ONEBIT 0x08
! 1236:
! 1237: #define SCAMCTL 0x1a
! 1238: #define SCAMLVL 0x03
! 1239: #define ENSCAMSELO 0x80
! 1240: #define CLRSCAMSELID 0x40
! 1241: #define ALTSTIM 0x20
! 1242: #define DFLTTID 0x10
! 1243:
! 1244: #define TARGID 0x1b
! 1245:
! 1246: #define SPIOCAP 0x1b
! 1247: #define SOFT1 0x80
! 1248: #define SOFT0 0x40
! 1249: #define SOFTCMDEN 0x20
! 1250: #define EXT_BRDCTL 0x10
! 1251: #define SEEPROM 0x08
! 1252: #define EEPROM 0x04
! 1253: #define ROM 0x02
! 1254: #define SSPIOCPS 0x01
! 1255:
! 1256: #define BRDCTL 0x1d
! 1257: #define BRDDAT7 0x80
! 1258: #define BRDDAT6 0x40
! 1259: #define BRDDAT5 0x20
! 1260: #define BRDDAT4 0x10
! 1261: #define BRDSTB 0x10
! 1262: #define BRDDAT3 0x08
! 1263: #define BRDCS 0x08
! 1264: #define BRDDAT2 0x04
! 1265: #define BRDRW 0x04
! 1266: #define BRDCTL1 0x02
! 1267: #define BRDRW_ULTRA2 0x02
! 1268: #define BRDCTL0 0x01
! 1269: #define BRDSTB_ULTRA2 0x01
! 1270:
! 1271: #define SEECTL 0x1e
! 1272: #define EXTARBACK 0x80
! 1273: #define EXTARBREQ 0x40
! 1274: #define SEEMS 0x20
! 1275: #define SEERDY 0x10
! 1276: #define SEECS 0x08
! 1277: #define SEECK 0x04
! 1278: #define SEEDO 0x02
! 1279: #define SEEDI 0x01
! 1280:
! 1281: #define SBLKCTL 0x1f
! 1282: #define DIAGLEDEN 0x80
! 1283: #define DIAGLEDON 0x40
! 1284: #define AUTOFLUSHDIS 0x20
! 1285: #define ENAB40 0x08
! 1286: #define SELBUSB 0x08
! 1287: #define ENAB20 0x04
! 1288: #define SELWIDE 0x02
! 1289: #define XCVR 0x01
! 1290:
! 1291: #define BUSY_TARGETS 0x20
! 1292: #define TARG_SCSIRATE 0x20
! 1293:
! 1294: #define ULTRA_ENB 0x30
! 1295: #define CMDSIZE_TABLE 0x30
! 1296:
! 1297: #define DISC_DSB 0x32
! 1298:
! 1299: #define CMDSIZE_TABLE_TAIL 0x34
! 1300:
! 1301: #define MWI_RESIDUAL 0x38
! 1302:
! 1303: #define NEXT_QUEUED_SCB 0x39
! 1304:
! 1305: #define MSG_OUT 0x3a
! 1306:
! 1307: #define DMAPARAMS 0x3b
! 1308: #define PRELOADEN 0x80
! 1309: #define WIDEODD 0x40
! 1310: #define SCSIEN 0x20
! 1311: #define SDMAENACK 0x10
! 1312: #define SDMAEN 0x10
! 1313: #define HDMAEN 0x08
! 1314: #define HDMAENACK 0x08
! 1315: #define DIRECTION 0x04
! 1316: #define FIFOFLUSH 0x02
! 1317: #define FIFORESET 0x01
! 1318:
! 1319: #define SEQ_FLAGS 0x3c
! 1320: #define NOT_IDENTIFIED 0x80
! 1321: #define NO_CDB_SENT 0x40
! 1322: #define TARGET_CMD_IS_TAGGED 0x40
! 1323: #define DPHASE 0x20
! 1324: #define TARG_CMD_PENDING 0x10
! 1325: #define CMDPHASE_PENDING 0x08
! 1326: #define DPHASE_PENDING 0x04
! 1327: #define SPHASE_PENDING 0x02
! 1328: #define NO_DISCONNECT 0x01
! 1329:
! 1330: #define SAVED_SCSIID 0x3d
! 1331:
! 1332: #define SAVED_LUN 0x3e
! 1333:
! 1334: #define LASTPHASE 0x3f
! 1335: #define PHASE_MASK 0xe0
! 1336: #define P_MESGIN 0xe0
! 1337: #define P_STATUS 0xc0
! 1338: #define P_MESGOUT 0xa0
! 1339: #define P_COMMAND 0x80
! 1340: #define P_DATAIN 0x40
! 1341: #define P_BUSFREE 0x01
! 1342: #define P_DATAOUT 0x00
! 1343: #define CDI 0x80
! 1344: #define IOI 0x40
! 1345: #define MSGI 0x20
! 1346:
! 1347: #define WAITING_SCBH 0x40
! 1348:
! 1349: #define DISCONNECTED_SCBH 0x41
! 1350:
! 1351: #define FREE_SCBH 0x42
! 1352:
! 1353: #define COMPLETE_SCBH 0x43
! 1354:
! 1355: #define HSCB_ADDR 0x44
! 1356:
! 1357: #define SHARED_DATA_ADDR 0x48
! 1358:
! 1359: #define KERNEL_QINPOS 0x4c
! 1360:
! 1361: #define QINPOS 0x4d
! 1362:
! 1363: #define QOUTPOS 0x4e
! 1364:
! 1365: #define KERNEL_TQINPOS 0x4f
! 1366:
! 1367: #define TQINPOS 0x50
! 1368:
! 1369: #define ARG_1 0x51
! 1370: #define RETURN_1 0x51
! 1371: #define SEND_MSG 0x80
! 1372: #define SEND_SENSE 0x40
! 1373: #define SEND_REJ 0x20
! 1374: #define MSGOUT_PHASEMIS 0x10
! 1375: #define EXIT_MSG_LOOP 0x08
! 1376: #define CONT_MSG_LOOP 0x04
! 1377: #define CONT_TARG_SESSION 0x02
! 1378:
! 1379: #define ARG_2 0x52
! 1380: #define RETURN_2 0x52
! 1381:
! 1382: #define LAST_MSG 0x53
! 1383: #define TARG_IMMEDIATE_SCB 0x53
! 1384:
! 1385: #define SCSISEQ_TEMPLATE 0x54
! 1386: #define ENSELO 0x40
! 1387: #define ENSELI 0x20
! 1388: #define ENRSELI 0x10
! 1389: #define ENAUTOATNO 0x08
! 1390: #define ENAUTOATNI 0x04
! 1391: #define ENAUTOATNP 0x02
! 1392:
! 1393: #define HA_274_BIOSGLOBAL 0x56
! 1394: #define INITIATOR_TAG 0x56
! 1395: #define HA_274_EXTENDED_TRANS 0x01
! 1396:
! 1397: #define SEQ_FLAGS2 0x57
! 1398: #define TARGET_MSG_PENDING 0x02
! 1399: #define SCB_DMA 0x01
! 1400:
! 1401: #define SCSICONF 0x5a
! 1402: #define HWSCSIID 0x0f
! 1403: #define HSCSIID 0x07
! 1404: #define TERM_ENB 0x80
! 1405: #define RESET_SCSI 0x40
! 1406: #define ENSPCHK 0x20
! 1407:
! 1408: #define INTDEF 0x5c
! 1409: #define VECTOR 0x0f
! 1410: #define EDGE_TRIG 0x80
! 1411:
! 1412: #define HOSTCONF 0x5d
! 1413:
! 1414: #define HA_274_BIOSCTRL 0x5f
! 1415: #define BIOSDISABLED 0x30
! 1416: #define BIOSMODE 0x30
! 1417: #define CHANNEL_B_PRIMARY 0x08
! 1418:
! 1419: #define SEQCTL 0x60
! 1420: #define PERRORDIS 0x80
! 1421: #define PAUSEDIS 0x40
! 1422: #define FAILDIS 0x20
! 1423: #define FASTMODE 0x10
! 1424: #define BRKADRINTEN 0x08
! 1425: #define STEP 0x04
! 1426: #define SEQRESET 0x02
! 1427: #define LOADRAM 0x01
! 1428:
! 1429: #define SEQRAM 0x61
! 1430:
! 1431: #define SEQADDR0 0x62
! 1432:
! 1433: #define SEQADDR1 0x63
! 1434: #define SEQADDR1_MASK 0x01
! 1435:
! 1436: #define ACCUM 0x64
! 1437:
! 1438: #define SINDEX 0x65
! 1439:
! 1440: #define DINDEX 0x66
! 1441:
! 1442: #define ALLONES 0x69
! 1443:
! 1444: #define NONE 0x6a
! 1445:
! 1446: #define ALLZEROS 0x6a
! 1447:
! 1448: #define FLAGS 0x6b
! 1449: #define ZERO 0x02
! 1450: #define CARRY 0x01
! 1451:
! 1452: #define SINDIR 0x6c
! 1453:
! 1454: #define DINDIR 0x6d
! 1455:
! 1456: #define FUNCTION1 0x6e
! 1457:
! 1458: #define STACK 0x6f
! 1459:
! 1460: #define TARG_OFFSET 0x70
! 1461:
! 1462: #define SRAM_BASE 0x70
! 1463:
! 1464: #define DSCOMMAND0 0x84
! 1465: #define CACHETHEN 0x80
! 1466: #define DPARCKEN 0x40
! 1467: #define MPARCKEN 0x20
! 1468: #define EXTREQLCK 0x10
! 1469: #define INTSCBRAMSEL 0x08
! 1470: #define RAMPS 0x04
! 1471: #define USCBSIZE32 0x02
! 1472: #define CIOPARCKEN 0x01
! 1473:
! 1474: #define BCTL 0x84
! 1475: #define ACE 0x08
! 1476: #define ENABLE 0x01
! 1477:
! 1478: #define BUSTIME 0x85
! 1479: #define BOFF 0xf0
! 1480: #define BON 0x0f
! 1481:
! 1482: #define DSCOMMAND1 0x85
! 1483: #define DSLATT 0xfc
! 1484: #define HADDLDSEL1 0x02
! 1485: #define HADDLDSEL0 0x01
! 1486:
! 1487: #define BUSSPD 0x86
! 1488: #define DFTHRSH 0xc0
! 1489: #define DFTHRSH_75 0x80
! 1490: #define STBOFF 0x38
! 1491: #define STBON 0x07
! 1492:
! 1493: #define HS_MAILBOX 0x86
! 1494: #define HOST_MAILBOX 0xf0
! 1495: #define HOST_TQINPOS 0x80
! 1496: #define SEQ_MAILBOX 0x0f
! 1497:
! 1498: #define DSPCISTATUS 0x86
! 1499: #define DFTHRSH_100 0xc0
! 1500:
! 1501: #define HCNTRL 0x87
! 1502: #define POWRDN 0x40
! 1503: #define SWINT 0x10
! 1504: #define IRQMS 0x08
! 1505: #define PAUSE 0x04
! 1506: #define INTEN 0x02
! 1507: #define CHIPRST 0x01
! 1508: #define CHIPRSTACK 0x01
! 1509:
! 1510: #define HADDR 0x88
! 1511:
! 1512: #define HCNT 0x8c
! 1513:
! 1514: #define SCBPTR 0x90
! 1515:
! 1516: #define INTSTAT 0x91
! 1517: #define SEQINT_MASK 0xf1
! 1518: #define OUT_OF_RANGE 0xe1
! 1519: #define NO_FREE_SCB 0xd1
! 1520: #define SCB_MISMATCH 0xc1
! 1521: #define MISSED_BUSFREE 0xb1
! 1522: #define MKMSG_FAILED 0xa1
! 1523: #define DATA_OVERRUN 0x91
! 1524: #define PERR_DETECTED 0x81
! 1525: #define BAD_STATUS 0x71
! 1526: #define HOST_MSG_LOOP 0x61
! 1527: #define PDATA_REINIT 0x51
! 1528: #define IGN_WIDE_RES 0x41
! 1529: #define NO_MATCH 0x31
! 1530: #define PROTO_VIOLATION 0x21
! 1531: #define SEND_REJECT 0x11
! 1532: #define INT_PEND 0x0f
! 1533: #define BAD_PHASE 0x01
! 1534: #define BRKADRINT 0x08
! 1535: #define SCSIINT 0x04
! 1536: #define CMDCMPLT 0x02
! 1537: #define SEQINT 0x01
! 1538:
! 1539: #define ERROR 0x92
! 1540: #define CIOPARERR 0x80
! 1541: #define PCIERRSTAT 0x40
! 1542: #define MPARERR 0x20
! 1543: #define DPARERR 0x10
! 1544: #define SQPARERR 0x08
! 1545: #define ILLOPCODE 0x04
! 1546: #define ILLSADDR 0x02
! 1547: #define ILLHADDR 0x01
! 1548:
! 1549: #define CLRINT 0x92
! 1550: #define CLRPARERR 0x10
! 1551: #define CLRBRKADRINT 0x08
! 1552: #define CLRSCSIINT 0x04
! 1553: #define CLRCMDINT 0x02
! 1554: #define CLRSEQINT 0x01
! 1555:
! 1556: #define DFCNTRL 0x93
! 1557:
! 1558: #define DFSTATUS 0x94
! 1559: #define PRELOAD_AVAIL 0x80
! 1560: #define DFCACHETH 0x40
! 1561: #define FIFOQWDEMP 0x20
! 1562: #define MREQPEND 0x10
! 1563: #define HDONE 0x08
! 1564: #define DFTHRESH 0x04
! 1565: #define FIFOFULL 0x02
! 1566: #define FIFOEMP 0x01
! 1567:
! 1568: #define DFWADDR 0x95
! 1569:
! 1570: #define DFRADDR 0x97
! 1571:
! 1572: #define DFDAT 0x99
! 1573:
! 1574: #define SCBCNT 0x9a
! 1575: #define SCBCNT_MASK 0x1f
! 1576: #define SCBAUTO 0x80
! 1577:
! 1578: #define QINFIFO 0x9b
! 1579:
! 1580: #define QINCNT 0x9c
! 1581:
! 1582: #define CRCCONTROL1 0x9d
! 1583: #define CRCONSEEN 0x80
! 1584: #define CRCVALCHKEN 0x40
! 1585: #define CRCENDCHKEN 0x20
! 1586: #define CRCREQCHKEN 0x10
! 1587: #define TARGCRCENDEN 0x08
! 1588: #define TARGCRCCNTEN 0x04
! 1589:
! 1590: #define QOUTFIFO 0x9d
! 1591:
! 1592: #define QOUTCNT 0x9e
! 1593:
! 1594: #define SCSIPHASE 0x9e
! 1595: #define DATA_PHASE_MASK 0x03
! 1596: #define STATUS_PHASE 0x20
! 1597: #define COMMAND_PHASE 0x10
! 1598: #define MSG_IN_PHASE 0x08
! 1599: #define MSG_OUT_PHASE 0x04
! 1600: #define DATA_IN_PHASE 0x02
! 1601: #define DATA_OUT_PHASE 0x01
! 1602:
! 1603: #define SFUNCT 0x9f
! 1604: #define ALT_MODE 0x80
! 1605:
! 1606: #define SCB_BASE 0xa0
! 1607:
! 1608: #define SCB_CDB_PTR 0xa0
! 1609: #define SCB_RESIDUAL_DATACNT 0xa0
! 1610: #define SCB_CDB_STORE 0xa0
! 1611:
! 1612: #define SCB_RESIDUAL_SGPTR 0xa4
! 1613:
! 1614: #define SCB_SCSI_STATUS 0xa8
! 1615:
! 1616: #define SCB_TARGET_PHASES 0xa9
! 1617:
! 1618: #define SCB_TARGET_DATA_DIR 0xaa
! 1619:
! 1620: #define SCB_TARGET_ITAG 0xab
! 1621:
! 1622: #define SCB_DATAPTR 0xac
! 1623:
! 1624: #define SCB_DATACNT 0xb0
! 1625: #define SG_HIGH_ADDR_BITS 0x7f
! 1626: #define SG_LAST_SEG 0x80
! 1627:
! 1628: #define SCB_SGPTR 0xb4
! 1629: #define SG_RESID_VALID 0x04
! 1630: #define SG_FULL_RESID 0x02
! 1631: #define SG_LIST_NULL 0x01
! 1632:
! 1633: #define SCB_CONTROL 0xb8
! 1634: #define SCB_TAG_TYPE 0x03
! 1635: #define STATUS_RCVD 0x80
! 1636: #define TARGET_SCB 0x80
! 1637: #define DISCENB 0x40
! 1638: #define TAG_ENB 0x20
! 1639: #define MK_MESSAGE 0x10
! 1640: #define ULTRAENB 0x08
! 1641: #define DISCONNECTED 0x04
! 1642:
! 1643: #define SCB_SCSIID 0xb9
! 1644: #define TID 0xf0
! 1645: #define TWIN_TID 0x70
! 1646: #define OID 0x0f
! 1647: #define TWIN_CHNLB 0x80
! 1648:
! 1649: #define SCB_LUN 0xba
! 1650: #define LID 0x3f
! 1651: #define SCB_XFERLEN_ODD 0x80
! 1652:
! 1653: #define SCB_TAG 0xbb
! 1654:
! 1655: #define SCB_CDB_LEN 0xbc
! 1656:
! 1657: #define SCB_SCSIRATE 0xbd
! 1658:
! 1659: #define SCB_SCSIOFFSET 0xbe
! 1660:
! 1661: #define SCB_NEXT 0xbf
! 1662:
! 1663: #define SCB_64_SPARE 0xc0
! 1664:
! 1665: #define SEECTL_2840 0xc0
! 1666: #define CS_2840 0x04
! 1667: #define CK_2840 0x02
! 1668: #define DO_2840 0x01
! 1669:
! 1670: #define STATUS_2840 0xc1
! 1671: #define BIOS_SEL 0x60
! 1672: #define ADSEL 0x1e
! 1673: #define EEPROM_TF 0x80
! 1674: #define DI_2840 0x01
! 1675:
! 1676: #define SCB_64_BTT 0xd0
! 1677:
! 1678: #define CCHADDR 0xe0
! 1679:
! 1680: #define CCHCNT 0xe8
! 1681:
! 1682: #define CCSGRAM 0xe9
! 1683:
! 1684: #define CCSGADDR 0xea
! 1685:
! 1686: #define CCSGCTL 0xeb
! 1687: #define CCSGDONE 0x80
! 1688: #define CCSGEN 0x08
! 1689: #define SG_FETCH_NEEDED 0x02
! 1690: #define CCSGRESET 0x01
! 1691:
! 1692: #define CCSCBRAM 0xec
! 1693:
! 1694: #define CCSCBADDR 0xed
! 1695:
! 1696: #define CCSCBCTL 0xee
! 1697: #define CCSCBDONE 0x80
! 1698: #define ARRDONE 0x40
! 1699: #define CCARREN 0x10
! 1700: #define CCSCBEN 0x08
! 1701: #define CCSCBDIR 0x04
! 1702: #define CCSCBRESET 0x01
! 1703:
! 1704: #define CCSCBCNT 0xef
! 1705:
! 1706: #define SCBBADDR 0xf0
! 1707:
! 1708: #define CCSCBPTR 0xf1
! 1709:
! 1710: #define HNSCB_QOFF 0xf4
! 1711:
! 1712: #define SNSCB_QOFF 0xf6
! 1713:
! 1714: #define SDSCB_QOFF 0xf8
! 1715:
! 1716: #define QOFF_CTLSTA 0xfa
! 1717: #define SCB_QSIZE 0x07
! 1718: #define SCB_QSIZE_256 0x06
! 1719: #define SCB_AVAIL 0x40
! 1720: #define SNSCB_ROLLOVER 0x20
! 1721: #define SDSCB_ROLLOVER 0x10
! 1722:
! 1723: #define DFF_THRSH 0xfb
! 1724: #define WR_DFTHRSH 0x70
! 1725: #define WR_DFTHRSH_MAX 0x70
! 1726: #define WR_DFTHRSH_90 0x60
! 1727: #define WR_DFTHRSH_85 0x50
! 1728: #define WR_DFTHRSH_75 0x40
! 1729: #define WR_DFTHRSH_63 0x30
! 1730: #define WR_DFTHRSH_50 0x20
! 1731: #define WR_DFTHRSH_25 0x10
! 1732: #define RD_DFTHRSH_MAX 0x07
! 1733: #define RD_DFTHRSH 0x07
! 1734: #define RD_DFTHRSH_90 0x06
! 1735: #define RD_DFTHRSH_85 0x05
! 1736: #define RD_DFTHRSH_75 0x04
! 1737: #define RD_DFTHRSH_63 0x03
! 1738: #define RD_DFTHRSH_50 0x02
! 1739: #define RD_DFTHRSH_25 0x01
! 1740: #define RD_DFTHRSH_MIN 0x00
! 1741: #define WR_DFTHRSH_MIN 0x00
! 1742:
! 1743: #define SG_CACHE_SHADOW 0xfc
! 1744: #define SG_ADDR_MASK 0xf8
! 1745: #define LAST_SEG 0x02
! 1746: #define LAST_SEG_DONE 0x01
! 1747:
! 1748: #define SG_CACHE_PRE 0xfc
! 1749:
! 1750:
! 1751: #define MAX_OFFSET_ULTRA2 0x7f
! 1752: #define SCB_LIST_NULL 0xff
! 1753: #define HOST_MSG 0xff
! 1754: #define MAX_OFFSET 0x7f
! 1755: #define BUS_32_BIT 0x02
! 1756: #define CMD_GROUP_CODE_SHIFT 0x05
! 1757: #define BUS_8_BIT 0x00
! 1758: #define CCSGRAM_MAXSEGS 0x10
! 1759: #define TARGET_DATA_IN 0x01
! 1760: #define STATUS_QUEUE_FULL 0x28
! 1761: #define STATUS_BUSY 0x08
! 1762: #define MAX_OFFSET_8BIT 0x0f
! 1763: #define BUS_16_BIT 0x01
! 1764: #define TID_SHIFT 0x04
! 1765: #define SCB_DOWNLOAD_SIZE_64 0x30
! 1766: #define SCB_UPLOAD_SIZE 0x20
! 1767: #define HOST_MAILBOX_SHIFT 0x04
! 1768: #define MAX_OFFSET_16BIT 0x08
! 1769: #define TARGET_CMD_CMPLT 0xfe
! 1770: #define SG_SIZEOF 0x08
! 1771: #define SCB_DOWNLOAD_SIZE 0x20
! 1772: #define SEQ_MAILBOX_SHIFT 0x00
! 1773: #define CCSGADDR_MAX 0x80
! 1774: #define STACK_SIZE 0x04
! 1775:
! 1776:
! 1777: /* Downloaded Constant Definitions */
! 1778: #define SG_PREFETCH_ADDR_MASK 0x06
! 1779: #define SG_PREFETCH_ALIGN_MASK 0x05
! 1780: #define QOUTFIFO_OFFSET 0x00
! 1781: #define SG_PREFETCH_CNT 0x04
! 1782: #define INVERTED_CACHESIZE_MASK 0x03
! 1783: #define CACHESIZE_MASK 0x02
! 1784: #define QINFIFO_OFFSET 0x01
! 1785: #define DOWNLOAD_CONST_COUNT 0x07
! 1786:
! 1787:
! 1788: /* Exported Labels */
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