Annotation of sys/dev/microcode/adw/adwmcode.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: adwmcode.h,v 1.3 2003/02/11 19:20:27 mickey Exp $ */
! 2: /* $NetBSD: adwmcode.h,v 1.5 2000/05/27 18:24:51 dante Exp $ */
! 3:
! 4: /*
! 5: * Generic driver definitions and exported functions for the Advanced
! 6: * Systems Inc. SCSI controllers
! 7: *
! 8: * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
! 9: * All rights reserved.
! 10: *
! 11: * Author: Baldassare Dante Profeta <dante@mclink.it>
! 12: *
! 13: * Redistribution and use in source and binary forms, with or without
! 14: * modification, are permitted provided that the following conditions
! 15: * are met:
! 16: * 1. Redistributions of source code must retain the above copyright
! 17: * notice, this list of conditions and the following disclaimer.
! 18: * 2. Redistributions in binary form must reproduce the above copyright
! 19: * notice, this list of conditions and the following disclaimer in the
! 20: * documentation and/or other materials provided with the distribution.
! 21: * 3. All advertising materials mentioning features or use of this software
! 22: * must display the following acknowledgement:
! 23: * This product includes software developed by the NetBSD
! 24: * Foundation, Inc. and its contributors.
! 25: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 26: * contributors may be used to endorse or promote products derived
! 27: * from this software without specific prior written permission.
! 28: *
! 29: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 30: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 31: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 32: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 33: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 34: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 35: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 36: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 37: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 38: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 39: * POSSIBILITY OF SUCH DAMAGE.
! 40: */
! 41:
! 42: #ifndef ADW_MCODE_H
! 43: #define ADW_MCODE_H
! 44:
! 45: /******************************************************************************/
! 46:
! 47: #define ADW_MAX_CARRIER 253 /* Max. number of host commands (253) */
! 48:
! 49: /*
! 50: * ADW_CARRIER must be exactly 16 BYTES
! 51: * Every adw_carrier structure _MUST_ always be aligned on a 16 bytes boundary
! 52: */
! 53: struct adw_carrier {
! 54: /* ---------- the microcode wants the field below ---------- */
! 55: u_int32_t carr_id; /* Carrier ID */
! 56: u_int32_t carr_ba; /* Carrier Bus Address */
! 57: u_int32_t areq_ba; /* ADW_SCSI_REQ_Q Bus Address */
! 58: /*
! 59: * next_ba [31:4] Carrier Physical Next Pointer
! 60: *
! 61: * next_ba [3:1] Reserved Bits
! 62: * next_ba [0] Done Flag set in Response Queue.
! 63: */
! 64: u_int32_t next_ba; /* see next_ba flags below */
! 65: /* ---------- ---------- */
! 66: };
! 67:
! 68: typedef struct adw_carrier ADW_CARRIER;
! 69:
! 70: /*
! 71: * next_ba flags
! 72: */
! 73: #define ADW_RQ_DONE 0x00000001
! 74: #define ADW_RQ_GOOD 0x00000002
! 75: #define ADW_CQ_STOPPER 0x00000000
! 76:
! 77: /*
! 78: * Mask used to eliminate low 4 bits of carrier 'next_ba' field.
! 79: */
! 80: #define ADW_NEXT_BA_MASK 0xFFFFFFF0
! 81: #define ADW_GET_CARRP(carrp) ((carrp) & ADW_NEXT_BA_MASK)
! 82:
! 83: /*
! 84: * Bus Address of a Carrier.
! 85: * ba = base_ba + v_address - base_va
! 86: */
! 87: #define ADW_CARRIER_BADDR(dmamap, carriers, x) ((dmamap)->dm_segs[0].ds_addr +\
! 88: (((u_long)x) - ((u_long)(carriers))))
! 89: /*
! 90: * Virtual Address of a Carrier.
! 91: * va = base_va + bus_address - base_ba
! 92: */
! 93: #define ADW_CARRIER_VADDR(sc, x) ((ADW_CARRIER *) \
! 94: (((u_int8_t *)(sc)->sc_control->carriers) + \
! 95: ((u_long)x) - \
! 96: (sc)->sc_dmamap_carrier->dm_segs[0].ds_addr))
! 97:
! 98: /******************************************************************************/
! 99:
! 100: struct adw_mcode {
! 101: const u_int8_t *mcode_data;
! 102: const u_int32_t mcode_chksum;
! 103: const u_int16_t mcode_size;
! 104: };
! 105:
! 106:
! 107: /******************************************************************************/
! 108:
! 109: /*
! 110: * Fixed locations of microcode operating variables.
! 111: */
! 112: #define ADW_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */
! 113: #define ADW_MC_CODE_END_ADDR 0x002A /* microcode end address */
! 114: #define ADW_MC_CODE_CHK_SUM 0x002C /* microcode code checksum */
! 115: #define ADW_MC_VERSION_DATE 0x0038 /* microcode version */
! 116: #define ADW_MC_VERSION_NUM 0x003A /* microcode number */
! 117: #define ADW_MC_BIOSMEM 0x0040 /* BIOS RISC Memory Start */
! 118: #define ADW_MC_BIOSLEN 0x0050 /* BIOS RISC Memory Length */
! 119: #define ADW_MC_BIOS_SIGNATURE 0x0058 /* BIOS Signature 0x55AA */
! 120: #define ADW_MC_BIOS_VERSION 0x005A /* BIOS Version (2 bytes) */
! 121:
! 122: #define ADW_MC_SDTR_SPEED1 0x0090 /* SDTR Speed for TID 0-3 */
! 123: #define ADW_MC_SDTR_SPEED2 0x0092 /* SDTR Speed for TID 4-7 */
! 124: #define ADW_MC_SDTR_SPEED3 0x0094 /* SDTR Speed for TID 8-11 */
! 125: #define ADW_MC_SDTR_SPEED4 0x0096 /* SDTR Speed for TID 12-15 */
! 126: /*
! 127: * 4-bit speed SDTR speed name
! 128: * =========== ===============
! 129: * 0000b (0x0) SDTR disabled
! 130: * 0001b (0x1) 5 MHz
! 131: * 0010b (0x2) 10 MHz
! 132: * 0011b (0x3) 20 MHz (Ultra)
! 133: * 0100b (0x4) 40 MHz (LVD/Ultra2)
! 134: * 0101b (0x5) 80 MHz (LVD2/Ultra3)
! 135: * 0110b (0x6) Undefined
! 136: * ...
! 137: * 1111b (0xF) Undefined
! 138: */
! 139: #define ADW_MC_CHIP_TYPE 0x009A
! 140: #define ADW_MC_INTRB_CODE 0x009B
! 141: #define ADW_MC_WDTR_ABLE 0x009C
! 142: #define ADW_MC_SDTR_ABLE 0x009E
! 143: #define ADW_MC_TAGQNG_ABLE 0x00A0
! 144: #define ADW_MC_DISC_ENABLE 0x00A2
! 145: #define ADW_MC_IDLE_CMD_STATUS 0x00A4
! 146: #define ADW_MC_IDLE_CMD 0x00A6
! 147: #define ADW_MC_IDLE_CMD_PARAMETER 0x00A8
! 148: #define ADW_MC_DEFAULT_SCSI_CFG0 0x00AC
! 149: #define ADW_MC_DEFAULT_SCSI_CFG1 0x00AE
! 150: #define ADW_MC_DEFAULT_MEM_CFG 0x00B0
! 151: #define ADW_MC_DEFAULT_SEL_MASK 0x00B2
! 152: #define ADW_MC_SDTR_DONE 0x00B6
! 153: #define ADW_MC_NUMBER_OF_QUEUED_CMD 0x00C0
! 154: #define ADW_MC_NUMBER_OF_MAX_CMD 0x00D0
! 155: #define ADW_MC_DEVICE_HSHK_CFG_TABLE 0x0100
! 156: #define ADW_MC_CONTROL_FLAG 0x0122 /* Microcode control flag. */
! 157: #define ADW_MC_WDTR_DONE 0x0124
! 158: #define ADW_MC_CAM_MODE_MASK 0x015E /* CAM mode TID bitmask. */
! 159: #define ADW_MC_ICQ 0x0160
! 160: #define ADW_MC_IRQ 0x0164
! 161: #define ADW_MC_PPR_ABLE 0x017A
! 162:
! 163:
! 164: /*
! 165: * Microcode Control Flags
! 166: *
! 167: * Flags set by the Adw Library in RISC variable 'control_flag' (0x122)
! 168: * and handled by the microcode.
! 169: */
! 170: #define CONTROL_FLAG_IGNORE_PERR 0x0001 /* Ignore DMA Parity Errors */
! 171: #define CONTROL_FLAG_ENABLE_AIPP 0x0002 /* Enabled AIPP checking. */
! 172:
! 173:
! 174: /*
! 175: * ADW_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format
! 176: */
! 177: #define HSHK_CFG_WIDE_XFR 0x8000
! 178: #define HSHK_CFG_RATE 0x0F00
! 179: #define HSHK_CFG_OFFSET 0x001F
! 180:
! 181: #define ADW_DEF_MAX_HOST_QNG 0xFD /* Max. number of host commands (253) */
! 182: #define ADW_DEF_MIN_HOST_QNG 0x10 /* Min. number of host commands (16) */
! 183: #define ADW_DEF_MAX_DVC_QNG 0x3F /* Max. number commands per device (63) */
! 184: #define ADW_DEF_MIN_DVC_QNG 0x04 /* Min. number commands per device (4) */
! 185:
! 186: #define ADW_QC_DATA_CHECK 0x01 /* Require ADW_QC_DATA_OUT set or clear. */
! 187: #define ADW_QC_DATA_OUT 0x02 /* Data out DMA transfer. */
! 188: #define ADW_QC_START_MOTOR 0x04 /* Send auto-start motor before request. */
! 189: #define ADW_QC_NO_OVERRUN 0x08 /* Don't report overrun. */
! 190: #define ADW_QC_FREEZE_TIDQ 0x10 /* Freeze TID queue after request.XXX TBD*/
! 191:
! 192: #define ADW_QSC_NO_DISC 0x01 /* Don't allow disconnect for request. */
! 193: #define ADW_QSC_NO_TAGMSG 0x02 /* Don't allow tag queuing for request. */
! 194: #define ADW_QSC_NO_SYNC 0x04 /* Don't use Synch. transfer on request. */
! 195: #define ADW_QSC_NO_WIDE 0x08 /* Don't use Wide transfer on request. */
! 196: #define ADW_QSC_REDO_DTR 0x10 /* Renegotiate WDTR/SDTR before request. */
! 197: /*
! 198: * Note: If a Tag Message is to be sent and neither ADW_QSC_HEAD_TAG or
! 199: * ADW_QSC_ORDERED_TAG is set, then a Simple Tag Message (0x20) is used.
! 200: */
! 201: #define ADW_QSC_HEAD_TAG 0x40 /* Use Head Tag Message (0x21). */
! 202: #define ADW_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */
! 203:
! 204:
! 205: /******************************************************************************/
! 206:
! 207: ADW_CARRIER *AdwInitCarriers(bus_dmamap_t, ADW_CARRIER *);
! 208:
! 209: extern const struct adw_mcode adw_asc3550_mcode_data;
! 210: extern const struct adw_mcode adw_asc38C0800_mcode_data;
! 211: extern const struct adw_mcode adw_asc38C1600_mcode_data;
! 212: /******************************************************************************/
! 213:
! 214: #endif /* ADW_MCODE_H */
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to adwmcode.h CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / dev / microcode / adw