File: [local] / sys / dev / isa / lm78_isa.c (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:11:23 2008 UTC (16 years, 6 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: lm78_isa.c,v 1.2 2007/07/01 21:48:57 cnst Exp $ */
/*
* Copyright (c) 2005, 2006 Mark Kettenis
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/sensors.h>
#include <machine/bus.h>
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#include <dev/ic/lm78var.h>
#include <dev/isa/itvar.h>
/* ISA registers */
#define LMC_ADDR 0x05
#define LMC_DATA 0x06
extern struct cfdriver lm_cd;
#if defined(LMDEBUG)
#define DPRINTF(x) do { printf x; } while (0)
#else
#define DPRINTF(x)
#endif
struct lm_isa_softc {
struct lm_softc sc_lmsc;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
};
int lm_isa_match(struct device *, void *, void *);
void lm_isa_attach(struct device *, struct device *, void *);
u_int8_t lm_isa_readreg(struct lm_softc *, int);
void lm_isa_writereg(struct lm_softc *, int, int);
struct cfattach lm_isa_ca = {
sizeof(struct lm_isa_softc),
lm_isa_match,
lm_isa_attach
};
int
lm_isa_match(struct device *parent, void *match, void *aux)
{
bus_space_tag_t iot;
bus_addr_t iobase;
bus_space_handle_t ioh;
struct isa_attach_args *ia = aux;
int banksel, vendid, chipid, addr;
iot = ia->ia_iot;
iobase = ia->ipa_io[0].base;
if (bus_space_map(iot, iobase, 8, 0, &ioh)) {
DPRINTF(("%s: can't map i/o space\n", __func__));
return (0);
}
/* Probe for Winbond chips. */
bus_space_write_1(iot, ioh, LMC_ADDR, WB_BANKSEL);
banksel = bus_space_read_1(iot, ioh, LMC_DATA);
bus_space_write_1(iot, ioh, LMC_ADDR, WB_VENDID);
vendid = bus_space_read_1(iot, ioh, LMC_DATA);
if (((banksel & 0x80) && vendid == (WB_VENDID_WINBOND >> 8)) ||
(!(banksel & 0x80) && vendid == (WB_VENDID_WINBOND & 0xff)))
goto found;
/* Probe for ITE chips (and don't attach if we find one). */
bus_space_write_1(iot, ioh, LMC_ADDR, ITD_CHIPID);
vendid = bus_space_read_1(iot, ioh, LMC_DATA);
if (vendid == IT_ID_IT87)
goto notfound;
/*
* Probe for National Semiconductor LM78/79/81.
*
* XXX This assumes the address has not been changed from the
* power up default. This is probably a reasonable
* assumption, and if it isn't true, we should be able to
* access the chip using the serial bus.
*/
bus_space_write_1(iot, ioh, LMC_ADDR, LM_SBUSADDR);
addr = bus_space_read_1(iot, ioh, LMC_DATA);
if ((addr & 0xfc) == 0x2c) {
bus_space_write_1(iot, ioh, LMC_ADDR, LM_CHIPID);
chipid = bus_space_read_1(iot, ioh, LMC_DATA);
switch (chipid & LM_CHIPID_MASK) {
case LM_CHIPID_LM78:
case LM_CHIPID_LM78J:
case LM_CHIPID_LM79:
case LM_CHIPID_LM81:
goto found;
}
}
notfound:
bus_space_unmap(iot, ioh, 8);
return (0);
found:
bus_space_unmap(iot, ioh, 8);
ia->ipa_nio = 1;
ia->ipa_io[0].length = 8;
ia->ipa_nmem = 0;
ia->ipa_nirq = 0;
ia->ipa_ndrq = 0;
return (1);
}
void
lm_isa_attach(struct device *parent, struct device *self, void *aux)
{
struct lm_isa_softc *sc = (struct lm_isa_softc *)self;
struct isa_attach_args *ia = aux;
struct lm_softc *lmsc;
bus_addr_t iobase;
int i;
u_int8_t sbusaddr;
sc->sc_iot = ia->ia_iot;
iobase = ia->ipa_io[0].base;
if (bus_space_map(sc->sc_iot, iobase, 8, 0, &sc->sc_ioh)) {
printf(": can't map i/o space\n");
return;
}
/* Bus-independant attachment */
sc->sc_lmsc.lm_writereg = lm_isa_writereg;
sc->sc_lmsc.lm_readreg = lm_isa_readreg;
lm_attach(&sc->sc_lmsc);
/*
* Most devices supported by this driver can attach to iic(4)
* as well. However, we prefer to attach them to isa(4) since
* that causes less overhead and is more reliable. We look
* through all previously attached devices, and if we find an
* identical chip at the same serial bus address, we stop
* updating its sensors and mark them as invalid.
*/
sbusaddr = lm_isa_readreg(&sc->sc_lmsc, LM_SBUSADDR);
if (sbusaddr == 0)
return;
for (i = 0; i < lm_cd.cd_ndevs; i++) {
lmsc = lm_cd.cd_devs[i];
if (lmsc == &sc->sc_lmsc)
continue;
if (lmsc && lmsc->sbusaddr == sbusaddr &&
lmsc->chipid == sc->sc_lmsc.chipid)
config_detach(&lmsc->sc_dev, 0);
}
}
u_int8_t
lm_isa_readreg(struct lm_softc *lmsc, int reg)
{
struct lm_isa_softc *sc = (struct lm_isa_softc *)lmsc;
bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMC_ADDR, reg);
return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, LMC_DATA));
}
void
lm_isa_writereg(struct lm_softc *lmsc, int reg, int val)
{
struct lm_isa_softc *sc = (struct lm_isa_softc *)lmsc;
bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMC_ADDR, reg);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMC_DATA, val);
}