Annotation of sys/dev/isa/if_exreg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: if_exreg.h,v 1.1 1997/09/11 21:30:49 gene Exp $ */
! 2: /*
! 3: * Copyright (c) 1996, Javier Martín Rueda (jmrueda@diatel.upm.es)
! 4: * All rights reserved.
! 5: *
! 6: * Redistribution and use in source and binary forms, with or without
! 7: * modification, are permitted provided that the following conditions
! 8: * are met:
! 9: * 1. Redistributions of source code must retain the above copyright
! 10: * notice unmodified, this list of conditions, and the following
! 11: * disclaimer.
! 12: * 2. Redistributions in binary form must reproduce the above copyright
! 13: * notice, this list of conditions and the following disclaimer in the
! 14: * documentation and/or other materials provided with the distribution.
! 15: *
! 16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
! 17: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 18: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 19: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
! 20: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 21: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 22: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 24: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 25: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 26: * SUCH DAMAGE.
! 27: */
! 28:
! 29: /*
! 30: * Intel EtherExpress Pro/10 Ethernet driver
! 31: */
! 32:
! 33: /*
! 34: * Several constants.
! 35: */
! 36:
! 37: /* Length of an ethernet address. */
! 38: #define ETHER_ADDR_LEN 6
! 39: /* Default RAM size in board. */
! 40: #define CARD_RAM_SIZE 0x8000
! 41: /* Number of I/O ports used. */
! 42: #define EX_IOSIZE 16
! 43:
! 44: /*
! 45: * Intel EtherExpress Pro (i82595 based) registers
! 46: */
! 47:
! 48: /* Common registers to all banks. */
! 49:
! 50: #define CMD_REG 0
! 51: #define REG1 1
! 52: #define REG2 2
! 53: #define REG3 3
! 54: #define REG4 4
! 55: #define REG5 5
! 56: #define REG6 6
! 57: #define REG7 7
! 58: #define REG8 8
! 59: #define REG9 9
! 60: #define REG10 10
! 61: #define REG11 11
! 62: #define REG12 12
! 63: #define REG13 13
! 64: #define REG14 14
! 65: #define REG15 15
! 66:
! 67: /* Definitions for command register (CMD_REG). */
! 68:
! 69: #define Switch_Bank_CMD 0
! 70: #define MC_Setup_CMD 3
! 71: #define Transmit_CMD 4
! 72: #define Diagnose_CMD 7
! 73: #define Rcv_Enable_CMD 8
! 74: #define Rcv_Stop 11
! 75: #define Reset_CMD 14
! 76: #define Resume_XMT_List_CMD 28
! 77: #define Sel_Reset_CMD 30
! 78: #define Abort 0x20
! 79: #define Bank0_Sel 0x00
! 80: #define Bank1_Sel 0x40
! 81: #define Bank2_Sel 0x80
! 82:
! 83: /* Bank 0 specific registers. */
! 84:
! 85: #define STATUS_REG 1
! 86: #define ID_REG 2
! 87: #define Id_Mask 0x2c
! 88: #define Id_Sig 0x24
! 89: #define Counter_bits 0xc0
! 90: #define MASK_REG 3
! 91: #define Exec_Int 0x08
! 92: #define Tx_Int 0x04
! 93: #define Rx_Int 0x02
! 94: #define Rx_Stp_Int 0x01
! 95: #define All_Int 0x0f
! 96: #define RCV_BAR 4
! 97: #define RCV_BAR_Lo 4
! 98: #define RCV_BAR_Hi 5
! 99: #define RCV_STOP_REG 6
! 100: #define XMT_BAR 10
! 101: #define HOST_ADDR_REG 12 /* 16-bit register */
! 102: #define IO_PORT_REG 14 /* 16-bit register */
! 103:
! 104: /* Bank 1 specific registers. */
! 105:
! 106: #define TriST_INT 0x80
! 107: #define INT_NO_REG 2
! 108: #define RCV_LOWER_LIMIT_REG 8
! 109: #define RCV_UPPER_LIMIT_REG 9
! 110: #define XMT_LOWER_LIMIT_REG 10
! 111: #define XMT_UPPER_LIMIT_REG 11
! 112:
! 113: /* Bank 2 specific registers. */
! 114:
! 115: #define Disc_Bad_Fr 0x80
! 116: #define Tx_Chn_ErStp 0x40
! 117: #define Tx_Chn_Int_Md 0x20
! 118: #define No_SA_Ins 0x10
! 119: #define RX_CRC_InMem 0x04
! 120: #define BNC_bit 0x20
! 121: #define TPE_bit 0x04
! 122: #define I_ADDR_REG0 4
! 123: #define EEPROM_REG 10
! 124: #define Trnoff_Enable 0x10
! 125:
! 126: /* EEPROM memory positions (16-bit wide). */
! 127:
! 128: #define EE_IRQ_No 1
! 129: #define IRQ_No_Mask 0x07
! 130: #define EE_Eth_Addr_Lo 2
! 131: #define EE_Eth_Addr_Mid 3
! 132: #define EE_Eth_Addr_Hi 4
! 133:
! 134: /* EEPROM serial interface. */
! 135:
! 136: #define EESK 0x01
! 137: #define EECS 0x02
! 138: #define EEDI 0x04
! 139: #define EEDO 0x08
! 140: #define EE_READ_CMD (6 << 6)
! 141:
! 142: /* Frame chain constants. */
! 143:
! 144: /* Transmit header length (in board's ring buffer). */
! 145: #define XMT_HEADER_LEN 8
! 146: #define XMT_Chain_Point 4
! 147: #define XMT_Byte_Count 6
! 148: #define Done_bit 0x0080
! 149: #define Ch_bit 0x8000
! 150: /* Transmit result bits. */
! 151: #define No_Collisions_bits 0x000f
! 152: #define TX_OK_bit 0x2000
! 153: /* Receive result bits. */
! 154: #define RCV_Done 8
! 155: #define RCV_OK_bit 0x2000
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