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File: [local] / sys / dev / isa / if_elreg.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:11:21 2008 UTC (16 years, 2 months ago) by nbrk
Import of OpenBSD 4.2 release kernel tree with initial code to support Jornada 720/728, StrongARM 1110-based handheld PC. At this point kernel roots on NFS and boots into vfs_mountroot() and traps. What is supported: - glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode (needs some palette tweaks for non black/white/blue colors, i think) - saic, SA11x0 interrupt controller (needs cleanup) - sacom, SA11x0 UART (supported only as boot console for now) - SA11x0 GPIO controller fully supported (but can't handle multiple interrupt handlers on one gpio pin) - sassp, SSP port on SA11x0 that attaches spibus - Jornada microcontroller (jmcu) to control kbd, battery, etc throught the SPI bus (wskbd attaches on jmcu, but not tested) - tod functions seem work - initial code for SA-1111 (chip companion) : this is TODO Next important steps, i think: - gpio and intc on sa1111 - pcmcia support for sa11x0 (and sa1111 help logic) - REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs) - root on wd0! (using already supported PCMCIA-ATA) |
/* $OpenBSD: if_elreg.h,v 1.2 1997/11/07 08:06:50 niklas Exp $ */ /* $NetBSD: if_elreg.h,v 1.4 1994/10/27 04:17:29 cgd Exp $ */ /* * Copyright (c) 1994, Matthew E. Kimmel. Permission is hereby granted * to use, copy, modify and distribute this software provided that both * the copyright notice and this permission notice appear in all copies * of the software, derivative works or modified versions, and any * portions thereof. */ /* * 3COM Etherlink 3C501 Register Definitions */ /* * I/O Ports */ #define EL_RXS 0x6 /* Receive status register */ #define EL_RXC 0x6 /* Receive command register */ #define EL_TXS 0x7 /* Transmit status register */ #define EL_TXC 0x7 /* Transmit command register */ #define EL_GPBL 0x8 /* GP buffer ptr low byte */ #define EL_GPBH 0x9 /* GP buffer ptr high byte */ #define EL_RBL 0xa /* Receive buffer ptr low byte */ #define EL_RBC 0xa /* Receive buffer clear */ #define EL_RBH 0xb /* Receive buffer ptr high byte */ #define EL_EAW 0xc /* Ethernet address window */ #define EL_AS 0xe /* Auxillary status register */ #define EL_AC 0xe /* Auxillary command register */ #define EL_BUF 0xf /* Data buffer */ /* Receive status register bits */ #define EL_RXS_OFLOW 0x01 /* Overflow error */ #define EL_RXS_FCS 0x02 /* FCS error */ #define EL_RXS_DRIB 0x04 /* Dribble error */ #define EL_RXS_SHORT 0x08 /* Short frame */ #define EL_RXS_NOFLOW 0x10 /* No overflow */ #define EL_RXS_GOOD 0x20 /* Received good frame */ #define EL_RXS_STALE 0x80 /* Stale receive status */ /* Receive command register bits */ #define EL_RXC_DISABLE 0x00 /* Receiver disabled */ #define EL_RXC_DOFLOW 0x01 /* Detect overflow */ #define EL_RXC_DFCS 0x02 /* Detect FCS errs */ #define EL_RXC_DDRIB 0x04 /* Detect dribble errors */ #define EL_RXC_DSHORT 0x08 /* Detect short frames */ #define EL_RXC_DNOFLOW 0x10 /* Detect frames w/o overflow ??? */ #define EL_RXC_AGF 0x20 /* Accept Good Frames */ #define EL_RXC_PROMISC 0x40 /* Promiscuous mode */ #define EL_RXC_ABROAD 0x80 /* Accept address, broadcast */ #define EL_RXC_AMULTI 0xc0 /* Accept address, multicast */ /* Transmit status register bits */ #define EL_TXS_UFLOW 0x01 /* Underflow */ #define EL_TXS_COLL 0x02 /* Collision */ #define EL_TXS_COLL16 0x04 /* Collision 16 */ #define EL_TXS_READY 0x08 /* Ready for new frame */ /* Transmit command register bits */ #define EL_TXC_DUFLOW 0x01 /* Detect underflow */ #define EL_TXC_DCOLL 0x02 /* Detect collisions */ #define EL_TXC_DCOLL16 0x04 /* Detect collision 16 */ #define EL_TXC_DSUCCESS 0x08 /* Detect success */ /* Auxillary status register bits */ #define EL_AS_RXBUSY 0x01 /* Receive busy */ #define EL_AS_DMADONE 0x10 /* DMA finished */ #define EL_AS_TXBUSY 0x80 /* Transmit busy */ /* Auxillary command register bits */ #define EL_AC_HOST 0x00 /* System bus can access buffer */ #define EL_AC_IRQE 0x01 /* IRQ enable */ #define EL_AC_TXBAD 0x02 /* Transmit frames with bad FCS */ #define EL_AC_TXFRX 0x04 /* Transmit followed by receive */ #define EL_AC_RX 0x08 /* Receive */ #define EL_AC_LB 0x0c /* Loopback */ #define EL_AC_DRQ 0x20 /* DMA request */ #define EL_AC_RIDE 0x40 /* DRQ and IRQ enabled */ #define EL_AC_RESET 0x80 /* Reset */ /* Packet buffer size */ #define EL_BUFSIZ 2048