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Annotation of sys/dev/isa/if_elreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: if_elreg.h,v 1.2 1997/11/07 08:06:50 niklas Exp $     */
                      2: /*     $NetBSD: if_elreg.h,v 1.4 1994/10/27 04:17:29 cgd Exp $ */
                      3:
                      4: /*
                      5:  * Copyright (c) 1994, Matthew E. Kimmel.  Permission is hereby granted
                      6:  * to use, copy, modify and distribute this software provided that both
                      7:  * the copyright notice and this permission notice appear in all copies
                      8:  * of the software, derivative works or modified versions, and any
                      9:  * portions thereof.
                     10:  */
                     11:
                     12: /*
                     13:  * 3COM Etherlink 3C501 Register Definitions
                     14:  */
                     15:
                     16: /*
                     17:  * I/O Ports
                     18:  */
                     19: #define        EL_RXS          0x6     /* Receive status register */
                     20: #define        EL_RXC          0x6     /* Receive command register */
                     21: #define        EL_TXS          0x7     /* Transmit status register */
                     22: #define        EL_TXC          0x7     /* Transmit command register */
                     23: #define        EL_GPBL         0x8     /* GP buffer ptr low byte */
                     24: #define        EL_GPBH         0x9     /* GP buffer ptr high byte */
                     25: #define        EL_RBL          0xa     /* Receive buffer ptr low byte */
                     26: #define        EL_RBC          0xa     /* Receive buffer clear */
                     27: #define        EL_RBH          0xb     /* Receive buffer ptr high byte */
                     28: #define        EL_EAW          0xc     /* Ethernet address window */
                     29: #define        EL_AS           0xe     /* Auxillary status register */
                     30: #define        EL_AC           0xe     /* Auxillary command register */
                     31: #define        EL_BUF          0xf     /* Data buffer */
                     32:
                     33: /* Receive status register bits */
                     34: #define        EL_RXS_OFLOW    0x01    /* Overflow error */
                     35: #define        EL_RXS_FCS      0x02    /* FCS error */
                     36: #define        EL_RXS_DRIB     0x04    /* Dribble error */
                     37: #define        EL_RXS_SHORT    0x08    /* Short frame */
                     38: #define        EL_RXS_NOFLOW   0x10    /* No overflow */
                     39: #define        EL_RXS_GOOD     0x20    /* Received good frame */
                     40: #define        EL_RXS_STALE    0x80    /* Stale receive status */
                     41:
                     42: /* Receive command register bits */
                     43: #define        EL_RXC_DISABLE  0x00    /* Receiver disabled */
                     44: #define        EL_RXC_DOFLOW   0x01    /* Detect overflow */
                     45: #define        EL_RXC_DFCS     0x02    /* Detect FCS errs */
                     46: #define        EL_RXC_DDRIB    0x04    /* Detect dribble errors */
                     47: #define        EL_RXC_DSHORT   0x08    /* Detect short frames */
                     48: #define        EL_RXC_DNOFLOW  0x10    /* Detect frames w/o overflow ??? */
                     49: #define        EL_RXC_AGF      0x20    /* Accept Good Frames */
                     50: #define        EL_RXC_PROMISC  0x40    /* Promiscuous mode */
                     51: #define        EL_RXC_ABROAD   0x80    /* Accept address, broadcast */
                     52: #define        EL_RXC_AMULTI   0xc0    /* Accept address, multicast */
                     53:
                     54: /* Transmit status register bits */
                     55: #define        EL_TXS_UFLOW    0x01    /* Underflow */
                     56: #define        EL_TXS_COLL     0x02    /* Collision */
                     57: #define        EL_TXS_COLL16   0x04    /* Collision 16 */
                     58: #define        EL_TXS_READY    0x08    /* Ready for new frame */
                     59:
                     60: /* Transmit command register bits */
                     61: #define        EL_TXC_DUFLOW   0x01    /* Detect underflow */
                     62: #define        EL_TXC_DCOLL    0x02    /* Detect collisions */
                     63: #define        EL_TXC_DCOLL16  0x04    /* Detect collision 16 */
                     64: #define        EL_TXC_DSUCCESS 0x08    /* Detect success */
                     65:
                     66: /* Auxillary status register bits */
                     67: #define        EL_AS_RXBUSY    0x01    /* Receive busy */
                     68: #define        EL_AS_DMADONE   0x10    /* DMA finished */
                     69: #define        EL_AS_TXBUSY    0x80    /* Transmit busy */
                     70:
                     71: /* Auxillary command register bits */
                     72: #define        EL_AC_HOST      0x00    /* System bus can access buffer */
                     73: #define        EL_AC_IRQE      0x01    /* IRQ enable */
                     74: #define        EL_AC_TXBAD     0x02    /* Transmit frames with bad FCS */
                     75: #define        EL_AC_TXFRX     0x04    /* Transmit followed by receive */
                     76: #define        EL_AC_RX        0x08    /* Receive */
                     77: #define        EL_AC_LB        0x0c    /* Loopback */
                     78: #define        EL_AC_DRQ       0x20    /* DMA request */
                     79: #define        EL_AC_RIDE      0x40    /* DRQ and IRQ enabled */
                     80: #define        EL_AC_RESET     0x80    /* Reset */
                     81:
                     82: /* Packet buffer size */
                     83: #define        EL_BUFSIZ       2048