Annotation of sys/dev/ic/tcic2var.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: tcic2var.h,v 1.4 2005/11/23 11:39:37 mickey Exp $ */
! 2: /* $NetBSD: tcic2var.h,v 1.1 1999/03/23 20:04:14 bad Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
! 6: * Copyright (c) 1997 Marc Horowitz. All rights reserved.
! 7: *
! 8: * Redistribution and use in source and binary forms, with or without
! 9: * modification, are permitted provided that the following conditions
! 10: * are met:
! 11: * 1. Redistributions of source code must retain the above copyright
! 12: * notice, this list of conditions and the following disclaimer.
! 13: * 2. Redistributions in binary form must reproduce the above copyright
! 14: * notice, this list of conditions and the following disclaimer in the
! 15: * documentation and/or other materials provided with the distribution.
! 16: * 3. All advertising materials mentioning features or use of this software
! 17: * must display the following acknowledgement:
! 18: * This product includes software developed by Marc Horowitz.
! 19: * 4. The name of the author may not be used to endorse or promote products
! 20: * derived from this software without specific prior written permission.
! 21: *
! 22: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 23: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 24: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 25: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
! 26: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
! 27: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
! 28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
! 29: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
! 30: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
! 31: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! 32: */
! 33:
! 34: #ifndef _TCIC2VAR_H
! 35: #define _TCIC2VAR_H
! 36:
! 37: #include <sys/device.h>
! 38:
! 39: #include <dev/pcmcia/pcmciareg.h>
! 40: #include <dev/pcmcia/pcmciachip.h>
! 41:
! 42: #include <dev/ic/tcic2reg.h>
! 43:
! 44: struct proc;
! 45:
! 46: struct tcic_event {
! 47: SIMPLEQ_ENTRY(tcic_event) pe_q;
! 48: int pe_type;
! 49: };
! 50:
! 51: /* pe_type */
! 52: #define TCIC_EVENT_INSERTION 0
! 53: #define TCIC_EVENT_REMOVAL 1
! 54:
! 55:
! 56: struct tcic_handle {
! 57: struct tcic_softc *sc;
! 58: int sock; /* socket number */
! 59: int flags;
! 60: int sstat; /* last value of R_SSTAT */
! 61: int memalloc;
! 62: int memwins;
! 63: struct {
! 64: bus_addr_t addr;
! 65: bus_size_t size;
! 66: int size2; /* size as 2^n scaled by 4K */
! 67: long offset;
! 68: int speed; /* in ns */
! 69: int kind;
! 70: } mem[TCIC_MAX_MEM_WINS];
! 71: int ioalloc;
! 72: struct {
! 73: bus_addr_t addr;
! 74: bus_size_t size;
! 75: int width;
! 76: int speed; /* in ns */
! 77: } io[TCIC_IO_WINS];
! 78: int ih_irq;
! 79: struct device *pcmcia;
! 80:
! 81: int shutdown;
! 82: struct proc *event_thread;
! 83: SIMPLEQ_HEAD(, tcic_event) events;
! 84: };
! 85:
! 86: #define TCIC_FLAG_SOCKETP 0x0001
! 87: #define TCIC_FLAG_CARDP 0x0002
! 88:
! 89: /*
! 90: * This is sort of arbitrary. It merely needs to be "enough". It can be
! 91: * overridden in the conf file, anyway.
! 92: */
! 93:
! 94: #define TCIC_MEM_PAGES 4
! 95: #define TCIC_MEMSIZE TCIC_MEM_PAGES*TCIC_MEM_PAGESIZE
! 96:
! 97: #define TCIC_NSLOTS 2
! 98:
! 99: struct tcic_softc {
! 100: struct device dev;
! 101:
! 102: bus_space_tag_t memt;
! 103: bus_space_handle_t memh;
! 104: bus_space_tag_t iot;
! 105: bus_space_handle_t ioh;
! 106:
! 107: int chipid;
! 108: int validirqs;
! 109: int pwrena; /* holds TCIC_PWR_ENA on'084 and successors */
! 110:
! 111: /* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
! 112: void *intr_est;
! 113:
! 114: pcmcia_chipset_tag_t pct;
! 115:
! 116: /* this needs to be large enough to hold TCIC_MEM_PAGES bits */
! 117: int subregionmask;
! 118:
! 119: /* used by memory window mapping functions */
! 120: bus_addr_t membase;
! 121: int memsize2; /* int(log2(memsize)) */
! 122:
! 123: /*
! 124: * used by io window mapping functions. These can actually overlap
! 125: * with another tcic, since the underlying extent mapper will deal
! 126: * with individual allocations. This is here to deal with the fact
! 127: * that different busses have different real widths (different pc
! 128: * hardware seems to use 10 or 12 bits for the I/O bus).
! 129: */
! 130: bus_addr_t iobase;
! 131: bus_size_t iosize;
! 132:
! 133: int irq;
! 134: void *ih;
! 135:
! 136: struct tcic_handle handle[TCIC_NSLOTS];
! 137: };
! 138:
! 139: int tcic_log2(u_int);
! 140: int tcic_ns2wscnt(int);
! 141:
! 142: int tcic_check_reserved_bits(bus_space_tag_t, bus_space_handle_t);
! 143: int tcic_chipid(bus_space_tag_t, bus_space_handle_t);
! 144: int tcic_chipid_known(int);
! 145: char *tcic_chipid_to_string(int);
! 146: int tcic_validirqs(int);
! 147:
! 148: void tcic_attach(struct tcic_softc *);
! 149: void tcic_attach_sockets(struct tcic_softc *);
! 150: int tcic_intr(void *arg);
! 151:
! 152: static __inline__ int tcic_read_1(struct tcic_handle *, int);
! 153: static __inline__ int tcic_read_2(struct tcic_handle *, int);
! 154: static __inline__ int tcic_read_4(struct tcic_handle *, int);
! 155: static __inline__ void tcic_write_1(struct tcic_handle *, int, int);
! 156: static __inline__ void tcic_write_2(struct tcic_handle *, int, int);
! 157: static __inline__ void tcic_write_4(struct tcic_handle *, int, int);
! 158: static __inline__ int tcic_read_ind_2(struct tcic_handle *, int);
! 159: static __inline__ void tcic_write_ind_2(struct tcic_handle *, int, int);
! 160: static __inline__ void tcic_sel_sock(struct tcic_handle *);
! 161: static __inline__ void tcic_wait_ready(struct tcic_handle *);
! 162: static __inline__ int tcic_read_aux_1(bus_space_tag_t, bus_space_handle_t, int, int);
! 163: static __inline__ int tcic_read_aux_2(bus_space_tag_t, bus_space_handle_t, int);
! 164: static __inline__ void tcic_write_aux_1(bus_space_tag_t, bus_space_handle_t, int, int, int);
! 165: static __inline__ void tcic_write_aux_2(bus_space_tag_t, bus_space_handle_t, int, int);
! 166:
! 167: int tcic_chip_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
! 168: struct pcmcia_mem_handle *);
! 169: void tcic_chip_mem_free(pcmcia_chipset_handle_t,
! 170: struct pcmcia_mem_handle *);
! 171: int tcic_chip_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t,
! 172: bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *);
! 173: void tcic_chip_mem_unmap(pcmcia_chipset_handle_t, int);
! 174:
! 175: int tcic_chip_io_alloc(pcmcia_chipset_handle_t, bus_addr_t,
! 176: bus_size_t, bus_size_t, struct pcmcia_io_handle *);
! 177: void tcic_chip_io_free(pcmcia_chipset_handle_t,
! 178: struct pcmcia_io_handle *);
! 179: int tcic_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
! 180: bus_size_t, struct pcmcia_io_handle *, int *);
! 181: void tcic_chip_io_unmap(pcmcia_chipset_handle_t, int);
! 182:
! 183: void tcic_chip_socket_enable(pcmcia_chipset_handle_t);
! 184: void tcic_chip_socket_disable(pcmcia_chipset_handle_t);
! 185:
! 186: static __inline__ int tcic_read_1(struct tcic_handle *, int);
! 187: static __inline__ int
! 188: tcic_read_1(h, reg)
! 189: struct tcic_handle *h;
! 190: int reg;
! 191: {
! 192: return (bus_space_read_1(h->sc->iot, h->sc->ioh, reg));
! 193: }
! 194:
! 195: static __inline__ int tcic_read_2(struct tcic_handle *, int);
! 196: static __inline__ int
! 197: tcic_read_2(h, reg)
! 198: struct tcic_handle *h;
! 199: int reg;
! 200: {
! 201: return (bus_space_read_2(h->sc->iot, h->sc->ioh, reg));
! 202: }
! 203:
! 204: static __inline__ int tcic_read_4(struct tcic_handle *, int);
! 205: static __inline__ int
! 206: tcic_read_4(h, reg)
! 207: struct tcic_handle *h;
! 208: int reg;
! 209: {
! 210: int val;
! 211: val = bus_space_read_2(h->sc->iot, h->sc->ioh, reg);
! 212: val |= bus_space_read_2(h->sc->iot, h->sc->ioh, reg+2) << 16;
! 213: return val;
! 214: }
! 215:
! 216: static __inline__ void tcic_write_1(struct tcic_handle *, int, int);
! 217: static __inline__ void
! 218: tcic_write_1(h, reg, data)
! 219: struct tcic_handle *h;
! 220: int reg;
! 221: int data;
! 222: {
! 223: bus_space_write_1(h->sc->iot, h->sc->ioh, reg, (data));
! 224: }
! 225:
! 226: static __inline__ void tcic_write_2(struct tcic_handle *, int, int);
! 227: static __inline__ void
! 228: tcic_write_2(h, reg, data)
! 229: struct tcic_handle *h;
! 230: int reg;
! 231: int data;
! 232: {
! 233: bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
! 234: }
! 235:
! 236: static __inline__ void tcic_write_4(struct tcic_handle *, int, int);
! 237: static __inline__ void
! 238: tcic_write_4(h, reg, data)
! 239: struct tcic_handle *h;
! 240: int reg;
! 241: int data;
! 242: {
! 243: bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
! 244: bus_space_write_2(h->sc->iot, h->sc->ioh, reg+2, (data)>>16);
! 245: }
! 246:
! 247: static __inline__ int tcic_read_ind_2(struct tcic_handle *, int);
! 248: static __inline__ int
! 249: tcic_read_ind_2(h, reg)
! 250: struct tcic_handle *h;
! 251: int reg;
! 252: {
! 253: int r_addr, val;
! 254: r_addr = tcic_read_4(h, TCIC_R_ADDR);
! 255: tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG);
! 256: val = bus_space_read_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA);
! 257: tcic_write_4(h, TCIC_R_ADDR, r_addr);
! 258: return val;
! 259: }
! 260:
! 261: static __inline__ void tcic_write_ind_2(struct tcic_handle *, int, int);
! 262: static __inline__ void
! 263: tcic_write_ind_2(h, reg, data)
! 264: struct tcic_handle *h;
! 265: int reg;
! 266: int data;
! 267: {
! 268: int r_addr;
! 269: r_addr = tcic_read_4(h, TCIC_R_ADDR);
! 270: tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG);
! 271: bus_space_write_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA, (data));
! 272: tcic_write_4(h, TCIC_R_ADDR, r_addr);
! 273: }
! 274:
! 275: static __inline__ void tcic_sel_sock(struct tcic_handle *);
! 276: static __inline__ void
! 277: tcic_sel_sock(h)
! 278: struct tcic_handle *h;
! 279: {
! 280: int r_addr;
! 281: r_addr = tcic_read_2(h, TCIC_R_ADDR2);
! 282: tcic_write_2(h, TCIC_R_ADDR2,
! 283: (h->sock<<TCIC_ADDR2_SS_SHFT)|(r_addr & ~TCIC_ADDR2_SS_MASK));
! 284: }
! 285:
! 286: static __inline__ void tcic_wait_ready(struct tcic_handle *);
! 287: static __inline__ void
! 288: tcic_wait_ready(h)
! 289: struct tcic_handle *h;
! 290: {
! 291: int i;
! 292:
! 293: /* XXX appropriate socket must have been selected already. */
! 294: for (i = 0; i < 10000; i++) {
! 295: if (tcic_read_1(h, TCIC_R_SSTAT) & TCIC_SSTAT_RDY)
! 296: return;
! 297: delay(500);
! 298: }
! 299:
! 300: #ifdef DIAGNOSTIC
! 301: printf("tcic_wait_ready ready never happened\n");
! 302: #endif
! 303: }
! 304:
! 305: static __inline__ int tcic_read_aux_1(bus_space_tag_t, bus_space_handle_t, int, int);
! 306: static __inline__ int
! 307: tcic_read_aux_1(iot, ioh, auxreg, reg)
! 308: bus_space_tag_t iot;
! 309: bus_space_handle_t ioh;
! 310: int auxreg, reg;
! 311: {
! 312: int mode, val;
! 313: mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
! 314: bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
! 315: val = bus_space_read_1(iot, ioh, reg);
! 316: return val;
! 317: }
! 318:
! 319: static __inline__ int tcic_read_aux_2(bus_space_tag_t, bus_space_handle_t, int);
! 320: static __inline__ int
! 321: tcic_read_aux_2(iot, ioh, auxreg)
! 322: bus_space_tag_t iot;
! 323: bus_space_handle_t ioh;
! 324: int auxreg;
! 325: {
! 326: int mode, val;
! 327: mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
! 328: bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
! 329: val = bus_space_read_2(iot, ioh, TCIC_R_AUX);
! 330: return val;
! 331: }
! 332:
! 333: static __inline__ void tcic_write_aux_1(bus_space_tag_t, bus_space_handle_t, int, int, int);
! 334: static __inline__ void
! 335: tcic_write_aux_1(iot, ioh, auxreg, reg, val)
! 336: bus_space_tag_t iot;
! 337: bus_space_handle_t ioh;
! 338: int auxreg, reg, val;
! 339: {
! 340: int mode;
! 341: mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
! 342: bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
! 343: bus_space_write_1(iot, ioh, reg, val);
! 344: }
! 345:
! 346: static __inline__ void tcic_write_aux_2(bus_space_tag_t, bus_space_handle_t, int, int);
! 347: static __inline__ void
! 348: tcic_write_aux_2(iot, ioh, auxreg, val)
! 349: bus_space_tag_t iot;
! 350: bus_space_handle_t ioh;
! 351: int auxreg, val;
! 352: {
! 353: int mode;
! 354: mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
! 355: bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
! 356: bus_space_write_2(iot, ioh, TCIC_R_AUX, val);
! 357: }
! 358:
! 359: #endif /* _TCIC2VAR_H */
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