Annotation of sys/dev/ic/smc83c170var.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: smc83c170var.h,v 1.1 2005/05/10 01:16:32 brad Exp $ */
! 2: /* $NetBSD: smc83c170var.h,v 1.9 2005/02/04 02:10:37 perry Exp $ */
! 3:
! 4: /*-
! 5: * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
! 6: * All rights reserved.
! 7: *
! 8: * This code is derived from software contributed to The NetBSD Foundation
! 9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
! 10: * NASA Ames Research Center.
! 11: *
! 12: * Redistribution and use in source and binary forms, with or without
! 13: * modification, are permitted provided that the following conditions
! 14: * are met:
! 15: * 1. Redistributions of source code must retain the above copyright
! 16: * notice, this list of conditions and the following disclaimer.
! 17: * 2. Redistributions in binary form must reproduce the above copyright
! 18: * notice, this list of conditions and the following disclaimer in the
! 19: * documentation and/or other materials provided with the distribution.
! 20: * 3. All advertising materials mentioning features or use of this software
! 21: * must display the following acknowledgement:
! 22: * This product includes software developed by the NetBSD
! 23: * Foundation, Inc. and its contributors.
! 24: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 25: * contributors may be used to endorse or promote products derived
! 26: * from this software without specific prior written permission.
! 27: *
! 28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 38: * POSSIBILITY OF SUCH DAMAGE.
! 39: */
! 40:
! 41: #ifndef _DEV_IC_SMC83C170VAR_H_
! 42: #define _DEV_IC_SMC83C170VAR_H_
! 43:
! 44: #include <sys/timeout.h>
! 45:
! 46: /*
! 47: * Misc. definitions for the Standard Microsystems Corp. 83C170
! 48: * Ethernet PCI Integrated Controller (EPIC/100) driver.
! 49: */
! 50:
! 51: /*
! 52: * Transmit descriptor list size.
! 53: */
! 54: #define EPIC_NTXDESC 128
! 55: #define EPIC_NTXDESC_MASK (EPIC_NTXDESC - 1)
! 56: #define EPIC_NEXTTX(x) ((x + 1) & EPIC_NTXDESC_MASK)
! 57:
! 58: /*
! 59: * Receive descriptor list size.
! 60: */
! 61: #define EPIC_NRXDESC 64
! 62: #define EPIC_NRXDESC_MASK (EPIC_NRXDESC - 1)
! 63: #define EPIC_NEXTRX(x) ((x + 1) & EPIC_NRXDESC_MASK)
! 64:
! 65: /*
! 66: * Control structures are DMA'd to the EPIC chip. We allocate them in
! 67: * a single clump that maps to a single DMA segment to make several things
! 68: * easier.
! 69: */
! 70: struct epic_control_data {
! 71: /*
! 72: * The transmit descriptors.
! 73: */
! 74: struct epic_txdesc ecd_txdescs[EPIC_NTXDESC];
! 75:
! 76: /*
! 77: * The receive descriptors.
! 78: */
! 79: struct epic_rxdesc ecd_rxdescs[EPIC_NRXDESC];
! 80:
! 81: /*
! 82: * The transmit fraglists.
! 83: */
! 84: struct epic_fraglist ecd_txfrags[EPIC_NTXDESC];
! 85: };
! 86:
! 87: #define EPIC_CDOFF(x) offsetof(struct epic_control_data, x)
! 88: #define EPIC_CDTXOFF(x) EPIC_CDOFF(ecd_txdescs[(x)])
! 89: #define EPIC_CDRXOFF(x) EPIC_CDOFF(ecd_rxdescs[(x)])
! 90: #define EPIC_CDFLOFF(x) EPIC_CDOFF(ecd_txfrags[(x)])
! 91:
! 92: /*
! 93: * Software state for transmit and receive desciptors.
! 94: */
! 95: struct epic_descsoft {
! 96: struct mbuf *ds_mbuf; /* head of mbuf chain */
! 97: bus_dmamap_t ds_dmamap; /* our DMA map */
! 98: };
! 99:
! 100: /*
! 101: * Software state per device.
! 102: */
! 103: struct epic_softc {
! 104: struct device sc_dev; /* generic device information */
! 105: bus_space_tag_t sc_st; /* bus space tag */
! 106: bus_space_handle_t sc_sh; /* bus space handle */
! 107: bus_dma_tag_t sc_dmat; /* bus DMA tag */
! 108: struct arpcom sc_arpcom; /* ethernet common data */
! 109: void *sc_sdhook; /* shutdown hook */
! 110:
! 111: int sc_hwflags; /* info about board */
! 112: #define EPIC_HAS_BNC 0x01 /* BNC on serial interface */
! 113: #define EPIC_HAS_MII_FIBER 0x02 /* fiber on MII lxtphy */
! 114: #define EPIC_DUPLEXLED_ON_694 0x04 /* duplex LED by software */
! 115:
! 116: struct mii_data sc_mii; /* MII/media information */
! 117: struct timeout sc_mii_timeout; /* MII timeout */
! 118:
! 119: bus_dmamap_t sc_cddmamap; /* control data DMA map */
! 120: #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
! 121: bus_dmamap_t sc_nulldmamap; /* DMA map for the pad buffer */
! 122: #define sc_nulldma sc_nulldmamap->dm_segs[0].ds_addr
! 123:
! 124: /*
! 125: * Software state for transmit and receive descriptors.
! 126: */
! 127: struct epic_descsoft sc_txsoft[EPIC_NTXDESC];
! 128: struct epic_descsoft sc_rxsoft[EPIC_NRXDESC];
! 129:
! 130: /*
! 131: * Control data structures.
! 132: */
! 133: struct epic_control_data *sc_control_data;
! 134:
! 135: int sc_txpending; /* number of TX requests pending */
! 136: int sc_txdirty; /* first dirty TX descriptor */
! 137: int sc_txlast; /* last used TX descriptor */
! 138:
! 139: int sc_rxptr; /* next ready RX descriptor */
! 140:
! 141: u_int sc_serinst; /* ifmedia instance for serial mode */
! 142: };
! 143:
! 144: #define EPIC_CDTXADDR(sc, x) ((sc)->sc_cddma + EPIC_CDTXOFF((x)))
! 145: #define EPIC_CDRXADDR(sc, x) ((sc)->sc_cddma + EPIC_CDRXOFF((x)))
! 146: #define EPIC_CDFLADDR(sc, x) ((sc)->sc_cddma + EPIC_CDFLOFF((x)))
! 147:
! 148: #define EPIC_CDTX(sc, x) (&(sc)->sc_control_data->ecd_txdescs[(x)])
! 149: #define EPIC_CDRX(sc, x) (&(sc)->sc_control_data->ecd_rxdescs[(x)])
! 150: #define EPIC_CDFL(sc, x) (&(sc)->sc_control_data->ecd_txfrags[(x)])
! 151:
! 152: #define EPIC_DSTX(sc, x) (&(sc)->sc_txsoft[(x)])
! 153: #define EPIC_DSRX(sc, x) (&(sc)->sc_rxsoft[(x)])
! 154:
! 155: #define EPIC_CDTXSYNC(sc, x, ops) \
! 156: bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
! 157: EPIC_CDTXOFF((x)), sizeof(struct epic_txdesc), (ops))
! 158:
! 159: #define EPIC_CDRXSYNC(sc, x, ops) \
! 160: bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
! 161: EPIC_CDRXOFF((x)), sizeof(struct epic_rxdesc), (ops))
! 162:
! 163: #define EPIC_CDFLSYNC(sc, x, ops) \
! 164: bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
! 165: EPIC_CDFLOFF((x)), sizeof(struct epic_fraglist), (ops))
! 166:
! 167: #define EPIC_INIT_RXDESC(sc, x) \
! 168: do { \
! 169: struct epic_descsoft *__ds = EPIC_DSRX((sc), (x)); \
! 170: struct epic_rxdesc *__rxd = EPIC_CDRX((sc), (x)); \
! 171: struct mbuf *__m = __ds->ds_mbuf; \
! 172: \
! 173: /* \
! 174: * Note we scoot the packet forward 2 bytes in the buffer \
! 175: * so that the payload after the Ethernet header is aligned \
! 176: * to a 4 byte boundary. \
! 177: */ \
! 178: __m->m_data = __m->m_ext.ext_buf + 2; \
! 179: __rxd->er_bufaddr = __ds->ds_dmamap->dm_segs[0].ds_addr + 2; \
! 180: __rxd->er_control = RXCTL_BUFLENGTH(__m->m_ext.ext_size - 2); \
! 181: __rxd->er_rxstatus = ER_RXSTAT_OWNER; \
! 182: __rxd->er_nextdesc = EPIC_CDRXADDR((sc), EPIC_NEXTRX((x))); \
! 183: EPIC_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
! 184: } while (/* CONSTCOND */ 0)
! 185:
! 186: #ifdef _KERNEL
! 187: void epic_attach(struct epic_softc *, const char *);
! 188: int epic_intr(void *);
! 189: #endif /* _KERNEL */
! 190:
! 191: #endif /* _DEV_IC_SMC83C170VAR_H_ */
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