Annotation of sys/dev/ic/slireg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: slireg.h,v 1.4 2007/05/19 10:24:18 dlg Exp $ */
2:
3: /*
4: * Copyright (c) 2007 David Gwynne <dlg@openbsd.org>
5: *
6: * Permission to use, copy, modify, and distribute this software for any
7: * purpose with or without fee is hereby granted, provided that the above
8: * copyright notice and this permission notice appear in all copies.
9: *
10: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14: * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15: * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16: * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17: */
18:
19: /*
20: * PCI BARs
21: */
22: #define SLI_PCI_BAR_SLIM 0x10
23: #define SLI_PCI_BAR_REGISTER 0x18
24: #define SLI_PCI_BAR_BIU 0x20
25: #define SLI_PCI_BAR_REGISTER_IO 0x24
26:
27: /*
28: * Registers in the REGISTER BAR
29: */
30: #define SLI_REG_HA 0x0 /* Host Attention */
31: #define SLI_REG_HA_ERATT (1<<31)
32: #define SLI_REG_HA_MBATT (1<<30)
33: #define SLI_REG_HA_LATT (1<<29)
34: #define SLI_REG_HA_R3ATT (1<<15)
35: #define SLI_REG_HA_R3CE_RSP (1<<13)
36: #define SLI_REG_HA_R3RE_REQ (1<<12)
37: #define SLI_REG_HA_R2ATT (1<<11)
38: #define SLI_REG_HA_R2CE_RSP (1<<9)
39: #define SLI_REG_HA_R2RE_REQ (1<<8)
40: #define SLI_REG_HA_R1ATT (1<<7)
41: #define SLI_REG_HA_R1CE_RSP (1<<5)
42: #define SLI_REG_HA_R1RE_REQ (1<<4)
43: #define SLI_REG_HA_R0ATT (1<<3)
44: #define SLI_REG_HA_R0CE_RSP (1<<1)
45: #define SLI_REG_HA_R0RE_REQ (1<<0)
46: #define SLI_FMT_HA "\020" "\040ERATT" "\037MBATT" "\036LATT" \
47: "\020R3ATT" "\016R3CE_RSP" "\015R3RE_REQ" \
48: "\014R3ATT" "\012R3CE_RSP" "\011R3RE_REQ" \
49: "\010R3ATT" "\006R3CE_RSP" "\005R3RE_REQ" \
50: "\040R3ATT" "\002R3CE_RSP" "\001R3RE_REQ"
51: #define SLI_REG_CA 0x4 /* Chip Attention */
52: #define SLI_REG_CA_MBATT (1<<30)
53: #define SLI_REG_CA_R3ATT (1<<15)
54: #define SLI_REG_CA_R3RE_RSP (1<<13)
55: #define SLI_REG_CA_R3CE_REQ (1<<12)
56: #define SLI_REG_CA_R2ATT (1<<11)
57: #define SLI_REG_CA_R2RE_RSP (1<<9)
58: #define SLI_REG_CA_R2CE_REQ (1<<8)
59: #define SLI_REG_CA_R1ATT (1<<7)
60: #define SLI_REG_CA_R1RE_RSP (1<<5)
61: #define SLI_REG_CA_R1CE_REQ (1<<4)
62: #define SLI_REG_CA_R0ATT (1<<3)
63: #define SLI_REG_CA_R0RE_RSP (1<<1)
64: #define SLI_REG_CA_R0CE_REQ (1<<0)
65: #define SLI_FMT_CA "\020" "\037MBATT" \
66: "\020R3ATT" "\016R3RE_RSP" "\015R3CE_REQ" \
67: "\014R3ATT" "\012R3RE_RSP" "\011R3CE_REQ" \
68: "\010R3ATT" "\006R3RE_RSP" "\005R3CE_REQ" \
69: "\040R3ATT" "\002R3RE_RSP" "\001R3CE_REQ"
70: #define SLI_REG_HS 0x8 /* Host Status */
71: #define SLI_REG_HS_FFER_MASK (0xff000000)
72: #define SLI_REG_HS_FF1 (1<<31)
73: #define SLI_REG_HS_FF2 (1<<30)
74: #define SLI_REG_HS_FF3 (1<<29)
75: #define SLI_REG_HS_FF4 (1<<28)
76: #define SLI_REG_HS_FF5 (1<<27)
77: #define SLI_REG_HS_FF6 (1<<26)
78: #define SLI_REG_HS_FF7 (1<<25)
79: #define SLI_REG_HS_FF8 (1<<24)
80: #define SLI_REG_HS_FFRDY (1<<23)
81: #define SLI_REG_HS_MBRDY (1<<22)
82: #define SLI_FMT_HS "\020" "\040FF1" "\037FF2" "\036FF3" \
83: "\035FF4" "\034FF5" "\033FF6" "\032FF7" \
84: "\031FF8" "\030FFRDY" "\027MBRDY"
85: #define SLI_REG_HC 0xc /* Host Control */
86: #define SLI_REG_HC_ERINT (1<<31)
87: #define SLI_REG_HC_LAINT (1<<29)
88: #define SLI_REG_HC_INITFF (1<<27)
89: #define SLI_REG_HC_INITMB (1<<26)
90: #define SLI_REG_HC_INITHBI (1<<25)
91: #define SLI_REG_HC_R3INT (1<<4)
92: #define SLI_REG_HC_R2INT (1<<3)
93: #define SLI_REG_HC_R1INT (1<<2)
94: #define SLI_REG_HC_R0INT (1<<1)
95: #define SLI_REG_HC_MBINT (1<<0)
96: #define SLI_FMT_HC "\020" "\040ERINT" "\036LAINT" "\035INITFF" \
97: "\034INITMB" "\033INITHBI" "\005R3INT" \
98: "\004R2INT" "\003R1INT" "\002R0INT" \
99: "\001MBINT"
100:
101: /*
102: * Mailbox commands
103: */
104: #define SLI_CMD_SHUTDOWN 0x00
105: #define SLI_CMD_LOAD_SM 0x01
106: #define SLI_CMD_READ_NV 0x02
107: #define SLI_CMD_WRITE_NV 0x03
108: #define SLI_CMD_RUN_BIU_DIAG 0x04
109: #define SLI_CMD_INIT_LINK 0x05
110: #define SLI_CMD_DOWN_LINK 0x06
111: #define SLI_CMD_CONFIG_LINK 0x07
112: #define SLI_CMD_CONFIG_RING 0x09
113: #define SLI_CMD_RESET_RING 0x0a
114: #define SLI_CMD_READ_CONFIG 0x0b
115: #define SLI_CMD_READ_RCONFIG 0x0c
116: #define SLI_CMD_READ_SPARM 0x0d
117: #define SLI_CMD_READ_STATUS 0x0e
118: #define SLI_CMD_READ_RPI 0x0f
119: #define SLI_CMD_READ_XRI 0x10
120: #define SLI_CMD_READ_REV 0x11
121: #define SLI_CMD_READ_LNK_STAT 0x12
122: #define SLI_CMD_REG_LOGIN 0x13
123: #define SLI_CMD_UNREG_LOGIN 0x14
124: #define SLI_CMD_READ_LA 0x15
125: #define SLI_CMD_CLEAR_LA 0x16
126: #define SLI_CMD_DUMP_MEMORY 0x17
127: #define SLI_CMD_DUMP_CONTEXT 0x18
128: #define SLI_CMD_RUN_DIAGS 0x19
129: #define SLI_CMD_RESTART 0x1a
130: #define SLI_CMD_UPDATE_CFG 0x1b
131: #define SLI_CMD_DOWN_LOAD 0x1c
132: #define SLI_CMD_DEL_LD_ENTRY 0x1d
133: #define SLI_CMD_RUN_PROGRAM 0x1e
134: #define SLI_CMD_SET_MASK 0x20
135: #define SLI_CMD_SEL_SLIM 0x21
136: #define SLI_CMD_UNREG_D_ID 0x23
137: #define SLI_CMD_KILL_BOARD 0x24
138: #define SLI_CMD_CONFIG_FARP 0x25
139: #define SLI_CMD_LOAD_AREA 0x81
140: #define SLI_CMD_RUN_BIU_DIAG64 0x84
141: #define SLI_CMD_CONFIG_PORT 0x88
142: #define SLI_CMD_READ_SPARM64 0x8d
143: #define SLI_CMD_READ_RPI64 0x8f
144: #define SLI_CMD_REG_LOGIN64 0x93
145: #define SLI_CMD_READ_LA64 0x95
146: #define SLI_CMD_FLAGS_WR_ULA 0x98
147: #define SLI_CMD_FLSET_DEBUG 0x99
148: #define SLI_CMD_LOAD_EXP_ROM 0x9c
149: #define SLI_CMD_MAX_CMDS 0x9d
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