Annotation of sys/dev/ic/rtwvar.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: rtwvar.h,v 1.23 2007/06/07 20:20:15 damien Exp $ */
2: /* $NetBSD: rtwvar.h,v 1.10 2004/12/26 22:37:57 mycroft Exp $ */
3:
4: /*-
5: * Copyright (c) 2004, 2005 David Young. All rights reserved.
6: *
7: * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. The name of David Young may not be used to endorse or promote
18: * products derived from this software without specific prior
19: * written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
22: * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
23: * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24: * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
25: * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
26: * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
27: * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29: * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30: * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32: * OF SUCH DAMAGE.
33: */
34:
35: #ifndef _DEV_IC_RTWVAR_H_
36: #define _DEV_IC_RTWVAR_H_
37:
38: #include <sys/device.h>
39: #include <sys/queue.h>
40: #include <sys/timeout.h>
41:
42: #ifdef RTW_DEBUG
43: #define RTW_DEBUG_TUNE 0x0000001
44: #define RTW_DEBUG_PKTFILT 0x0000002
45: #define RTW_DEBUG_XMIT 0x0000004
46: #define RTW_DEBUG_XMIT_DESC 0x0000008
47: #define RTW_DEBUG_NODE 0x0000010
48: #define RTW_DEBUG_PWR 0x0000020
49: #define RTW_DEBUG_ATTACH 0x0000040
50: #define RTW_DEBUG_REGDUMP 0x0000080
51: #define RTW_DEBUG_ACCESS 0x0000100
52: #define RTW_DEBUG_RESET 0x0000200
53: #define RTW_DEBUG_INIT 0x0000400
54: #define RTW_DEBUG_IOSTATE 0x0000800
55: #define RTW_DEBUG_RECV 0x0001000
56: #define RTW_DEBUG_RECV_DESC 0x0002000
57: #define RTW_DEBUG_IO_KICK 0x0004000
58: #define RTW_DEBUG_INTR 0x0008000
59: #define RTW_DEBUG_PHY 0x0010000
60: #define RTW_DEBUG_PHYIO 0x0020000
61: #define RTW_DEBUG_PHYBITIO 0x0040000
62: #define RTW_DEBUG_TIMEOUT 0x0080000
63: #define RTW_DEBUG_BUGS 0x0100000
64: #define RTW_DEBUG_BEACON 0x0200000
65: #define RTW_DEBUG_LED 0x0400000
66: #define RTW_DEBUG_KEY 0x0800000
67: #define RTW_DEBUG_XMIT_RSRC 0x1000000
68: #define RTW_DEBUG_OACTIVE 0x2000000
69: #define RTW_DEBUG_MAX 0x3ffffff
70:
71: extern int rtw_debug;
72: #define RTW_DPRINTF(__flags, __x) \
73: if ((rtw_debug & (__flags)) != 0) printf __x
74: #define DPRINTF(__sc, __flags, __x) \
75: if (((__sc)->sc_ic.ic_if.if_flags & IFF_DEBUG) != 0) \
76: RTW_DPRINTF(__flags, __x)
77: #else /* RTW_DEBUG */
78: #define RTW_DPRINTF(__flags, __x)
79: #define DPRINTF(__sc, __flags, __x)
80: #endif /* RTW_DEBUG */
81:
82: #define KASSERT2(__cond, __msg) \
83: do { \
84: if (!(__cond)) \
85: panic __msg ; \
86: } while (0)
87:
88: enum rtw_locale {
89: RTW_LOCALE_USA = 0,
90: RTW_LOCALE_EUROPE,
91: RTW_LOCALE_JAPAN,
92: RTW_LOCALE_UNKNOWN
93: };
94:
95: #define RTW_RFCHIPID_RESERVED 0x00
96: #define RTW_RFCHIPID_INTERSIL 0x01
97: #define RTW_RFCHIPID_RFMD2948 0x02
98: #define RTW_RFCHIPID_PHILIPS 0x03
99: #define RTW_RFCHIPID_MAXIM2820 0x04
100: #define RTW_RFCHIPID_GCT 0x05
101: #define RTW_RFCHIPID_RFMD2958 0x06
102: #define RTW_RFCHIPID_MAXIM2822 0x07
103: #define RTW_RFCHIPID_MAXIM2825 0x08
104: #define RTW_RFCHIPID_RTL8225 0x09
105: #define RTW_RFCHIPID_RTL8255 0x0a
106:
107: /* sc_flags */
108: #define RTW_F_ENABLED 0x00000001 /* chip is enabled */
109: #define RTW_F_DIGPHY 0x00000002 /* digital PHY */
110: #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */
111: #define RTW_F_RTL8185 0x00000008 /* RTL8185 or newer */
112: #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */
113: #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */
114: #define RTW_F_SLEEP 0x00000040 /* chip is asleep */
115: #define RTW_F_INVALID 0x00000080 /* chip is absent */
116: /* all PHY flags */
117: #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV)
118:
119: enum rtw_access {
120: RTW_ACCESS_NONE = 0,
121: RTW_ACCESS_CONFIG = 1,
122: RTW_ACCESS_ANAPARM = 2
123: };
124:
125: struct rtw_regs {
126: bus_space_tag_t r_bt;
127: bus_space_handle_t r_bh;
128: enum rtw_access r_access;
129: void *r_priv;
130:
131: /* bus independent I/O callbacks */
132: u_int8_t (*r_read8)(void *, u_int32_t);
133: u_int16_t (*r_read16)(void *, u_int32_t);
134: u_int32_t (*r_read32)(void *, u_int32_t);
135: void (*r_write8)(void *, u_int32_t, u_int8_t);
136: void (*r_write16)(void *, u_int32_t, u_int16_t);
137: void (*r_write32)(void *, u_int32_t, u_int32_t);
138: void (*r_barrier)(void *, u_int32_t, u_int32_t, int);
139: };
140:
141: #define RTW_SR_GET(sr, ofs) \
142: (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff)
143:
144: #define RTW_SR_GET16(sr, ofs) \
145: (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8))
146:
147: struct rtw_srom {
148: u_int16_t *sr_content;
149: u_int16_t sr_size;
150: };
151:
152: struct rtw_rxsoft {
153: struct mbuf *rs_mbuf;
154: bus_dmamap_t rs_dmamap;
155: };
156:
157: struct rtw_duration {
158: uint16_t d_rts_dur;
159: uint16_t d_data_dur;
160: uint16_t d_plcp_len;
161: uint8_t d_residue; /* unused octets in time slot */
162: };
163:
164: struct rtw_txsoft {
165: SIMPLEQ_ENTRY(rtw_txsoft) ts_q;
166: struct mbuf *ts_mbuf;
167: bus_dmamap_t ts_dmamap;
168: struct ieee80211_node *ts_ni; /* destination node */
169: u_int ts_first; /* 1st hw descriptor */
170: u_int ts_last; /* last hw descriptor */
171: struct rtw_duration ts_d0;
172: struct rtw_duration ts_dn;
173: };
174:
175: #define RTW_NTXPRI 4 /* number of Tx priorities */
176: #define RTW_TXPRILO 0
177: #define RTW_TXPRIMD 1
178: #define RTW_TXPRIHI 2
179: #define RTW_TXPRIBCN 3 /* beacon priority */
180:
181: #define RTW_MAXPKTSEGS 64 /* max 64 segments per Tx packet */
182:
183: #define CASSERT(cond, complaint) \
184: complaint[(cond) ? 0 : -1] = complaint[(cond) ? 0 : -1]
185:
186: /* Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT
187: * boundaries. I allocate them consecutively from one buffer, so
188: * just round up.
189: */
190: #define RTW_TXQLENLO 64 /* low-priority queue length */
191: #define RTW_TXQLENMD 64 /* medium-priority */
192: #define RTW_TXQLENHI 64 /* high-priority */
193: #define RTW_TXQLENBCN 8 /* beacon */
194:
195: #define RTW_NTXDESCLO RTW_TXQLENLO
196: #define RTW_NTXDESCMD RTW_TXQLENMD
197: #define RTW_NTXDESCHI RTW_TXQLENHI
198: #define RTW_NTXDESCBCN RTW_TXQLENBCN
199:
200: #define RTW_NTXDESCTOTAL (RTW_NTXDESCLO + RTW_NTXDESCMD + \
201: RTW_NTXDESCHI + RTW_NTXDESCBCN)
202:
203: #define RTW_RXQLEN 64
204:
205: struct rtw_rxdesc_blk {
206: struct rtw_rxdesc *rdb_desc;
207: u_int rdb_next;
208: u_int rdb_ndesc;
209: bus_dma_tag_t rdb_dmat;
210: bus_dmamap_t rdb_dmamap;
211: };
212:
213: struct rtw_txdesc_blk {
214: u_int tdb_ndesc;
215: u_int tdb_next;
216: u_int tdb_nfree;
217: bus_dma_tag_t tdb_dmat;
218: bus_dmamap_t tdb_dmamap;
219: bus_addr_t tdb_physbase;
220: bus_addr_t tdb_ofs;
221: bus_size_t tdb_basereg;
222: uint32_t tdb_base;
223:
224: struct rtw_txdesc *tdb_desc;
225: };
226:
227: #define RTW_NEXT_IDX(__htc, __idx) (((__idx) + 1) % (__htc)->tdb_ndesc)
228:
229: #define RTW_NEXT_DESC(__htc, __idx) \
230: ((__htc)->tdb_physbase + \
231: sizeof(struct rtw_txdesc) * RTW_NEXT_IDX((__htc), (__idx)))
232:
233: SIMPLEQ_HEAD(rtw_txq, rtw_txsoft);
234:
235: struct rtw_txsoft_blk {
236: /* dirty/free s/w descriptors */
237: struct rtw_txq tsb_dirtyq;
238: struct rtw_txq tsb_freeq;
239: u_int tsb_ndesc;
240: int tsb_tx_timer;
241: struct rtw_txsoft *tsb_desc;
242: u_int8_t tsb_poll;
243: };
244:
245: struct rtw_descs {
246: struct rtw_txdesc hd_txlo[RTW_NTXDESCLO];
247: struct rtw_txdesc hd_txmd[RTW_NTXDESCMD];
248: struct rtw_txdesc hd_txhi[RTW_NTXDESCMD];
249: struct rtw_rxdesc hd_rx[RTW_RXQLEN];
250: struct rtw_txdesc hd_bcn[RTW_NTXDESCBCN];
251: };
252: #define RTW_DESC_OFFSET(ring, i) offsetof(struct rtw_descs, ring[i])
253: #define RTW_RING_OFFSET(ring) RTW_DESC_OFFSET(ring, 0)
254: #define RTW_RING_BASE(sc, ring) ((sc)->sc_desc_physaddr + \
255: RTW_RING_OFFSET(ring))
256:
257: /* Radio capture format for RTL8180. */
258:
259: #define RTW_RX_RADIOTAP_PRESENT \
260: ((1 << IEEE80211_RADIOTAP_TSFT) | \
261: (1 << IEEE80211_RADIOTAP_FLAGS) | \
262: (1 << IEEE80211_RADIOTAP_RATE) | \
263: (1 << IEEE80211_RADIOTAP_CHANNEL) | \
264: (1 << IEEE80211_RADIOTAP_LOCK_QUALITY) | \
265: (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \
266: 0)
267:
268: struct rtw_rx_radiotap_header {
269: struct ieee80211_radiotap_header rr_ihdr;
270: u_int64_t rr_tsft;
271: u_int8_t rr_flags;
272: u_int8_t rr_rate;
273: u_int16_t rr_chan_freq;
274: u_int16_t rr_chan_flags;
275: u_int16_t rr_barker_lock;
276: u_int8_t rr_antsignal;
277: } __packed;
278:
279: #define RTW_TX_RADIOTAP_PRESENT \
280: ((1 << IEEE80211_RADIOTAP_FLAGS) | \
281: (1 << IEEE80211_RADIOTAP_RATE) | \
282: (1 << IEEE80211_RADIOTAP_CHANNEL) | \
283: 0)
284:
285: struct rtw_tx_radiotap_header {
286: struct ieee80211_radiotap_header rt_ihdr;
287: u_int8_t rt_flags;
288: u_int8_t rt_rate;
289: u_int16_t rt_chan_freq;
290: u_int16_t rt_chan_flags;
291: } __packed;
292:
293: struct rtw_hooks {
294: void *rh_shutdown; /* shutdown hook */
295: void *rh_power; /* power management hook */
296: };
297:
298: struct rtw_mtbl {
299: int (*mt_newstate)(struct ieee80211com *,
300: enum ieee80211_state, int);
301: void (*mt_recv_mgmt)(struct ieee80211com *,
302: struct mbuf *, struct ieee80211_node *,
303: int, int, u_int32_t);
304: struct ieee80211_node *(*mt_node_alloc)(struct ieee80211com *);
305: void (*mt_node_free)(struct ieee80211com *,
306: struct ieee80211_node *);
307: };
308:
309: enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON };
310:
311: struct rtw_phy {
312: struct rtw_rf *p_rf;
313: struct rtw_regs *p_regs;
314: };
315:
316: struct rtw_bbpset {
317: u_int bb_antatten;
318: u_int bb_chestlim;
319: u_int bb_chsqlim;
320: u_int bb_ifagcdet;
321: u_int bb_ifagcini;
322: u_int bb_ifagclimit;
323: u_int bb_lnadet;
324: u_int bb_sys1;
325: u_int bb_sys2;
326: u_int bb_sys3;
327: u_int bb_trl;
328: u_int bb_txagc;
329: };
330:
331: typedef int (*rtw_rf_write_t)(struct rtw_regs *, int, u_int,
332: u_int32_t);
333:
334: typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int);
335:
336: union rtw_keys {
337: u_int8_t rk_keys[4][16];
338: u_int32_t rk_words[16];
339: };
340:
341: #define RTW_LED_SLOW_TICKS MAX(1, hz/2)
342: #define RTW_LED_FAST_TICKS MAX(1, hz/10)
343:
344: struct rtw_led_state {
345: #define RTW_LED0 0x1
346: #define RTW_LED1 0x2
347: u_int8_t ls_slowblink:2;
348: u_int8_t ls_actblink:2;
349: u_int8_t ls_default:2;
350: u_int8_t ls_state;
351: u_int8_t ls_event;
352: #define RTW_LED_S_RX 0x1
353: #define RTW_LED_S_TX 0x2
354: #define RTW_LED_S_SLOW 0x4
355: struct timeout ls_slow_ch;
356: struct timeout ls_fast_ch;
357: };
358:
359: struct rtw_softc {
360: struct device sc_dev;
361: struct ieee80211com sc_ic;
362: struct rtw_regs sc_regs;
363: bus_dma_tag_t sc_dmat;
364: u_int32_t sc_flags;
365:
366: int sc_rfchipid;
367: enum rtw_locale sc_locale;
368: u_int8_t sc_phydelay;
369: struct rtw_bbpset sc_bbpset;
370:
371: /* s/w Tx/Rx descriptors */
372: struct rtw_txsoft_blk sc_txsoft_blk[RTW_NTXPRI];
373: struct rtw_txdesc_blk sc_txdesc_blk[RTW_NTXPRI];
374:
375: struct rtw_rxsoft sc_rxsoft[RTW_RXQLEN];
376: struct rtw_rxdesc_blk sc_rxdesc_blk;
377:
378: struct rtw_descs *sc_descs;
379:
380: bus_dma_segment_t sc_desc_segs;
381: int sc_desc_nsegs;
382: bus_dmamap_t sc_desc_dmamap;
383: #define sc_desc_physaddr sc_desc_dmamap->dm_segs[0].ds_addr
384:
385: struct rtw_srom sc_srom;
386:
387: enum rtw_pwrstate sc_pwrstate;
388:
389: rtw_pwrstate_t sc_pwrstate_cb;
390:
391: u_int16_t sc_inten;
392: int (*sc_rf_init)(struct rtw_softc *, u_int,
393: u_int8_t, enum rtw_pwrstate);
394: int (*sc_rf_pwrstate)(struct rtw_softc *,
395: enum rtw_pwrstate);
396: int (*sc_rf_tune)(struct rtw_softc *, u_int);
397: int (*sc_rf_txpower)(struct rtw_softc *, u_int8_t);
398:
399: /* interrupt acknowledge hook */
400: void (*sc_intr_ack)(struct rtw_regs *);
401:
402: int (*sc_enable)(struct rtw_softc *);
403: void (*sc_disable)(struct rtw_softc *);
404: void (*sc_power)(struct rtw_softc *, int);
405: struct rtw_mtbl sc_mtbl;
406: struct rtw_hooks sc_hooks;
407:
408: caddr_t sc_radiobpf;
409:
410: struct timeval sc_last_beacon;
411: struct timeout sc_scan_to;
412: u_int sc_cur_chan;
413:
414: u_int32_t sc_tsfth; /* most significant TSFT bits */
415: u_int32_t sc_rcr; /* RTW_RCR */
416: u_int8_t sc_csthr; /* carrier-sense threshold */
417:
418: int sc_do_tick; /* indicate 1s ticks */
419: struct timeval sc_tick0; /* first tick */
420:
421: u_int8_t sc_rev; /* PCI/Cardbus revision */
422:
423: u_int32_t sc_anaparm[2]; /* RTW_ANAPARM_? registers */
424:
425: union {
426: struct rtw_rx_radiotap_header tap;
427: u_int8_t pad[64];
428: } sc_rxtapu;
429: union {
430: struct rtw_tx_radiotap_header tap;
431: u_int8_t pad[64];
432: } sc_txtapu;
433: union rtw_keys sc_keys;
434: int sc_txkey;
435: struct ifqueue sc_beaconq;
436: struct rtw_led_state sc_led_state;
437: u_int sc_hwverid;
438: };
439:
440: #define sc_if sc_ic.ic_if
441: #define sc_rxtap sc_rxtapu.tap
442: #define sc_txtap sc_txtapu.tap
443:
444: extern int rtw_host_rfio;
445:
446: void rtw_txdac_enable(struct rtw_softc *, int);
447: void rtw_anaparm_enable(struct rtw_regs *, int);
448: void rtw_config0123_enable(struct rtw_regs *, int);
449: void rtw_continuous_tx_enable(struct rtw_softc *, int);
450: void rtw_set_access(struct rtw_regs *, enum rtw_access);
451:
452: void rtw_attach(struct rtw_softc *);
453: int rtw_detach(struct rtw_softc *);
454: int rtw_intr(void *);
455:
456: void rtw_disable(struct rtw_softc *);
457: int rtw_enable(struct rtw_softc *);
458:
459: int rtw_activate(struct device *, enum devact);
460: void rtw_power(int, void *);
461: void rtw_shutdown(void *);
462:
463: const char *rtw_pwrstate_string(enum rtw_pwrstate);
464:
465: #endif /* _DEV_IC_RTWVAR_H_ */
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