Annotation of sys/dev/ic/rf3000reg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: rf3000reg.h,v 1.2 2004/07/25 00:15:47 millert Exp $ */
2: /* $NetBSD: rf3000reg.h,v 1.3 2004/07/21 04:25:22 dyoung Exp $ */
3:
4: /*
5: * Copyright (c) 2004 David Young. All rights reserved.
6: *
7: * This code was written by David Young.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. Neither the name of the author nor the names of any co-contributors
18: * may be used to endorse or promote products derived from this software
19: * without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
22: * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
23: * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24: * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
25: * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
26: * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
27: * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29: * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30: * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32: * OF SUCH DAMAGE.
33: */
34:
35: #ifndef _DEV_IC_RF3000REG_H_
36: #define _DEV_IC_RF3000REG_H_
37:
38: /*
39: * Serial bus format for RF Microdevices RF3000 spread-spectrum
40: * baseband modem.
41: */
42: #define RF3000_TWI_DATA_MASK 0xff
43: #define RF3000_TWI_ADDR_MASK 0x7f
44: #define RF3000_TWI_AI 0x80 /* auto-increment */
45:
46: /*
47: * Registers for RFMD RF3000.
48: */
49: #define RF3000_CTL 0x01 /* modem control */
50: #define RF3000_CTL_MODE_MASK BITS(7, 4)
51: #define RF3000_CTL_MODE_1MBPS 0
52: #define RF3000_CTL_MODE_RSVD0 1
53: #define RF3000_CTL_MODE_2MBPS 2
54: #define RF3000_CTL_MODE_2MBPS_SHORT 3
55: #define RF3000_CTL_MODE_5MBPS 4
56: #define RF3000_CTL_MODE_5MBPS_SHORT 5
57: #define RF3000_CTL_MODE_11MBPS 6
58: #define RF3000_CTL_MODE_11MBPS_SHORT 7
59: #define RF3000_CTL_MODE_BPSK 8
60: #define RF3000_CTL_MODE_QPSK 9
61: #define RF3000_CTL_MODE_RSVD1 10
62: #define RF3000_CTL_MODE_RSVD2 11
63: #define RF3000_RXSTAT RF3000_CTL /* RX status */
64: #define RF3000_RXSTAT_SHORTPRE BIT(3) /* 1: short preamble */
65: #define RF3000_RXSTAT_ACQ BIT(2) /* 1: acquired */
66: #define RF3000_RXSTAT_SFD BIT(1) /* 1: SFD detected */
67: #define RF3000_RXSTAT_CRC BIT(0) /* 1: CRC invalid */
68: #define RF3000_CCACTL 0x02 /* CCA control */
69: /* CCA mode */
70: #define RF3000_CCACTL_MODE_MASK BITS(7, 6)
71: #define RF3000_CCACTL_MODE_RSSIT 0 /* RSSI threshold */
72: #define RF3000_CCACTL_MODE_ACQ 1 /* acquisition */
73: #define RF3000_CCACTL_MODE_BOTH 2 /* threshold or acq. */
74: /* RSSI threshold for CCA */
75: #define RF3000_CCACTL_RSSIT_MASK BITS(5, 0)
76: #define RF3000_DIVCTL 0x03 /* diversity control */
77: #define RF3000_DIVCTL_ENABLE BIT(7) /* enable diversity */
78: #define RF3000_DIVCTL_ANTSEL BIT(6) /* if ENABLE = 0, set
79: * ANT SEL
80: */
81: #define RF3000_RSSI RF3000_DIVCTL /* RSSI value */
82: #define RF3000_RSSI_MASK BITS(5, 0)
83: #define RF3000_GAINCTL 0x11 /* TX variable gain control */
84: #define RF3000_GAINCTL_TXVGC_MASK BITS(7, 2)
85: #define RF3000_GAINCTL_SCRAMBLER BIT(1)
86: #define RF3000_LOGAINCAL 0x14 /* low gain calibration */
87: #define RF3000_LOGAINCAL_CAL_MASK BITS(5, 0)
88: #define RF3000_HIGAINCAL 0x15 /* high gain calibration */
89: #define RF3000_HIGAINCAL_CAL_MASK BITS(5, 0)
90: #define RF3000_HIGAINCAL_DSSSPAD BIT(6) /* 6dB gain pad for DSSS
91: * modes (meaning?)
92: */
93: #define RF3000_OPTIONS1 0x1C /* Options Register 1 */
94: /* Saturation threshold is 4 + offset, where -3 <= offset <= 3.
95: * SAT_THRESH is the absolute value, SAT_THRESH_SIGN is the sign.
96: */
97: #define RF3000_OPTIONS1_SAT_THRESH_SIGN BIT(7)
98: #define RF3000_OPTIONS1_SAT_THRESH BITS(6,5)
99: #define RF3000_OPTIONS1_ALTAGC BIT(4) /* 1: retrigger AGC
100: * algorithm on ADC
101: * saturation
102: */
103: #define RF3000_OPTIONS1_ALTBUS BIT(3) /* 1: enable alternate
104: * Tx/Rx data bus
105: * interface.
106: */
107: #define RF3000_OPTIONS1_RESERVED0_MASK BITS(2,0)/* 0 */
108:
109: #define RF3000_OPTIONS2 0x1D /* Options Register 2 */
110: /* 1: delay next AGC 2us instead of 1us after a 1->0 LNAGS-pin transition. */
111: #define RF3000_OPTIONS2_LNAGS_DELAY BIT(7)
112: #define RF3000_OPTIONS2_RESERVED0_MASK BITS(6,3) /* 0 */
113: /* Threshold for AGC re-trigger. 0: high count, 1: low count. */
114: #define RF3000_OPTIONS2_RTG_THRESH BIT(2)
115: #define RF3000_OPTIONS2_RESERVED1_MASK BITS(1,0) /* 0 */
116:
117: #endif /* _DEV_IC_RF3000REG_H_ */
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