Annotation of sys/dev/ic/dc503reg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: dc503reg.h,v 1.1 2006/07/23 19:17:23 miod Exp $ */
2: /* $NetBSD: pmreg.h,v 1.7 2005/12/11 12:18:36 christos Exp $ */
3:
4: /*
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This code is derived from software contributed to Berkeley by
9: * Ralph Campbell.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. Neither the name of the University nor the names of its contributors
20: * may be used to endorse or promote products derived from this software
21: * without specific prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33: * SUCH DAMAGE.
34: *
35: * @(#)pmreg.h 8.1 (Berkeley) 6/10/93
36: */
37:
38: /*
39: * Layout of the programmable cursor chip (DC503) registers.
40: * All registers are 16 bit wide.
41: */
42:
43: #define PCC_CMD 0x00 /* cursor command register */
44: #define PCCCMD_TEST 0x8000
45: #define PCCCMD_HSHI 0x4000
46: #define PCCCMD_VBHI 0x2000
47: #define PCCCMD_LODSA 0x1000
48: #define PCCCMD_FORG2 0x0800
49: #define PCCCMD_ENRG2 0x0400
50: #define PCCCMD_FORG1 0x0200
51: #define PCCCMD_ENRG1 0x0100
52: #define PCCCMD_XHWID 0x0080
53: #define PCCCMD_XHCL1 0x0040
54: #define PCCCMD_XHCLP 0x0020
55: #define PCCCMD_XHAIR 0x0010
56: #define PCCCMD_FOPB 0x0008
57: #define PCCCMD_ENPB 0x0004
58: #define PCCCMD_FOPA 0x0002
59: #define PCCCMD_ENPA 0x0001
60:
61: #define PCC_XPOS 0x04 /* cursor X position */
62: #define PCC_YPOS 0x08 /* cursor Y position */
63: #define PCC_XMIN_1 0x0c /* region 1 left edge */
64: #define PCC_XMAX_1 0x10 /* region 1 right edge */
65: #define PCC_YMIN_1 0x14 /* region 1 top edge */
66: #define PCC_YMAX_1 0x18 /* region 1 bottom edge */
67: #define PCC_XMIN_2 0x1c /* region 2 left edge */
68: #define PCC_XMAX_2 0x20 /* region 2 right edge */
69: #define PCC_YMIN_2 0x24 /* region 2 top edge */
70: #define PCC_YMAX_2 0x28 /* region 2 bottom edge */
71: #define PCC_LOAD 0x2c /* cursor pattern load */
72:
73: struct dc503reg {
74: volatile u_int16_t cmdr;
75: int16_t pad1;
76: volatile u_int16_t xpos;
77: int16_t pad2;
78: volatile u_int16_t ypos;
79: int16_t pad3;
80: volatile u_int16_t xmin1;
81: int16_t pad4;
82: volatile u_int16_t xmax1;
83: int16_t pad5;
84: volatile u_int16_t ymin1;
85: int16_t pad6;
86: volatile u_int16_t ymax1;
87: int16_t pad7[9];
88: volatile u_int16_t xmin2;
89: int16_t pad8;
90: volatile u_int16_t xmax2;
91: int16_t pad9;
92: volatile u_int16_t ymin2;
93: int16_t pad10;
94: volatile u_int16_t ymax2;
95: int16_t pad11;
96: volatile u_int16_t load;
97: };
98:
99: #define PCC_CURSOR_SIZE 16
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