Annotation of sys/dev/ic/cissreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: cissreg.h,v 1.8 2006/08/28 03:22:37 mickey Exp $ */
2:
3: /*
4: * Copyright (c) 2005,2006 Michael Shalayeff
5: * All rights reserved.
6: *
7: * Permission to use, copy, modify, and distribute this software for any
8: * purpose with or without fee is hereby granted, provided that the above
9: * copyright notice and this permission notice appear in all copies.
10: *
11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15: * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
16: * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
17: * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18: */
19:
20: #define CISS_BIGBIT 0x80 /* texas radio and the big beat! */
21:
22: #define CISS_IDB 0x20
23: #define CISS_IDB_CFG 0x01
24: #define CISS_ISR 0x30
25: #define CISS_IMR 0x34
26: #define CISS_READYENAB 4
27: #define CISS_READYENA 8
28: #define CISS_INQ 0x40
29: #define CISS_OUTQ 0x44
30: #define CISS_CFG_BAR 0xb4
31: #define CISS_CFG_OFF 0xb8
32:
33: #define CISS_DRVMAP_SIZE (128 / 8)
34:
35: #define CISS_CMD_CTRL_GET 0x26
36: #define CISS_CMD_CTRL_SET 0x27
37: /* sub-commands for GET/SET */
38: #define CISS_CMS_CTRL_LDID 0x10
39: #define CISS_CMS_CTRL_CTRL 0x11
40: #define CISS_CMS_CTRL_LDSTAT 0x12
41: #define CISS_CMS_CTRL_PDID 0x15
42: #define CISS_CMS_CTRL_PDBLINK 0x16
43: #define CISS_CMS_CTRL_PDBLSENS 0x17
44: #define CISS_CMS_CTRL_LDIDEXT 0x18
45: #define CISS_CMS_CTRL_REDSTAT 0x82
46: #define CISS_CMS_CTRL_FLUSH 0xc2
47: #define CISS_CMS_CTRL_ACCEPT 0xe0
48:
49: #define CISS_CMD_READ 0xc0
50: #define CISS_CMD_READ_EVENT 0xd0
51: #define CISS_EVENT_RECENT 0x08 /* ignore previous events */
52: #define CISS_EVENT_RSTOLD 0x04 /* start w/ the oldest one */
53: #define CISS_EVENT_ORDER 0x02 /* keep the order */
54: #define CISS_EVENT_SYNC 0x01 /* sync mode: wait till new come */
55: #define CISS_CMD_LDMAP 0xc2
56: #define CISS_CMD_PDMAP 0xc3
57:
58: #define ciss_bitset(d, v) ((v)[(d) >> 3] & (1 << ((d) & 7)))
59:
60: struct ciss_softc;
61:
62: struct ciss_config {
63: u_int32_t signature;
64: #define CISS_SIGNATURE (*(u_int32_t *)"CISS")
65: u_int32_t version;
66: u_int32_t methods;
67: #define CISS_METH_READY 0x0001
68: #define CISS_METH_SIMPL 0x0002
69: #define CISS_METH_PERF 0x0004
70: #define CISS_METH_EMQ 0x0008
71: u_int32_t amethod;
72: u_int32_t rmethod;
73: u_int32_t paddr_lim;
74: u_int32_t int_delay;
75: u_int32_t int_count;
76: u_int32_t maxcmd;
77: u_int32_t scsibus;
78: #define CISS_BUS_U2 0x0001
79: #define CISS_BUS_U3 0x0002
80: #define CISS_BUS_FC1 0x0100
81: #define CISS_BUS_FC2 0x0200
82: u_int32_t troff;
83: u_int8_t hostname[16];
84: u_int32_t heartbeat;
85: u_int32_t driverf;
86: #define CISS_DRV_UATT 0x0001
87: #define CISS_DRV_QINI 0x0002
88: #define CISS_DRV_LCKINT 0x0004
89: #define CISS_DRV_QTAGS 0x0008
90: #define CISS_DRV_ALPHA 0x0010
91: #define CISS_DRV_LUNS 0x0020
92: #define CISS_DRV_MSGRQ 0x0080
93: #define CISS_DRV_DBRD 0x0100
94: #define CISS_DRV_PRF 0x0200
95: u_int32_t maxsg;
96: } __packed;
97:
98: struct ciss_inquiry {
99: u_int8_t numld;
100: u_int8_t sign[4];
101: u_int8_t fw_running[4];
102: u_int8_t fw_stored[4];
103: u_int8_t hw_rev;
104: u_int8_t resv0[12];
105: u_int16_t pci_vendor;
106: u_int16_t pci_product;
107: u_int8_t resv1[10];
108: u_int8_t market_rev;
109: u_int8_t flags;
110: #define CISS_INQ_WIDE 0x08
111: #define CISS_INQ_BIGMAP 0x80
112: #define CISS_INQ_BITS "\020\04WIDE\010BIGMAP"
113: u_int8_t resv2[2];
114: u_int8_t nscsi_bus;
115: u_int8_t resv3[4];
116: u_int8_t clk[4]; /* unaligned dumbness */
117: u_int8_t buswidth;
118: u_int8_t disks[CISS_DRVMAP_SIZE];
119: u_int8_t extdisks[CISS_DRVMAP_SIZE];
120: u_int8_t nondisks[CISS_DRVMAP_SIZE];
121: } __packed;
122:
123: struct ciss_ldmap {
124: u_int32_t size;
125: u_int32_t resv;
126: struct {
127: u_int32_t tgt;
128: u_int32_t tgt2;
129: } map[1];
130: } __packed;
131:
132: struct ciss_flush {
133: u_int16_t flush;
134: #define CISS_FLUSH_ENABLE 0
135: #define CISS_FLUSH_DISABLE 1
136: u_int16_t resv[255];
137: } __packed;
138:
139: struct ciss_blink {
140: u_int32_t duration; /* x100ms */
141: u_int32_t elapsed; /* only for sense */
142: u_int8_t pdtab[256];
143: #define CISS_BLINK_ALL 1
144: #define CISS_BLINK_TIMED 2
145: u_int8_t res[248];
146: } __packed;
147:
148: struct ciss_ldid {
149: u_int16_t blksize;
150: u_int16_t nblocks[2]; /* UNALIGNED! */
151: u_int8_t params[16];
152: u_int8_t type;
153: #define CISS_LD_RAID0 0
154: #define CISS_LD_RAID4 1
155: #define CISS_LD_RAID1 2
156: #define CISS_LD_RAID5 3
157: #define CISS_LD_RAID51 4
158: #define CISS_LD_RAIDADG 5
159: u_int8_t res0;
160: u_int8_t bios_dis;
161: u_int8_t res1;
162: u_int32_t id;
163: u_int8_t label[64];
164: u_int64_t nbigblocks;
165: u_int8_t res2[410];
166: } __packed;
167:
168: struct ciss_ldstat {
169: u_int8_t stat;
170: #define CISS_LD_OK 0
171: #define CISS_LD_FAILED 1
172: #define CISS_LD_UNCONF 2
173: #define CISS_LD_DEGRAD 3
174: #define CISS_LD_RBLDRD 4 /* ready for rebuild */
175: #define CISS_LD_REBLD 5
176: #define CISS_LD_PDINV 6 /* wrong phys drive replaced */
177: #define CISS_LD_PDUNC 7 /* phys drive is not connected proper */
178: #define CISS_LD_EXPND 10 /* expanding */
179: #define CISS_LD_NORDY 11 /* volume is not ready */
180: #define CISS_LD_QEXPND 12 /* queued for expansion */
181: u_int8_t failed[4]; /* failed map */
182: u_int8_t res0[416];
183: u_int8_t prog[4]; /* blocks left to rebuild/expand */
184: u_int8_t rebuild; /* drive that is rebuilding */
185: u_int16_t remapcnt[32]; /* count of re3mapped blocks for pds */
186: u_int8_t replaced[4]; /* replaced drives map */
187: u_int8_t spare[4]; /* used spares map */
188: u_int8_t sparestat; /* spare status */
189: #define CISS_LD_CONF 0x01 /* spare configured */
190: #define CISS_LD_RBLD 0x02 /* spare is used and rebuilding */
191: #define CISS_LD_DONE 0x04 /* spare rebuild done */
192: #define CISS_LD_FAIL 0x08 /* at least one spare drive has failed */
193: #define CISS_LD_USED 0x10 /* at least one spare drive is used */
194: #define CISS_LD_AVAIL 0x20 /* at least one spare is available */
195: u_int8_t sparemap[32]; /* spare->pd replacement map */
196: u_int8_t replok[4]; /* replaced failed map */
197: u_int8_t readyok; /* ready to become ok */
198: u_int8_t memfail; /* cache mem failure */
199: u_int8_t expfail; /* expansion failure */
200: u_int8_t rebldfail; /* rebuild failure */
201: #define CISS_LD_RBLD_READ 0x01 /* read faild */
202: #define CISS_LD_RBLD_WRITE 0x02 /* write fail */
203: u_int8_t bigfailed[16]; /* bigmap vers of same of the above */
204: u_int8_t bigremapcnt[256];
205: u_int8_t bigreplaced[16];
206: u_int8_t bigspare[16];
207: u_int8_t bigsparemap[128];
208: u_int8_t bigreplok[16];
209: u_int8_t bigrebuild; /* big-number rebuilding driveno */
210: } __packed;
211:
212: struct ciss_pdid {
213: u_int8_t bus;
214: u_int8_t target;
215: u_int16_t blksz;
216: u_int32_t nblocks;
217: u_int32_t resblks;
218: u_int8_t model[40];
219: u_int8_t serial[40];
220: u_int8_t revision[8];
221: u_int8_t bits;
222: u_int8_t res0[2];
223: u_int8_t present;
224: #define CISS_PD_PRESENT 0x01
225: #define CISS_PD_NONDSK 0x02
226: #define CISS_PD_WIDE 0x04
227: #define CISS_PD_SYNC 0x08
228: #define CISS_PD_NARROW 0x10
229: #define CISS_PD_W2NARR 0x20 /* wide downgrade to narrow */
230: #define CISS_PD_ULTRA 0x40
231: #define CISS_PD_ULTRA2 0x80
232: u_int8_t config;
233: #define CISS_PD_SMART 0x01
234: #define CISS_PD_SMERRR 0x02
235: #define CISS_PD_SMERRE 0x04
236: #define CISS_PD_SMERRD 0x08
237: #define CISS_PD_EXT 0x10
238: #define CISS_PD_CONF 0x20
239: #define CISS_PD_SPARE 0x40
240: #define CISS_PD_CASAVE 0x80
241: u_int8_t res1;
242: u_int8_t cache;
243: #define CISS_PD_CACHE 0x01
244: #define CISS_PD_CASAFE 0x01
245: u_int8_t res2[5];
246: u_int8_t connector[2];
247: u_int8_t res3;
248: u_int8_t bay;
249: u_int16_t rpm;
250: u_int8_t type;
251: u_int8_t res4[393];
252: } __packed;
253:
254: struct ciss_event {
255: u_int32_t reltime; /* time since controller boot */
256: u_int16_t event;
257: #define CISS_EVCLS_PROTO 0
258: #define CISS_EVCLS_PLUG 1
259: #define CISS_EVCLS_HW 2
260: #define CISS_EVCLS_ENV 3
261: #define CISS_EVCLS_PD 4 /* ciss_evpdchg in details */
262: #define CISS_EVCLS_LD 5
263: #define CISS_EVCLS_CTRL 6
264: #define CISS_EVCLS_CISS 8 /* funky errors */
265: #define CISS_EVCLS_RESV 9
266: u_int16_t subevent;
267: #define CISS_EVPROTO_STAT 0
268: #define CISS_EVPROTO_ERR 1
269: #define CISS_EVPLUG_PDCHG 0 /* ciss_evpdchg */
270: #define CISS_EVPLUG_POWER 1 /* ciss_evpschg */
271: #define CISS_EVPLUG_FAN 2 /* ciss_evfanchg */
272: #define CISS_EVPLUG_UPS 3 /* ciss_evupschg */
273: #define CISS_EVPLUG_CTRL 4 /* ciss_evctrlchg: ctrl removed? (; */
274: #define CISS_EVHW_CABLES 0
275: #define CISS_EVHW_MEMORY 1
276: #define CISS_EVHW_FAN 2 /* detail as in CISS_EVPLUG_FAN */
277: #define CISS_EVHW_VRM 3
278: #define CISS_EVENV_TEMP 0 /* ciss_evtempchg */
279: #define CISS_EVENV_PS 1
280: #define CISS_EVENV_CHASSIS 2
281: #define CISS_EVENV_AC 3
282: #define CISS_EVPD_STAT 0
283: #define CISS_EVLD_STAT 0
284: #define CISS_EVLD_ERR 1
285: #define CISS_EVLD_CHECK 2 /* surface check */
286: #define CISS_EVCTRL_STAT 0
287: u_int16_t detail;
288: #define CISS_EVSTAT_NONE 0
289: #define CISS_EVSTAT_DISABLE 1
290: #define CISS_EVSTAT_TMO 2 /* async event poll timeout */
291: #define CISS_EVERR_OVERFLOW 0 /* event queue overflow */
292: #define CISS_EVPLUG_REMOVE 0
293: #define CISS_EVPLUG_INSERT 1
294: #define CISS_EVFAN_FAULT 0
295: #define CISS_EVFAN_DEGRADED 1
296: #define CISS_EVFAN_OK 2
297: #define CISS_EVVRM_REMOVE 0
298: #define CISS_EVVRM_INSERT 1
299: #define CISS_EVVRM_FAILED 2
300: #define CISS_EVVRM_OK 3
301: #define CISS_EVTEMP_LIMEX 0 /* limit exceeded */
302: #define CISS_EVTEMP_WARN 1
303: #define CISS_EVTEMP_OK 2
304: #define CISS_EVPS_FAIL 0
305: #define CISS_EVPS_OK 2
306: #define CISS_EVCHAS_OPEN 0
307: #define CISS_EVCHAS_CLOSE 2
308: #define CISS_EVAC_FAIL 0
309: #define CISS_EVAC_BATTLOW 1
310: #define CISS_EVPDSTAT_FAIL 0
311: #define CISS_EVLDSTAT_CHG 0 /* ciss_evldchg */
312: #define CISS_EVLDSTAT_EXMEDIA 1 /* untolerant cfg got drive replaced */
313: #define CISS_EVLDSTAT_RERDERR 2 /* ciss_evldrblderr */
314: #define CISS_EVLDSTAT_REWRERR 3 /* ciss_evldrblderr */
315: #define CISS_EVLDERR_FATAL 0 /* ciss_evlderr */
316: #define CISS_EVCHECK_DONE 0 /* details have onle 16bit ld num */
317: #define CISS_EVCTRLSTAT_CHG 0 /* ciss_evctrlstat */
318: u_int8_t data[64];
319: u_int8_t msg[80];
320: u_int32_t tag;
321: u_int16_t monday;
322: u_int16_t year;
323: u_int32_t time;
324: u_int16_t presec; /* time for events before boot */
325: u_int8_t device[8];
326: u_int8_t resv[336];
327: } __packed;
328:
329: struct ciss_evpdchg { /* details pointer */
330: u_int16_t pd;
331: u_int8_t flag; /* 1 for configured */
332: u_int8_t spare;
333: u_int8_t bigpd; /* big number of the pd */
334: u_int8_t baynum;
335: } __packed;
336:
337: struct ciss_evpschg { /* details pointer */
338: u_int16_t port;
339: u_int16_t psid;
340: u_int16_t box;
341: } __packed;
342:
343: struct ciss_evfanchg { /* details pointer */
344: u_int16_t port;
345: u_int16_t fanid;
346: u_int16_t box;
347: } __packed;
348:
349: struct ciss_evupschg { /* details pointer */
350: u_int16_t port;
351: u_int16_t upsid;
352: } __packed;
353:
354: struct ciss_evctrlchg { /* details pointer */
355: u_int16_t slot;
356: } __packed;
357:
358: struct ciss_evtempchg { /* details pointer */
359: u_int16_t port;
360: u_int16_t sensid;
361: u_int16_t box;
362: } __packed;
363:
364: struct ciss_evldchg { /* details pointer */
365: u_int16_t ld;
366: u_int8_t prevstat; /* same as ldstat->state */
367: u_int8_t newstat; /* same as ldstat->state */
368: u_int8_t sparestat;
369: } __packed;
370:
371: struct ciss_evldrblderr { /* details pointer */
372: u_int16_t ld;
373: u_int8_t replace;
374: u_int8_t errpd;
375: u_int8_t bigreplace;
376: u_int8_t bigerrpd;
377: } __packed;
378:
379: struct ciss_evlderr { /* details pointer */
380: u_int16_t ld;
381: u_int16_t blkno[2]; /* unaligned; if >2tb see big later */
382: u_int16_t count;
383: u_int8_t ldcmd;
384: u_int8_t bus;
385: u_int8_t target;
386: u_int8_t bigblkno[8]; /* unaligned */
387: } __packed;
388:
389: struct ciss_evctrlstat { /* details pointer */
390: u_int8_t prefctrl;
391: u_int8_t currmode;
392: u_int8_t redctrl;
393: u_int8_t redfail;
394: u_int8_t prevctrl;
395: u_int8_t prevmode;
396: u_int8_t prevred;
397: u_int8_t prevfail;
398: } __packed;
399:
400: struct ciss_cmd {
401: u_int8_t resv0; /* 00 */
402: u_int8_t sgin; /* 01: #sg in the cmd */
403: u_int16_t sglen; /* 02: #sg total */
404: u_int32_t id; /* 04: cmd id << 2 and status bits */
405: #define CISS_CMD_ERR 0x02
406: u_int32_t id_hi; /* 08: not used */
407: u_int32_t tgt; /* 0c: tgt:bus:mode or lun:mode */
408: #define CISS_CMD_MODE_PERIPH 0x00000000
409: #define CISS_CMD_MODE_LD 0x40000000
410: #define CISS_CMD_TGT_MASK 0x40ffffff
411: #define CISS_CMD_BUS_MASK 0x3f000000
412: #define CISS_CMD_BUS_SHIFT 24
413: u_int32_t tgt2; /* 10: scsi-3 address bytes */
414:
415: u_int8_t cdblen; /* 14: valid length of cdb */
416: u_int8_t flags; /* 15 */
417: #define CISS_CDB_CMD 0x00
418: #define CISS_CDB_MSG 0x01
419: #define CISS_CDB_NOTAG 0x00
420: #define CISS_CDB_SIMPL 0x20
421: #define CISS_CDB_QHEAD 0x28
422: #define CISS_CDB_ORDR 0x30
423: #define CISS_CDB_AUTO 0x38
424: #define CISS_CDB_IN 0x80
425: #define CISS_CDB_OUT 0x40
426: u_int16_t tmo; /* 16: timeout in seconds */
427: #define CISS_MAX_CDB 12
428: u_int8_t cdb[16];/* 18 */
429:
430: u_int64_t err_pa; /* 28: pa(struct ciss_error *) */
431: u_int32_t err_len;/* 30 */
432:
433: struct { /* 34 */
434: u_int32_t addr_lo;
435: u_int32_t addr_hi;
436: u_int32_t len;
437: u_int32_t flags;
438: #define CISS_SG_EXT 0x0001
439: } sgl[1];
440: } __packed;
441:
442: struct ciss_error {
443: u_int8_t scsi_stat; /* SCSI_OK etc */
444: u_int8_t senselen;
445: u_int16_t cmd_stat;
446: #define CISS_ERR_OK 0
447: #define CISS_ERR_TGTST 1 /* target status */
448: #define CISS_ERR_UNRUN 2
449: #define CISS_ERR_OVRUN 3
450: #define CISS_ERR_INVCMD 4
451: #define CISS_ERR_PROTE 5
452: #define CISS_ERR_HWERR 6
453: #define CISS_ERR_CLOSS 7
454: #define CISS_ERR_ABRT 8
455: #define CISS_ERR_FABRT 9
456: #define CISS_ERR_UABRT 10
457: #define CISS_ERR_TMO 11
458: #define CISS_ERR_NABRT 12
459: u_int32_t resid;
460: u_int8_t err_type[4];
461: u_int32_t err_info;
462: u_int8_t sense[32];
463: } __packed;
464:
465: struct ciss_ccb {
466: TAILQ_ENTRY(ciss_ccb) ccb_link;
467: struct ciss_softc *ccb_sc;
468: paddr_t ccb_cmdpa;
469: enum {
470: CISS_CCB_FREE = 0x01,
471: CISS_CCB_READY = 0x02,
472: CISS_CCB_ONQ = 0x04,
473: CISS_CCB_PREQ = 0x08,
474: CISS_CCB_POLL = 0x10,
475: CISS_CCB_FAIL = 0x80
476: #define CISS_CCB_BITS "\020\01FREE\02READY\03ONQ\04PREQ\05POLL\010FAIL"
477: } ccb_state;
478:
479: struct scsi_xfer *ccb_xs;
480: size_t ccb_len;
481: void *ccb_data;
482: bus_dmamap_t ccb_dmamap;
483:
484: struct ciss_error ccb_err;
485: struct ciss_cmd ccb_cmd; /* followed by sgl */
486: };
487:
488: typedef TAILQ_HEAD(ciss_queue_head, ciss_ccb) ciss_queue_head;
489:
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