Annotation of sys/dev/ic/ar5212var.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: ar5212var.h,v 1.14 2007/03/12 01:04:52 reyk Exp $ */
2:
3: /*
4: * Copyright (c) 2004, 2005, 2006, 2007 Reyk Floeter <reyk@openbsd.org>
5: *
6: * Permission to use, copy, modify, and distribute this software for any
7: * purpose with or without fee is hereby granted, provided that the above
8: * copyright notice and this permission notice appear in all copies.
9: *
10: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14: * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15: * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16: * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17: */
18:
19: /*
20: * Specific definitions for the Atheros AR5001 Wireless LAN chipset
21: * (AR5212/AR5311).
22: */
23:
24: #ifndef _AR5K_AR5212_VAR_H
25: #define _AR5K_AR5212_VAR_H
26:
27: #include <dev/ic/ar5xxx.h>
28:
29: /*
30: * Define a "magic" code for the AR5212 (the HAL layer wants it)
31: */
32:
33: #define AR5K_AR5212_MAGIC 0x0000145c /* 5212 */
34: #define AR5K_AR5212_TX_NUM_QUEUES 10
35:
36: #if BYTE_ORDER == BIG_ENDIAN
37: #define AR5K_AR5212_INIT_CFG ( \
38: AR5K_AR5212_CFG_SWTD | AR5K_AR5212_CFG_SWRD \
39: )
40: #else
41: #define AR5K_AR5212_INIT_CFG 0x00000000
42: #endif
43:
44: /*
45: * Internal RX/TX descriptor structures
46: * (rX: reserved fields possibily used by future versions of the ar5k chipset)
47: */
48:
49: struct ar5k_ar5212_rx_desc {
50: /*
51: * RX control word 0
52: */
53: u_int32_t rx_control_0;
54:
55: #define AR5K_AR5212_DESC_RX_CTL0 0x00000000
56:
57: /*
58: * RX control word 1
59: */
60: u_int32_t rx_control_1;
61:
62: #define AR5K_AR5212_DESC_RX_CTL1_BUF_LEN 0x00000fff
63: #define AR5K_AR5212_DESC_RX_CTL1_INTREQ 0x00002000
64: } __packed;
65:
66: struct ar5k_ar5212_rx_status {
67: /*
68: * RX status word 0
69: */
70: u_int32_t rx_status_0;
71:
72: #define AR5K_AR5212_DESC_RX_STATUS0_DATA_LEN 0x00000fff
73: #define AR5K_AR5212_DESC_RX_STATUS0_MORE 0x00001000
74: #define AR5K_AR5212_DESC_RX_STATUS0_DECOMP_CRC_ERROR 0x00002000
75: #define AR5K_AR5212_DESC_RX_STATUS0_RECEIVE_RATE 0x000f8000
76: #define AR5K_AR5212_DESC_RX_STATUS0_RECEIVE_RATE_S 15
77: #define AR5K_AR5212_DESC_RX_STATUS0_RECEIVE_SIGNAL 0x0ff00000
78: #define AR5K_AR5212_DESC_RX_STATUS0_RECEIVE_SIGNAL_S 20
79: #define AR5K_AR5212_DESC_RX_STATUS0_RECEIVE_ANTENNA 0xf0000000
80: #define AR5K_AR5212_DESC_RX_STATUS0_RECEIVE_ANTENNA_S 28
81:
82: /*
83: * RX status word 1
84: */
85: u_int32_t rx_status_1;
86:
87: #define AR5K_AR5212_DESC_RX_STATUS1_DONE 0x00000001
88: #define AR5K_AR5212_DESC_RX_STATUS1_FRAME_RECEIVE_OK 0x00000002
89: #define AR5K_AR5212_DESC_RX_STATUS1_CRC_ERROR 0x00000004
90: #define AR5K_AR5212_DESC_RX_STATUS1_DECRYPT_CRC_ERROR 0x00000008
91: #define AR5K_AR5212_DESC_RX_STATUS1_PHY_ERROR 0x00000010
92: #define AR5K_AR5212_DESC_RX_STATUS1_MIC_ERROR 0x00000020
93: #define AR5K_AR5212_DESC_RX_STATUS1_KEY_INDEX_VALID 0x00000100
94: #define AR5K_AR5212_DESC_RX_STATUS1_KEY_INDEX 0x0000fe00
95: #define AR5K_AR5212_DESC_RX_STATUS1_KEY_INDEX_S 9
96: #define AR5K_AR5212_DESC_RX_STATUS1_RECEIVE_TIMESTAMP 0x7fff0000
97: #define AR5K_AR5212_DESC_RX_STATUS1_RECEIVE_TIMESTAMP_S 16
98: #define AR5K_AR5212_DESC_RX_STATUS1_KEY_CACHE_MISS 0x80000000
99: } __packed;
100:
101: struct ar5k_ar5212_rx_error {
102: /*
103: * RX error word 0
104: */
105: u_int32_t rx_error_0;
106:
107: #define AR5K_AR5212_DESC_RX_ERROR0 0x00000000
108:
109: /*
110: * RX error word 1
111: */
112: u_int32_t rx_error_1;
113:
114: #define AR5K_AR5212_DESC_RX_ERROR1_PHY_ERROR_CODE 0x0000ff00
115: #define AR5K_AR5212_DESC_RX_ERROR1_PHY_ERROR_CODE_S 8
116: } __packed;
117:
118: #define AR5K_AR5212_DESC_RX_PHY_ERROR_NONE 0x00
119: #define AR5K_AR5212_DESC_RX_PHY_ERROR_TIMING 0x20
120: #define AR5K_AR5212_DESC_RX_PHY_ERROR_PARITY 0x40
121: #define AR5K_AR5212_DESC_RX_PHY_ERROR_RATE 0x60
122: #define AR5K_AR5212_DESC_RX_PHY_ERROR_LENGTH 0x80
123: #define AR5K_AR5212_DESC_RX_PHY_ERROR_64QAM 0xa0
124: #define AR5K_AR5212_DESC_RX_PHY_ERROR_SERVICE 0xc0
125: #define AR5K_AR5212_DESC_RX_PHY_ERROR_TRANSMITOVR 0xe0
126:
127: struct ar5k_ar5212_tx_desc {
128: /*
129: * TX control word 0
130: */
131: u_int32_t tx_control_0;
132:
133: #define AR5K_AR5212_DESC_TX_CTL0_FRAME_LEN 0x00000fff
134: #define AR5K_AR5212_DESC_TX_CTL0_XMIT_POWER 0x003f0000
135: #define AR5K_AR5212_DESC_TX_CTL0_XMIT_POWER_S 16
136: #define AR5K_AR5212_DESC_TX_CTL0_RTSENA 0x00400000
137: #define AR5K_AR5212_DESC_TX_CTL0_VEOL 0x00800000
138: #define AR5K_AR5212_DESC_TX_CTL0_CLRDMASK 0x01000000
139: #define AR5K_AR5212_DESC_TX_CTL0_ANT_MODE_XMIT 0x1e000000
140: #define AR5K_AR5212_DESC_TX_CTL0_ANT_MODE_XMIT_S 25
141: #define AR5K_AR5212_DESC_TX_CTL0_INTREQ 0x20000000
142: #define AR5K_AR5212_DESC_TX_CTL0_ENCRYPT_KEY_VALID 0x40000000
143: #define AR5K_AR5212_DESC_TX_CTL0_CTSENA 0x80000000
144:
145: /*
146: * TX control word 1
147: */
148: u_int32_t tx_control_1;
149:
150: #define AR5K_AR5212_DESC_TX_CTL1_BUF_LEN 0x00000fff
151: #define AR5K_AR5212_DESC_TX_CTL1_MORE 0x00001000
152: #define AR5K_AR5212_DESC_TX_CTL1_ENCRYPT_KEY_INDEX 0x000fe000
153: #define AR5K_AR5212_DESC_TX_CTL1_ENCRYPT_KEY_INDEX_S 13
154: #define AR5K_AR5212_DESC_TX_CTL1_FRAME_TYPE 0x00f00000
155: #define AR5K_AR5212_DESC_TX_CTL1_FRAME_TYPE_S 20
156: #define AR5K_AR5212_DESC_TX_CTL1_NOACK 0x01000000
157: #define AR5K_AR5212_DESC_TX_CTL1_COMP_PROC 0x06000000
158: #define AR5K_AR5212_DESC_TX_CTL1_COMP_PROC_S 25
159: #define AR5K_AR5212_DESC_TX_CTL1_COMP_IV_LEN 0x18000000
160: #define AR5K_AR5212_DESC_TX_CTL1_COMP_IV_LEN_S 27
161: #define AR5K_AR5212_DESC_TX_CTL1_COMP_ICV_LEN 0x60000000
162: #define AR5K_AR5212_DESC_TX_CTL1_COMP_ICV_LEN_S 29
163:
164: /*
165: * TX control word 2
166: */
167: u_int32_t tx_control_2;
168:
169: #define AR5K_AR5212_DESC_TX_CTL2_RTS_DURATION 0x00007fff
170: #define AR5K_AR5212_DESC_TX_CTL2_DURATION_UPDATE_ENABLE 0x00008000
171: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES0 0x000f0000
172: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES0_S 16
173: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES1 0x00f00000
174: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES1_S 20
175: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES2 0x0f000000
176: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES2_S 24
177: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES3 0xf0000000
178: #define AR5K_AR5212_DESC_TX_CTL2_XMIT_TRIES3_S 28
179:
180: /*
181: * TX control word 3
182: */
183: u_int32_t tx_control_3;
184:
185: #define AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE0 0x0000001f
186: #define AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE1 0x000003e0
187: #define AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE1_S 5
188: #define AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE2 0x00007c00
189: #define AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE2_S 10
190: #define AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE3 0x000f8000
191: #define AR5K_AR5212_DESC_TX_CTL3_XMIT_RATE3_S 15
192: #define AR5K_AR5212_DESC_TX_CTL3_RTS_CTS_RATE 0x01f00000
193: #define AR5K_AR5212_DESC_TX_CTL3_RTS_CTS_RATE_S 20
194: } __packed;
195:
196: struct ar5k_ar5212_tx_status {
197: /*
198: * TX status word 0
199: */
200: u_int32_t tx_status_0;
201:
202: #define AR5K_AR5212_DESC_TX_STATUS0_FRAME_XMIT_OK 0x00000001
203: #define AR5K_AR5212_DESC_TX_STATUS0_EXCESSIVE_RETRIES 0x00000002
204: #define AR5K_AR5212_DESC_TX_STATUS0_FIFO_UNDERRUN 0x00000004
205: #define AR5K_AR5212_DESC_TX_STATUS0_FILTERED 0x00000008
206: #define AR5K_AR5212_DESC_TX_STATUS0_RTS_FAIL_COUNT 0x000000f0
207: #define AR5K_AR5212_DESC_TX_STATUS0_RTS_FAIL_COUNT_S 4
208: #define AR5K_AR5212_DESC_TX_STATUS0_DATA_FAIL_COUNT 0x00000f00
209: #define AR5K_AR5212_DESC_TX_STATUS0_DATA_FAIL_COUNT_S 8
210: #define AR5K_AR5212_DESC_TX_STATUS0_VIRT_COLL_COUNT 0x0000f000
211: #define AR5K_AR5212_DESC_TX_STATUS0_VIRT_COLL_COUNT_S 12
212: #define AR5K_AR5212_DESC_TX_STATUS0_SEND_TIMESTAMP 0xffff0000
213: #define AR5K_AR5212_DESC_TX_STATUS0_SEND_TIMESTAMP_S 16
214:
215: /*
216: * TX status word 1
217: */
218: u_int32_t tx_status_1;
219:
220: #define AR5K_AR5212_DESC_TX_STATUS1_DONE 0x00000001
221: #define AR5K_AR5212_DESC_TX_STATUS1_SEQ_NUM 0x00001ffe
222: #define AR5K_AR5212_DESC_TX_STATUS1_SEQ_NUM_S 1
223: #define AR5K_AR5212_DESC_TX_STATUS1_ACK_SIG_STRENGTH 0x001fe000
224: #define AR5K_AR5212_DESC_TX_STATUS1_ACK_SIG_STRENGTH_S 13
225: #define AR5K_AR5212_DESC_TX_STATUS1_FINAL_TS_INDEX 0x00600000
226: #define AR5K_AR5212_DESC_TX_STATUS1_FINAL_TS_INDEX_S 21
227: #define AR5K_AR5212_DESC_TX_STATUS1_COMP_SUCCESS 0x00800000
228: #define AR5K_AR5212_DESC_TX_STATUS1_XMIT_ANTENNA 0x01000000
229: } __packed;
230:
231: /*
232: * Public function prototypes
233: */
234: extern ar5k_attach_t ar5k_ar5212_attach;
235:
236: /*
237: * Initial register values which have to be loaded into the
238: * card at boot time and after each reset.
239: */
240:
241: struct ar5k_ar5212_ini {
242: u_int8_t ini_flags;
243: u_int16_t ini_register;
244: u_int32_t ini_value;
245:
246: #define AR5K_INI_FLAG_511X 0x00
247: #define AR5K_INI_FLAG_5111 0x01
248: #define AR5K_INI_FLAG_5112 0x02
249: #define AR5K_INI_FLAG_BOTH (AR5K_INI_FLAG_5111 | AR5K_INI_FLAG_5112)
250: };
251:
252: #define AR5K_AR5212_INI { \
253: { AR5K_INI_FLAG_BOTH, 0x000c, 0x00000000 }, \
254: { AR5K_INI_FLAG_BOTH, 0x0034, 0x00000005 }, \
255: { AR5K_INI_FLAG_BOTH, 0x0040, 0x00000000 }, \
256: { AR5K_INI_FLAG_BOTH, 0x0044, 0x00000008 }, \
257: { AR5K_INI_FLAG_BOTH, 0x0048, 0x00000008 }, \
258: { AR5K_INI_FLAG_BOTH, 0x004c, 0x00000010 }, \
259: { AR5K_INI_FLAG_BOTH, 0x0050, 0x00000000 }, \
260: { AR5K_INI_FLAG_BOTH, 0x0054, 0x0000001f }, \
261: { AR5K_INI_FLAG_BOTH, 0x0800, 0x00000000 }, \
262: { AR5K_INI_FLAG_BOTH, 0x0804, 0x00000000 }, \
263: { AR5K_INI_FLAG_BOTH, 0x0808, 0x00000000 }, \
264: { AR5K_INI_FLAG_BOTH, 0x080c, 0x00000000 }, \
265: { AR5K_INI_FLAG_BOTH, 0x0810, 0x00000000 }, \
266: { AR5K_INI_FLAG_BOTH, 0x0814, 0x00000000 }, \
267: { AR5K_INI_FLAG_BOTH, 0x0818, 0x00000000 }, \
268: { AR5K_INI_FLAG_BOTH, 0x081c, 0x00000000 }, \
269: { AR5K_INI_FLAG_BOTH, 0x0820, 0x00000000 }, \
270: { AR5K_INI_FLAG_BOTH, 0x0824, 0x00000000 }, \
271: { AR5K_INI_FLAG_BOTH, 0x1230, 0x00000000 }, \
272: { AR5K_INI_FLAG_BOTH, 0x1270, 0x00000000 }, \
273: { AR5K_INI_FLAG_BOTH, 0x1038, 0x00000000 }, \
274: { AR5K_INI_FLAG_BOTH, 0x1078, 0x00000000 }, \
275: { AR5K_INI_FLAG_BOTH, 0x10b8, 0x00000000 }, \
276: { AR5K_INI_FLAG_BOTH, 0x10f8, 0x00000000 }, \
277: { AR5K_INI_FLAG_BOTH, 0x1138, 0x00000000 }, \
278: { AR5K_INI_FLAG_BOTH, 0x1178, 0x00000000 }, \
279: { AR5K_INI_FLAG_BOTH, 0x11b8, 0x00000000 }, \
280: { AR5K_INI_FLAG_BOTH, 0x11f8, 0x00000000 }, \
281: { AR5K_INI_FLAG_BOTH, 0x1238, 0x00000000 }, \
282: { AR5K_INI_FLAG_BOTH, 0x1278, 0x00000000 }, \
283: { AR5K_INI_FLAG_BOTH, 0x12b8, 0x00000000 }, \
284: { AR5K_INI_FLAG_BOTH, 0x12f8, 0x00000000 }, \
285: { AR5K_INI_FLAG_BOTH, 0x1338, 0x00000000 }, \
286: { AR5K_INI_FLAG_BOTH, 0x1378, 0x00000000 }, \
287: { AR5K_INI_FLAG_BOTH, 0x13b8, 0x00000000 }, \
288: { AR5K_INI_FLAG_BOTH, 0x13f8, 0x00000000 }, \
289: { AR5K_INI_FLAG_BOTH, 0x1438, 0x00000000 }, \
290: { AR5K_INI_FLAG_BOTH, 0x1478, 0x00000000 }, \
291: { AR5K_INI_FLAG_BOTH, 0x14b8, 0x00000000 }, \
292: { AR5K_INI_FLAG_BOTH, 0x14f8, 0x00000000 }, \
293: { AR5K_INI_FLAG_BOTH, 0x1538, 0x00000000 }, \
294: { AR5K_INI_FLAG_BOTH, 0x1578, 0x00000000 }, \
295: { AR5K_INI_FLAG_BOTH, 0x15b8, 0x00000000 }, \
296: { AR5K_INI_FLAG_BOTH, 0x15f8, 0x00000000 }, \
297: { AR5K_INI_FLAG_BOTH, 0x1638, 0x00000000 }, \
298: { AR5K_INI_FLAG_BOTH, 0x1678, 0x00000000 }, \
299: { AR5K_INI_FLAG_BOTH, 0x16b8, 0x00000000 }, \
300: { AR5K_INI_FLAG_BOTH, 0x16f8, 0x00000000 }, \
301: { AR5K_INI_FLAG_BOTH, 0x1738, 0x00000000 }, \
302: { AR5K_INI_FLAG_BOTH, 0x1778, 0x00000000 }, \
303: { AR5K_INI_FLAG_BOTH, 0x17b8, 0x00000000 }, \
304: { AR5K_INI_FLAG_BOTH, 0x17f8, 0x00000000 }, \
305: { AR5K_INI_FLAG_BOTH, 0x103c, 0x00000000 }, \
306: { AR5K_INI_FLAG_BOTH, 0x107c, 0x00000000 }, \
307: { AR5K_INI_FLAG_BOTH, 0x10bc, 0x00000000 }, \
308: { AR5K_INI_FLAG_BOTH, 0x10fc, 0x00000000 }, \
309: { AR5K_INI_FLAG_BOTH, 0x113c, 0x00000000 }, \
310: { AR5K_INI_FLAG_BOTH, 0x117c, 0x00000000 }, \
311: { AR5K_INI_FLAG_BOTH, 0x11bc, 0x00000000 }, \
312: { AR5K_INI_FLAG_BOTH, 0x11fc, 0x00000000 }, \
313: { AR5K_INI_FLAG_BOTH, 0x123c, 0x00000000 }, \
314: { AR5K_INI_FLAG_BOTH, 0x127c, 0x00000000 }, \
315: { AR5K_INI_FLAG_BOTH, 0x12bc, 0x00000000 }, \
316: { AR5K_INI_FLAG_BOTH, 0x12fc, 0x00000000 }, \
317: { AR5K_INI_FLAG_BOTH, 0x133c, 0x00000000 }, \
318: { AR5K_INI_FLAG_BOTH, 0x137c, 0x00000000 }, \
319: { AR5K_INI_FLAG_BOTH, 0x13bc, 0x00000000 }, \
320: { AR5K_INI_FLAG_BOTH, 0x13fc, 0x00000000 }, \
321: { AR5K_INI_FLAG_BOTH, 0x143c, 0x00000000 }, \
322: { AR5K_INI_FLAG_BOTH, 0x147c, 0x00000000 }, \
323: { AR5K_INI_FLAG_BOTH, 0x8004, 0x00000000 }, \
324: { AR5K_INI_FLAG_BOTH, 0x8008, 0x00000000 }, \
325: { AR5K_INI_FLAG_BOTH, 0x800c, 0x00000000 }, \
326: { AR5K_INI_FLAG_BOTH, 0x8018, 0x00000000 }, \
327: { AR5K_INI_FLAG_BOTH, 0x8020, 0x00000000 }, \
328: { AR5K_INI_FLAG_BOTH, 0x8024, 0x00000000 }, \
329: { AR5K_INI_FLAG_BOTH, 0x8028, 0x00000030 }, \
330: { AR5K_INI_FLAG_BOTH, 0x802c, 0x0007ffff }, \
331: { AR5K_INI_FLAG_BOTH, 0x8030, 0x01ffffff }, \
332: { AR5K_INI_FLAG_BOTH, 0x8034, 0x00000031 }, \
333: { AR5K_INI_FLAG_BOTH, 0x8038, 0x00000000 }, \
334: { AR5K_INI_FLAG_BOTH, 0x803c, 0x00000000 }, \
335: { AR5K_INI_FLAG_BOTH, 0x8048, 0x00000000 }, \
336: { AR5K_INI_FLAG_BOTH, 0x8054, 0x00000000 }, \
337: { AR5K_INI_FLAG_BOTH, 0x8058, 0x00000000 }, \
338: { AR5K_INI_FLAG_BOTH, 0x805c, 0xffffc7ff }, \
339: { AR5K_INI_FLAG_BOTH, 0x8080, 0x00000000 }, \
340: { AR5K_INI_FLAG_BOTH, 0x8084, 0x00000000 }, \
341: { AR5K_INI_FLAG_BOTH, 0x8088, 0x00000000 }, \
342: { AR5K_INI_FLAG_BOTH, 0x808c, 0x00000000 }, \
343: { AR5K_INI_FLAG_BOTH, 0x8090, 0x00000000 }, \
344: { AR5K_INI_FLAG_BOTH, 0x8094, 0x00000000 }, \
345: { AR5K_INI_FLAG_BOTH, 0x8098, 0x00000000 }, \
346: { AR5K_INI_FLAG_BOTH, 0x80c0, 0x2a82301a }, \
347: { AR5K_INI_FLAG_BOTH, 0x80c4, 0x05dc01e0 }, \
348: { AR5K_INI_FLAG_BOTH, 0x80c8, 0x1f402710 }, \
349: { AR5K_INI_FLAG_BOTH, 0x80cc, 0x01f40000 }, \
350: { AR5K_INI_FLAG_BOTH, 0x80d0, 0x00001e1c }, \
351: { AR5K_INI_FLAG_BOTH, 0x80d4, 0x0002aaaa }, \
352: { AR5K_INI_FLAG_BOTH, 0x80d8, 0x02005555 }, \
353: { AR5K_INI_FLAG_BOTH, 0x80dc, 0x00000000 }, \
354: { AR5K_INI_FLAG_BOTH, 0x80e0, 0xffffffff }, \
355: { AR5K_INI_FLAG_BOTH, 0x80e4, 0x0000ffff }, \
356: { AR5K_INI_FLAG_BOTH, 0x80e8, 0x00000000 }, \
357: { AR5K_INI_FLAG_BOTH, 0x80ec, 0x00000000 }, \
358: { AR5K_INI_FLAG_BOTH, 0x80f0, 0x00000000 }, \
359: { AR5K_INI_FLAG_BOTH, 0x80f4, 0x00000000 }, \
360: { AR5K_INI_FLAG_BOTH, 0x80f8, 0x00000000 }, \
361: { AR5K_INI_FLAG_BOTH, 0x80fc, 0x00000088 }, \
362: { AR5K_INI_FLAG_BOTH, 0x8700, 0x00000000 }, \
363: { AR5K_INI_FLAG_BOTH, 0x8704, 0x0000008c }, \
364: { AR5K_INI_FLAG_BOTH, 0x8708, 0x000000e4 }, \
365: { AR5K_INI_FLAG_BOTH, 0x870c, 0x000002d5 }, \
366: { AR5K_INI_FLAG_BOTH, 0x8710, 0x00000000 }, \
367: { AR5K_INI_FLAG_BOTH, 0x8714, 0x00000000 }, \
368: { AR5K_INI_FLAG_BOTH, 0x8718, 0x000000a0 }, \
369: { AR5K_INI_FLAG_BOTH, 0x871c, 0x000001c9 }, \
370: { AR5K_INI_FLAG_BOTH, 0x8720, 0x0000002c }, \
371: { AR5K_INI_FLAG_BOTH, 0x8724, 0x0000002c }, \
372: { AR5K_INI_FLAG_BOTH, 0x8728, 0x00000030 }, \
373: { AR5K_INI_FLAG_BOTH, 0x872c, 0x0000003c }, \
374: { AR5K_INI_FLAG_BOTH, 0x8730, 0x0000002c }, \
375: { AR5K_INI_FLAG_BOTH, 0x8734, 0x0000002c }, \
376: { AR5K_INI_FLAG_BOTH, 0x8738, 0x00000030 }, \
377: { AR5K_INI_FLAG_BOTH, 0x873c, 0x0000003c }, \
378: { AR5K_INI_FLAG_BOTH, 0x8740, 0x00000000 }, \
379: { AR5K_INI_FLAG_BOTH, 0x8744, 0x00000000 }, \
380: { AR5K_INI_FLAG_BOTH, 0x8748, 0x00000000 }, \
381: { AR5K_INI_FLAG_BOTH, 0x874c, 0x00000000 }, \
382: { AR5K_INI_FLAG_BOTH, 0x8750, 0x00000000 }, \
383: { AR5K_INI_FLAG_BOTH, 0x8754, 0x00000000 }, \
384: { AR5K_INI_FLAG_BOTH, 0x8758, 0x00000000 }, \
385: { AR5K_INI_FLAG_BOTH, 0x875c, 0x00000000 }, \
386: { AR5K_INI_FLAG_BOTH, 0x8760, 0x000000d5 }, \
387: { AR5K_INI_FLAG_BOTH, 0x8764, 0x000000df }, \
388: { AR5K_INI_FLAG_BOTH, 0x8768, 0x00000102 }, \
389: { AR5K_INI_FLAG_BOTH, 0x876c, 0x0000013a }, \
390: { AR5K_INI_FLAG_BOTH, 0x8770, 0x00000075 }, \
391: { AR5K_INI_FLAG_BOTH, 0x8774, 0x0000007f }, \
392: { AR5K_INI_FLAG_BOTH, 0x8778, 0x000000a2 }, \
393: { AR5K_INI_FLAG_BOTH, 0x877c, 0x00000000 }, \
394: { AR5K_INI_FLAG_BOTH, 0x8100, 0x00010002 }, \
395: { AR5K_INI_FLAG_BOTH, 0x8104, 0x00000001 }, \
396: { AR5K_INI_FLAG_BOTH, 0x8108, 0x000000c0 }, \
397: { AR5K_INI_FLAG_BOTH, 0x810c, 0x00000000 }, \
398: { AR5K_INI_FLAG_BOTH, 0x8110, 0x00000168 }, \
399: { AR5K_INI_FLAG_BOTH, 0x8114, 0x00000000 }, \
400: { AR5K_INI_FLAG_BOTH, 0x87c0, 0x03020100 }, \
401: { AR5K_INI_FLAG_BOTH, 0x87c4, 0x07060504 }, \
402: { AR5K_INI_FLAG_BOTH, 0x87c8, 0x0b0a0908 }, \
403: { AR5K_INI_FLAG_BOTH, 0x87cc, 0x0f0e0d0c }, \
404: { AR5K_INI_FLAG_BOTH, 0x87d0, 0x13121110 }, \
405: { AR5K_INI_FLAG_BOTH, 0x87d4, 0x17161514 }, \
406: { AR5K_INI_FLAG_BOTH, 0x87d8, 0x1b1a1918 }, \
407: { AR5K_INI_FLAG_BOTH, 0x87dc, 0x1f1e1d1c }, \
408: { AR5K_INI_FLAG_BOTH, 0x87e0, 0x03020100 }, \
409: { AR5K_INI_FLAG_BOTH, 0x87e4, 0x07060504 }, \
410: { AR5K_INI_FLAG_BOTH, 0x87e8, 0x0b0a0908 }, \
411: { AR5K_INI_FLAG_BOTH, 0x87ec, 0x0f0e0d0c }, \
412: { AR5K_INI_FLAG_BOTH, 0x87f0, 0x13121110 }, \
413: { AR5K_INI_FLAG_BOTH, 0x87f4, 0x17161514 }, \
414: { AR5K_INI_FLAG_BOTH, 0x87f8, 0x1b1a1918 }, \
415: { AR5K_INI_FLAG_BOTH, 0x87fc, 0x1f1e1d1c }, \
416: /* PHY registers */ \
417: { AR5K_INI_FLAG_BOTH, 0x9808, 0x00000000 }, \
418: { AR5K_INI_FLAG_BOTH, 0x980c, 0xad848e19 }, \
419: { AR5K_INI_FLAG_BOTH, 0x9810, 0x7d28e000 }, \
420: { AR5K_INI_FLAG_BOTH, 0x9814, 0x9c0a9f6b }, \
421: { AR5K_INI_FLAG_BOTH, 0x981c, 0x00000000 }, \
422: { AR5K_INI_FLAG_BOTH, 0x982c, 0x00022ffe }, \
423: { AR5K_INI_FLAG_BOTH, 0x983c, 0x00020100 }, \
424: { AR5K_INI_FLAG_BOTH, 0x9840, 0x206a017a }, \
425: { AR5K_INI_FLAG_BOTH, 0x984c, 0x1284613c }, \
426: { AR5K_INI_FLAG_BOTH, 0x9854, 0x00000859 }, \
427: { AR5K_INI_FLAG_BOTH, 0x9900, 0x00000000 }, \
428: { AR5K_INI_FLAG_BOTH, 0x9904, 0x00000000 }, \
429: { AR5K_INI_FLAG_BOTH, 0x9908, 0x00000000 }, \
430: { AR5K_INI_FLAG_BOTH, 0x990c, 0x00800000 }, \
431: { AR5K_INI_FLAG_BOTH, 0x9910, 0x00000001 }, \
432: { AR5K_INI_FLAG_BOTH, 0x991c, 0x0000092a }, \
433: { AR5K_INI_FLAG_BOTH, 0x9920, 0x05100000 }, \
434: { AR5K_INI_FLAG_BOTH, 0x9928, 0x00000001 }, \
435: { AR5K_INI_FLAG_BOTH, 0x992c, 0x00000004 }, \
436: { AR5K_INI_FLAG_BOTH, 0x9934, 0x1e1f2022 }, \
437: { AR5K_INI_FLAG_BOTH, 0x9938, 0x0a0b0c0d }, \
438: { AR5K_INI_FLAG_BOTH, 0x993c, 0x0000003f }, \
439: { AR5K_INI_FLAG_BOTH, 0x9940, 0x00000004 }, \
440: { AR5K_INI_FLAG_BOTH, 0x9948, 0x9280b212 }, \
441: { AR5K_INI_FLAG_BOTH, 0x9954, 0x5d50e188 }, \
442: { AR5K_INI_FLAG_BOTH, 0x9958, 0x000000ff }, \
443: { AR5K_INI_FLAG_BOTH, 0x995c, 0x004b6a8e }, \
444: { AR5K_INI_FLAG_BOTH, 0x9968, 0x000003ce }, \
445: { AR5K_INI_FLAG_BOTH, 0x9970, 0x192fb515 }, \
446: { AR5K_INI_FLAG_BOTH, 0x9974, 0x00000000 }, \
447: { AR5K_INI_FLAG_BOTH, 0x9978, 0x00000001 }, \
448: { AR5K_INI_FLAG_BOTH, 0x997c, 0x00000000 }, \
449: { AR5K_INI_FLAG_BOTH, 0xa184, 0x10ff10ff }, \
450: { AR5K_INI_FLAG_BOTH, 0xa188, 0x10ff10ff }, \
451: { AR5K_INI_FLAG_BOTH, 0xa18c, 0x10ff10ff }, \
452: { AR5K_INI_FLAG_BOTH, 0xa190, 0x10ff10ff }, \
453: { AR5K_INI_FLAG_BOTH, 0xa194, 0x10ff10ff }, \
454: { AR5K_INI_FLAG_BOTH, 0xa198, 0x10ff10ff }, \
455: { AR5K_INI_FLAG_BOTH, 0xa19c, 0x10ff10ff }, \
456: { AR5K_INI_FLAG_BOTH, 0xa1a0, 0x10ff10ff }, \
457: { AR5K_INI_FLAG_BOTH, 0xa1a4, 0x10ff10ff }, \
458: { AR5K_INI_FLAG_BOTH, 0xa1a8, 0x10ff10ff }, \
459: { AR5K_INI_FLAG_BOTH, 0xa1ac, 0x10ff10ff }, \
460: { AR5K_INI_FLAG_BOTH, 0xa1b0, 0x10ff10ff }, \
461: { AR5K_INI_FLAG_BOTH, 0xa1b4, 0x10ff10ff }, \
462: { AR5K_INI_FLAG_BOTH, 0xa1b8, 0x10ff10ff }, \
463: { AR5K_INI_FLAG_BOTH, 0xa1bc, 0x10ff10ff }, \
464: { AR5K_INI_FLAG_BOTH, 0xa1c0, 0x10ff10ff }, \
465: { AR5K_INI_FLAG_BOTH, 0xa1c4, 0x10ff10ff }, \
466: { AR5K_INI_FLAG_BOTH, 0xa1c8, 0x10ff10ff }, \
467: { AR5K_INI_FLAG_BOTH, 0xa1cc, 0x10ff10ff }, \
468: { AR5K_INI_FLAG_BOTH, 0xa1d0, 0x10ff10ff }, \
469: { AR5K_INI_FLAG_BOTH, 0xa1d4, 0x10ff10ff }, \
470: { AR5K_INI_FLAG_BOTH, 0xa1d8, 0x10ff10ff }, \
471: { AR5K_INI_FLAG_BOTH, 0xa1dc, 0x10ff10ff }, \
472: { AR5K_INI_FLAG_BOTH, 0xa1e0, 0x10ff10ff }, \
473: { AR5K_INI_FLAG_BOTH, 0xa1e4, 0x10ff10ff }, \
474: { AR5K_INI_FLAG_BOTH, 0xa1e8, 0x10ff10ff }, \
475: { AR5K_INI_FLAG_BOTH, 0xa1ec, 0x10ff10ff }, \
476: { AR5K_INI_FLAG_BOTH, 0xa1f0, 0x10ff10ff }, \
477: { AR5K_INI_FLAG_BOTH, 0xa1f4, 0x10ff10ff }, \
478: { AR5K_INI_FLAG_BOTH, 0xa1f8, 0x10ff10ff }, \
479: { AR5K_INI_FLAG_BOTH, 0xa1fc, 0x10ff10ff }, \
480: { AR5K_INI_FLAG_BOTH, 0xa210, 0x0080a333 }, \
481: { AR5K_INI_FLAG_BOTH, 0xa214, 0x00206c10 }, \
482: { AR5K_INI_FLAG_BOTH, 0xa218, 0x009c4060 }, \
483: { AR5K_INI_FLAG_BOTH, 0xa21c, 0x1483800a }, \
484: { AR5K_INI_FLAG_BOTH, 0xa220, 0x01831061 }, \
485: { AR5K_INI_FLAG_BOTH, 0xa224, 0x00000400 }, \
486: { AR5K_INI_FLAG_BOTH, 0xa228, 0x000001b5 }, \
487: { AR5K_INI_FLAG_BOTH, 0xa22c, 0x00000000 }, \
488: { AR5K_INI_FLAG_BOTH, 0xa234, 0x20202020 }, \
489: { AR5K_INI_FLAG_BOTH, 0xa238, 0x20202020 }, \
490: { AR5K_INI_FLAG_BOTH, 0xa23c, 0x13c889af }, \
491: { AR5K_INI_FLAG_BOTH, 0xa240, 0x38490a20 }, \
492: { AR5K_INI_FLAG_BOTH, 0xa244, 0x00007bb6 }, \
493: { AR5K_INI_FLAG_BOTH, 0xa248, 0x0fff3ffc }, \
494: { AR5K_INI_FLAG_BOTH, 0x9b00, 0x00000000 }, \
495: { AR5K_INI_FLAG_BOTH, 0x9b28, 0x0000000c }, \
496: { AR5K_INI_FLAG_BOTH, 0x9b38, 0x00000012 }, \
497: { AR5K_INI_FLAG_BOTH, 0x9b64, 0x00000021 }, \
498: { AR5K_INI_FLAG_BOTH, 0x9b8c, 0x0000002d }, \
499: { AR5K_INI_FLAG_BOTH, 0x9b9c, 0x00000033 }, \
500: /* AR5111 specific */ \
501: { AR5K_INI_FLAG_5111, 0x9930, 0x00004883 }, \
502: { AR5K_INI_FLAG_5111, 0xa204, 0x00000000 }, \
503: { AR5K_INI_FLAG_5111, 0xa208, 0xd03e6788 }, \
504: { AR5K_INI_FLAG_5111, 0xa20c, 0x6448416a }, \
505: { AR5K_INI_FLAG_5111, 0x9b04, 0x00000020 }, \
506: { AR5K_INI_FLAG_5111, 0x9b08, 0x00000010 }, \
507: { AR5K_INI_FLAG_5111, 0x9b0c, 0x00000030 }, \
508: { AR5K_INI_FLAG_5111, 0x9b10, 0x00000008 }, \
509: { AR5K_INI_FLAG_5111, 0x9b14, 0x00000028 }, \
510: { AR5K_INI_FLAG_5111, 0x9b18, 0x00000004 }, \
511: { AR5K_INI_FLAG_5111, 0x9b1c, 0x00000024 }, \
512: { AR5K_INI_FLAG_5111, 0x9b20, 0x00000014 }, \
513: { AR5K_INI_FLAG_5111, 0x9b24, 0x00000034 }, \
514: { AR5K_INI_FLAG_5111, 0x9b2c, 0x0000002c }, \
515: { AR5K_INI_FLAG_5111, 0x9b30, 0x00000002 }, \
516: { AR5K_INI_FLAG_5111, 0x9b34, 0x00000022 }, \
517: { AR5K_INI_FLAG_5111, 0x9b3c, 0x00000032 }, \
518: { AR5K_INI_FLAG_5111, 0x9b40, 0x0000000a }, \
519: { AR5K_INI_FLAG_5111, 0x9b44, 0x0000002a }, \
520: { AR5K_INI_FLAG_5111, 0x9b48, 0x00000006 }, \
521: { AR5K_INI_FLAG_5111, 0x9b4c, 0x00000026 }, \
522: { AR5K_INI_FLAG_5111, 0x9b50, 0x00000016 }, \
523: { AR5K_INI_FLAG_5111, 0x9b54, 0x00000036 }, \
524: { AR5K_INI_FLAG_5111, 0x9b58, 0x0000000e }, \
525: { AR5K_INI_FLAG_5111, 0x9b5c, 0x0000002e }, \
526: { AR5K_INI_FLAG_5111, 0x9b60, 0x00000001 }, \
527: { AR5K_INI_FLAG_5111, 0x9b68, 0x00000011 }, \
528: { AR5K_INI_FLAG_5111, 0x9b6c, 0x00000031 }, \
529: { AR5K_INI_FLAG_5111, 0x9b70, 0x00000009 }, \
530: { AR5K_INI_FLAG_5111, 0x9b74, 0x00000029 }, \
531: { AR5K_INI_FLAG_5111, 0x9b78, 0x00000005 }, \
532: { AR5K_INI_FLAG_5111, 0x9b7c, 0x00000025 }, \
533: { AR5K_INI_FLAG_5111, 0x9b80, 0x00000015 }, \
534: { AR5K_INI_FLAG_5111, 0x9b84, 0x00000035 }, \
535: { AR5K_INI_FLAG_5111, 0x9b88, 0x0000000d }, \
536: { AR5K_INI_FLAG_5111, 0x9b90, 0x00000003 }, \
537: { AR5K_INI_FLAG_5111, 0x9b94, 0x00000023 }, \
538: { AR5K_INI_FLAG_5111, 0x9b98, 0x00000013 }, \
539: { AR5K_INI_FLAG_5111, 0x9ba0, 0x0000000b }, \
540: { AR5K_INI_FLAG_5111, 0x9ba4, 0x0000002b }, \
541: { AR5K_INI_FLAG_5111, 0x9ba8, 0x0000002b }, \
542: { AR5K_INI_FLAG_5111, 0x9bac, 0x0000002b }, \
543: { AR5K_INI_FLAG_5111, 0x9bb0, 0x0000002b }, \
544: { AR5K_INI_FLAG_5111, 0x9bb4, 0x0000002b }, \
545: { AR5K_INI_FLAG_5111, 0x9bb8, 0x0000002b }, \
546: { AR5K_INI_FLAG_5111, 0x9bbc, 0x0000002b }, \
547: { AR5K_INI_FLAG_5111, 0x9bc0, 0x0000002b }, \
548: { AR5K_INI_FLAG_5111, 0x9bc4, 0x0000002b }, \
549: { AR5K_INI_FLAG_5111, 0x9bc8, 0x0000002b }, \
550: { AR5K_INI_FLAG_5111, 0x9bcc, 0x0000002b }, \
551: { AR5K_INI_FLAG_5111, 0x9bd0, 0x0000002b }, \
552: { AR5K_INI_FLAG_5111, 0x9bd4, 0x0000002b }, \
553: { AR5K_INI_FLAG_5111, 0x9bd8, 0x0000002b }, \
554: { AR5K_INI_FLAG_5111, 0x9bdc, 0x0000002b }, \
555: { AR5K_INI_FLAG_5111, 0x9be0, 0x0000002b }, \
556: { AR5K_INI_FLAG_5111, 0x9be4, 0x0000002b }, \
557: { AR5K_INI_FLAG_5111, 0x9be8, 0x0000002b }, \
558: { AR5K_INI_FLAG_5111, 0x9bec, 0x0000002b }, \
559: { AR5K_INI_FLAG_5111, 0x9bf0, 0x0000002b }, \
560: { AR5K_INI_FLAG_5111, 0x9bf4, 0x0000002b }, \
561: { AR5K_INI_FLAG_5111, 0x9bf8, 0x00000002 }, \
562: { AR5K_INI_FLAG_5111, 0x9bfc, 0x00000016 }, \
563: /* AR5112 specific */ \
564: { AR5K_INI_FLAG_5112, 0x9930, 0x00004882 }, \
565: { AR5K_INI_FLAG_5112, 0x9b04, 0x00000001 }, \
566: { AR5K_INI_FLAG_5112, 0x9b08, 0x00000002 }, \
567: { AR5K_INI_FLAG_5112, 0x9b0c, 0x00000003 }, \
568: { AR5K_INI_FLAG_5112, 0x9b10, 0x00000004 }, \
569: { AR5K_INI_FLAG_5112, 0x9b14, 0x00000005 }, \
570: { AR5K_INI_FLAG_5112, 0x9b18, 0x00000008 }, \
571: { AR5K_INI_FLAG_5112, 0x9b1c, 0x00000009 }, \
572: { AR5K_INI_FLAG_5112, 0x9b20, 0x0000000a }, \
573: { AR5K_INI_FLAG_5112, 0x9b24, 0x0000000b }, \
574: { AR5K_INI_FLAG_5112, 0x9b2c, 0x0000000d }, \
575: { AR5K_INI_FLAG_5112, 0x9b30, 0x00000010 }, \
576: { AR5K_INI_FLAG_5112, 0x9b34, 0x00000011 }, \
577: { AR5K_INI_FLAG_5112, 0x9b3c, 0x00000013 }, \
578: { AR5K_INI_FLAG_5112, 0x9b40, 0x00000014 }, \
579: { AR5K_INI_FLAG_5112, 0x9b44, 0x00000015 }, \
580: { AR5K_INI_FLAG_5112, 0x9b48, 0x00000018 }, \
581: { AR5K_INI_FLAG_5112, 0x9b4c, 0x00000019 }, \
582: { AR5K_INI_FLAG_5112, 0x9b50, 0x0000001a }, \
583: { AR5K_INI_FLAG_5112, 0x9b54, 0x0000001b }, \
584: { AR5K_INI_FLAG_5112, 0x9b58, 0x0000001c }, \
585: { AR5K_INI_FLAG_5112, 0x9b5c, 0x0000001d }, \
586: { AR5K_INI_FLAG_5112, 0x9b60, 0x00000020 }, \
587: { AR5K_INI_FLAG_5112, 0x9b68, 0x00000022 }, \
588: { AR5K_INI_FLAG_5112, 0x9b6c, 0x00000023 }, \
589: { AR5K_INI_FLAG_5112, 0x9b70, 0x00000024 }, \
590: { AR5K_INI_FLAG_5112, 0x9b74, 0x00000025 }, \
591: { AR5K_INI_FLAG_5112, 0x9b78, 0x00000028 }, \
592: { AR5K_INI_FLAG_5112, 0x9b7c, 0x00000029 }, \
593: { AR5K_INI_FLAG_5112, 0x9b80, 0x0000002a }, \
594: { AR5K_INI_FLAG_5112, 0x9b84, 0x0000002b }, \
595: { AR5K_INI_FLAG_5112, 0x9b88, 0x0000002c }, \
596: { AR5K_INI_FLAG_5112, 0x9b90, 0x00000030 }, \
597: { AR5K_INI_FLAG_5112, 0x9b94, 0x00000031 }, \
598: { AR5K_INI_FLAG_5112, 0x9b98, 0x00000032 }, \
599: { AR5K_INI_FLAG_5112, 0x9ba0, 0x00000034 }, \
600: { AR5K_INI_FLAG_5112, 0x9ba4, 0x00000035 }, \
601: { AR5K_INI_FLAG_5112, 0x9ba8, 0x00000035 }, \
602: { AR5K_INI_FLAG_5112, 0x9bac, 0x00000035 }, \
603: { AR5K_INI_FLAG_5112, 0x9bb0, 0x00000035 }, \
604: { AR5K_INI_FLAG_5112, 0x9bb4, 0x00000035 }, \
605: { AR5K_INI_FLAG_5112, 0x9bb8, 0x00000035 }, \
606: { AR5K_INI_FLAG_5112, 0x9bbc, 0x00000035 }, \
607: { AR5K_INI_FLAG_5112, 0x9bc0, 0x00000035 }, \
608: { AR5K_INI_FLAG_5112, 0x9bc4, 0x00000035 }, \
609: { AR5K_INI_FLAG_5112, 0x9bc8, 0x00000035 }, \
610: { AR5K_INI_FLAG_5112, 0x9bcc, 0x00000035 }, \
611: { AR5K_INI_FLAG_5112, 0x9bd0, 0x00000035 }, \
612: { AR5K_INI_FLAG_5112, 0x9bd4, 0x00000035 }, \
613: { AR5K_INI_FLAG_5112, 0x9bd8, 0x00000035 }, \
614: { AR5K_INI_FLAG_5112, 0x9bdc, 0x00000035 }, \
615: { AR5K_INI_FLAG_5112, 0x9be0, 0x00000035 }, \
616: { AR5K_INI_FLAG_5112, 0x9be4, 0x00000035 }, \
617: { AR5K_INI_FLAG_5112, 0x9be8, 0x00000035 }, \
618: { AR5K_INI_FLAG_5112, 0x9bec, 0x00000035 }, \
619: { AR5K_INI_FLAG_5112, 0x9bf0, 0x00000035 }, \
620: { AR5K_INI_FLAG_5112, 0x9bf4, 0x00000035 }, \
621: { AR5K_INI_FLAG_5112, 0x9bf8, 0x00000010 }, \
622: { AR5K_INI_FLAG_5112, 0x9bfc, 0x0000001a }, \
623: }
624:
625: struct ar5k_ar5212_ini_mode {
626: u_int16_t mode_register;
627: u_int8_t mode_flags;
628: u_int32_t mode_value[2][5];
629: };
630:
631: #define AR5K_AR5212_INI_MODE { \
632: { 0x0030, AR5K_INI_FLAG_511X, { \
633: { 0, }, \
634: { 0x00008107, 0x00008107, 0x00008107, 0x00008107, 0x00008107 } \
635: } }, \
636: { 0x1040, AR5K_INI_FLAG_511X, { \
637: { 0, }, \
638: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
639: } }, \
640: { 0x1044, AR5K_INI_FLAG_511X, { \
641: { 0, }, \
642: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
643: } }, \
644: { 0x1048, AR5K_INI_FLAG_511X, { \
645: { 0, }, \
646: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
647: } }, \
648: { 0x104c, AR5K_INI_FLAG_511X, { \
649: { 0, }, \
650: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
651: } }, \
652: { 0x1050, AR5K_INI_FLAG_511X, { \
653: { 0, }, \
654: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
655: } }, \
656: { 0x1054, AR5K_INI_FLAG_511X, { \
657: { 0, }, \
658: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
659: } }, \
660: { 0x1058, AR5K_INI_FLAG_511X, { \
661: { 0, }, \
662: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
663: } }, \
664: { 0x105c, AR5K_INI_FLAG_511X, { \
665: { 0, }, \
666: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
667: } }, \
668: { 0x1060, AR5K_INI_FLAG_511X, { \
669: { 0, }, \
670: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
671: } }, \
672: { 0x1064, AR5K_INI_FLAG_511X, { \
673: { 0, }, \
674: { 0x002ffc0f, 0x002ffc0f, 0x002ffc1f, 0x002ffc0f, 0x002ffc0f } \
675: } }, \
676: { 0x1030, AR5K_INI_FLAG_511X, { \
677: { 0, }, \
678: { 0x00000230, 0x000001e0, 0x000000b0, 0x00000160, 0x000001e0 } \
679: } }, \
680: { 0x1070, AR5K_INI_FLAG_511X, { \
681: { 0, }, \
682: { 0x00000168, 0x000001e0, 0x000001b8, 0x0000018c, 0x000001e0 } \
683: } }, \
684: { 0x10b0, AR5K_INI_FLAG_511X, { \
685: { 0, }, \
686: { 0x00000e60, 0x00001180, 0x00001f1c, 0x00003e38, 0x00001180 } \
687: } }, \
688: { 0x10f0, AR5K_INI_FLAG_511X, { \
689: { 0, }, \
690: { 0x0000a0e0, 0x00014068, 0x00005880, 0x0000b0e0, 0x00014068 } \
691: } }, \
692: { 0x8014, AR5K_INI_FLAG_511X, { \
693: { 0, }, \
694: { 0x03e803e8, 0x06e006e0, 0x04200420, 0x08400840, 0x06e006e0 } \
695: } }, \
696: { 0x9804, AR5K_INI_FLAG_511X, { \
697: { 0, }, \
698: { 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000003 } \
699: } }, \
700: { 0x9820, AR5K_INI_FLAG_511X, { \
701: { 0, }, \
702: { 0x02020200, 0x02020200, 0x02010200, 0x02020200, 0x02020200 } \
703: } }, \
704: { 0x9834, AR5K_INI_FLAG_511X, { \
705: { 0, }, \
706: { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } \
707: } }, \
708: { 0x9838, AR5K_INI_FLAG_511X, { \
709: { 0, }, \
710: { 0x00000007, 0x00000007, 0x0000000b, 0x0000000b, 0x0000000b } \
711: } }, \
712: { 0x9844, AR5K_INI_FLAG_511X, { \
713: { 0, }, \
714: { 0x1372161c, 0x13721c25, 0x13721728, 0x137216a2, 0x13721c25 } \
715: } }, \
716: { 0x9850, AR5K_INI_FLAG_511X, { \
717: { 0, }, \
718: { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } \
719: } }, \
720: { 0x9858, AR5K_INI_FLAG_511X, { \
721: { 0, }, \
722: { 0x7e800d2e, 0x7e800d2e, 0x7ee84d2e, 0x7ee84d2e, 0x7e800d2e } \
723: } }, \
724: { 0x9860, AR5K_INI_FLAG_511X, { \
725: { 0, }, \
726: { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d10, 0x00009d10 } \
727: } }, \
728: { 0x9864, AR5K_INI_FLAG_511X, { \
729: { 0, }, \
730: { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } \
731: } }, \
732: { 0x9868, AR5K_INI_FLAG_511X, { \
733: { 0, }, \
734: { 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 } \
735: } }, \
736: { 0x9918, AR5K_INI_FLAG_511X, { \
737: { 0, }, \
738: { 0x000001b8, 0x000001b8, 0x00000084, 0x00000108, 0x000001b8 } \
739: } }, \
740: { 0x9924, AR5K_INI_FLAG_511X, { \
741: { 0, }, \
742: { 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05, 0x10058a05 } \
743: } }, \
744: { 0xa180, AR5K_INI_FLAG_511X, { \
745: { 0, }, \
746: { 0x10ff14ff, 0x10ff14ff, 0x10ff10ff, 0x10ff19ff, 0x10ff19ff } \
747: } }, \
748: { 0xa230, AR5K_INI_FLAG_511X, { \
749: { 0, }, \
750: { 0x00000000, 0x00000000, 0x00000000, 0x00000108, 0x00000000 } \
751: } }, \
752: { 0x801c, AR5K_INI_FLAG_BOTH, { \
753: { 0x128d8fa7, 0x09880fcf, 0x04e00f95, 0x128d8fab, 0x09880fcf }, \
754: { 0x128d93a7, 0x098813cf, 0x04e01395, 0x128d93ab, 0x098813cf } \
755: } }, \
756: { 0x9824, AR5K_INI_FLAG_BOTH, { \
757: { 0x00000e0e, 0x00000e0e, 0x00000707, 0x00000e0e, 0x00000e0e }, \
758: { 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e } \
759: } }, \
760: { 0x9828, AR5K_INI_FLAG_BOTH, { \
761: { 0x0a020001, 0x0a020001, 0x05010100, 0x0a020001, 0x0a020001 }, \
762: { 0x0a020001, 0x0a020001, 0x05020100, 0x0a020001, 0x0a020001 } \
763: } }, \
764: { 0x9848, AR5K_INI_FLAG_BOTH, { \
765: { 0x0018da5a, 0x0018da5a, 0x0018ca69, 0x0018ca69, 0x0018ca69 }, \
766: { 0x0018da6d, 0x0018da6d, 0x0018ca75, 0x0018ca75, 0x0018ca75 } \
767: } }, \
768: { 0x985c, AR5K_INI_FLAG_BOTH, { \
769: { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137615e }, \
770: { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } \
771: } }, \
772: { 0x986c, AR5K_INI_FLAG_BOTH, { \
773: { 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb080, 0x050cb080 }, \
774: { 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 } \
775: } }, \
776: { 0x9914, AR5K_INI_FLAG_BOTH, { \
777: { 0x00002710, 0x00002710, 0x0000157c, 0x00002af8, 0x00002710 }, \
778: { 0x000007d0, 0x000007d0, 0x0000044c, 0x00000898, 0x000007d0 } \
779: } }, \
780: { 0x9944, AR5K_INI_FLAG_BOTH, { \
781: { 0xffb81020, 0xffb81020, 0xffb80d20, 0xffb81020, 0xffb81020 }, \
782: { 0xffb81020, 0xffb81020, 0xffb80d10, 0xffb81010, 0xffb81010 } \
783: } }, \
784: { 0xa204, AR5K_INI_FLAG_5112, { \
785: { 0, }, \
786: { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } \
787: } }, \
788: { 0xa208, AR5K_INI_FLAG_5112, { \
789: { 0, }, \
790: { 0xd6be6788, 0xd6be6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } \
791: } }, \
792: { 0xa20c, AR5K_INI_FLAG_5112, { \
793: { 0, }, \
794: { 0x642c0140, 0x642c0140, 0x6442c160, 0x6442c160, 0x6442c160 } \
795: } }, \
796: }
797:
798: #endif /* _AR5K_AR5212_VAR_H */
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