Annotation of sys/dev/ic/anreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: anreg.h,v 1.10 2006/01/09 21:19:47 jsg Exp $ */
2: /* $NetBSD: anreg.h,v 1.11 2005/01/15 11:01:46 dyoung Exp $ */
3: /*
4: * Copyright (c) 1997, 1998, 1999
5: * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: * 3. All advertising materials mentioning features or use of this software
16: * must display the following acknowledgement:
17: * This product includes software developed by Bill Paul.
18: * 4. Neither the name of the author nor the names of any co-contributors
19: * may be used to endorse or promote products derived from this software
20: * without specific prior written permission.
21: *
22: * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25: * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32: * THE POSSIBILITY OF SUCH DAMAGE.
33: *
34: * $FreeBSD: src/sys/dev/an/if_anreg.h,v 1.3 2000/11/13 23:04:12 wpaul Exp $
35: */
36:
37: #ifndef _DEV_IC_ANREG_H
38: #define _DEV_IC_ANREG_H
39:
40: /*
41: * Size of Aironet I/O space.
42: */
43: #define AN_IOSIZ 0x40
44:
45: /*
46: * Hermes register definitions and what little I know about them.
47: */
48:
49: /* Hermes command/status registers. */
50: #define AN_COMMAND 0x00
51: #define AN_PARAM0 0x02
52: #define AN_PARAM1 0x04
53: #define AN_PARAM2 0x06
54: #define AN_STATUS 0x08
55: #define AN_RESP0 0x0A
56: #define AN_RESP1 0x0C
57: #define AN_RESP2 0x0E
58: #define AN_LINKSTAT 0x10
59:
60: /* Command register */
61: #define AN_CMD_BUSY 0x8000 /* busy bit */
62: #define AN_CMD_NO_ACK 0x0080 /* don't acknowledge command */
63: #define AN_CMD_CODE_MASK 0x003F
64: #define AN_CMD_QUAL_MASK 0x7F00
65:
66: /* Command codes */
67: #define AN_CMD_NOOP 0x0000 /* no-op */
68: #define AN_CMD_ENABLE 0x0001 /* enable */
69: #define AN_CMD_DISABLE 0x0002 /* disable */
70: #define AN_CMD_FORCE_SYNCLOSS 0x0003 /* force loss of sync */
71: #define AN_CMD_FW_RESTART 0x0004 /* firmware resrart */
72: #define AN_CMD_HOST_SLEEP 0x0005
73: #define AN_CMD_MAGIC_PKT 0x0006
74: #define AN_CMD_READCFG 0x0008
75: #define AN_CMD_SET_MODE 0x0009
76: #define AN_CMD_ALLOC_MEM 0x000A /* allocate NIC memory */
77: #define AN_CMD_TX 0x000B /* transmit */
78: #define AN_CMD_DEALLOC_MEM 0x000C
79: #define AN_CMD_NOOP2 0x0010
80: #define AN_CMD_ACCESS 0x0021
81: #define AN_CMD_ALLOC_BUF 0x0028
82: #define AN_CMD_PSP_NODES 0x0030
83: #define AN_CMD_SET_PHYREG 0x003E
84: #define AN_CMD_TX_TEST 0x003F
85: #define AN_CMD_SLEEP 0x0085
86: #define AN_CMD_SAVECFG 0x0108
87:
88: /*
89: * Reclaim qualifier bit, applicable to the
90: * TX command.
91: */
92: #define AN_RECLAIM 0x0100 /* reclaim NIC memory */
93:
94: /*
95: * ACCESS command qualifier bits.
96: */
97: #define AN_ACCESS_READ 0x0000
98: #define AN_ACCESS_WRITE 0x0100
99:
100: /*
101: * PROGRAM command qualifier bits.
102: */
103: #define AN_PROGRAM_DISABLE 0x0000
104: #define AN_PROGRAM_ENABLE_RAM 0x0100
105: #define AN_PROGRAM_ENABLE_NVRAM 0x0200
106: #define AN_PROGRAM_NVRAM 0x0300
107:
108: /* Status register values */
109: #define AN_STAT_CMD_CODE 0x003F
110: #define AN_STAT_CMD_RESULT 0x7F00
111:
112: /* Linkstat register */
113: #define AN_LINKSTAT_ASSOCIATED 0x0400
114: #define AN_LINKSTAT_AUTHFAIL 0x0300
115: #define AN_LINKSTAT_ASSOC_FAIL 0x8400
116: #define AN_LINKSTAT_DISASSOC 0x8200
117: #define AN_LINKSTAT_DEAUTH 0x8100
118: #define AN_LINKSTAT_SYNCLOST_TSF 0x8004
119: #define AN_LINKSTAT_SYNCLOST_HOSTREQ 0x8003
120: #define AN_LINKSTAT_SYNCLOST_AVGRETRY 0x8002
121: #define AN_LINKSTAT_SYNCLOST_MAXRETRY 0x8001
122: #define AN_LINKSTAT_SYNCLOST_MISSBEACON 0x8000
123:
124: /* memory handle management registers */
125: #define AN_RX_FID 0x20
126: #define AN_ALLOC_FID 0x22
127: #define AN_TX_CMP_FID 0x24
128:
129: /*
130: * Buffer Access Path (BAP) registers.
131: * These are I/O channels. I believe you can use each one for
132: * any desired purpose independently of the other. In general
133: * though, we use BAP1 for reading and writing LTV records and
134: * reading received data frames, and BAP0 for writing transmit
135: * frames. This is a convention though, not a rule.
136: */
137: #define AN_SEL0 0x18
138: #define AN_SEL1 0x1A
139: #define AN_OFF0 0x1C
140: #define AN_OFF1 0x1E
141: #define AN_DATA0 0x36
142: #define AN_DATA1 0x38
143: #define AN_BAP0 AN_DATA0
144: #define AN_BAP1 AN_DATA1
145:
146: #define AN_OFF_BUSY 0x8000
147: #define AN_OFF_ERR 0x4000
148: #define AN_OFF_DONE 0x2000
149: #define AN_OFF_DATAOFF 0x0FFF
150:
151: /* Event registers */
152: #define AN_EVENT_STAT 0x30 /* Event status */
153: #define AN_INT_EN 0x32 /* Interrupt enable/disable */
154: #define AN_EVENT_ACK 0x34 /* Ack event */
155:
156: /* Events */
157: #define AN_EV_CLR_STUCK_BUSY 0x4000 /* clear stuck busy bit */
158: #define AN_EV_WAKEREQUEST 0x2000 /* awaken from PSP mode */
159: #define AN_EV_MIC 0x1000 /* Message Integrity Check*/
160: #define AN_EV_TX_CPY 0x0400
161: #define AN_EV_AWAKE 0x0100 /* station woke up from PSP mode*/
162: #define AN_EV_LINKSTAT 0x0080 /* link status available */
163: #define AN_EV_CMD 0x0010 /* command completed */
164: #define AN_EV_ALLOC 0x0008 /* async alloc/reclaim completed */
165: #define AN_EV_TX_EXC 0x0004 /* async xmit completed with failure */
166: #define AN_EV_TX 0x0002 /* async xmit completed successfully */
167: #define AN_EV_RX 0x0001 /* async rx completed */
168:
169: /* Host software registers */
170: #define AN_SW0 0x28
171: #define AN_SW1 0x2A
172: #define AN_SW2 0x2C
173: #define AN_SW3 0x2E
174:
175: #define AN_CNTL 0x14
176:
177: #define AN_CNTL_AUX_ENA 0xC000
178: #define AN_CNTL_AUX_ENA_STAT 0xC000
179: #define AN_CNTL_AUX_DIS_STAT 0x0000
180: #define AN_CNTL_AUX_ENA_CNTL 0x8000
181: #define AN_CNTL_AUX_DIS_CNTL 0x4000
182:
183: #define AN_AUX_PAGE 0x3A
184: #define AN_AUX_OFFSET 0x3C
185: #define AN_AUX_DATA 0x3E
186:
187: /*
188: * General configuration information.
189: */
190: #define AN_RID_GENCONFIG 0xFF10
191: struct an_rid_genconfig {
192: /* General configuration. */
193: u_int16_t an_opmode; /* 0x02 */
194: u_int16_t an_rxmode; /* 0x04 */
195: u_int16_t an_fragthresh; /* 0x06 */
196: u_int16_t an_rtsthresh; /* 0x08 */
197: u_int8_t an_macaddr[6]; /* 0x0A */
198: u_int8_t an_rates[8]; /* 0x10 */
199: u_int16_t an_shortretry_limit; /* 0x18 */
200: u_int16_t an_longretry_limit; /* 0x1A */
201: u_int16_t an_tx_msdu_lifetime; /* 0x1C */
202: u_int16_t an_rx_msdu_lifetime; /* 0x1E */
203: u_int16_t an_stationary; /* 0x20 */
204: u_int16_t an_ordering; /* 0x22 */
205: u_int16_t an_devtype; /* 0x24 */
206: u_int16_t an_rsvd0[5]; /* 0x26 */
207: /* Scanning associating. */
208: u_int16_t an_scanmode; /* 0x30 */
209: u_int16_t an_probedelay; /* 0x32 */
210: u_int16_t an_probe_energy_timeout;/* 0x34 */
211: u_int16_t an_probe_response_timeout;/*0x36 */
212: u_int16_t an_beacon_listen_timeout;/*0x38 */
213: u_int16_t an_ibss_join_net_timeout;/*0x3A */
214: u_int16_t an_auth_timeout; /* 0x3C */
215: u_int16_t an_authtype; /* 0x3E */
216: u_int16_t an_assoc_timeout; /* 0x40 */
217: u_int16_t an_specified_ap_timeout;/* 0x42 */
218: u_int16_t an_offline_scan_interval;/*0x44 */
219: u_int16_t an_offline_scan_duration;/*0x46 */
220: u_int16_t an_link_loss_delay; /* 0x48 */
221: u_int16_t an_max_beacon_lost_time;/* 0x4A */
222: u_int16_t an_refresh_interval; /* 0x4C */
223: u_int16_t an_rsvd1; /* 0x4E */
224: /* Power save operation */
225: u_int16_t an_psave_mode; /* 0x50 */
226: u_int16_t an_sleep_for_dtims; /* 0x52 */
227: u_int16_t an_listen_interval; /* 0x54 */
228: u_int16_t an_fast_listen_interval;/* 0x56 */
229: u_int16_t an_listen_decay; /* 0x58 */
230: u_int16_t an_fast_listen_decay; /* 0x5A */
231: u_int16_t an_rsvd2[2]; /* 0x5C */
232: /* Ad-hoc (or AP) operation. */
233: u_int16_t an_beacon_period; /* 0x60 */
234: u_int16_t an_atim_duration; /* 0x62 */
235: u_int16_t an_rsvd3; /* 0x64 */
236: u_int16_t an_ds_channel; /* 0x66 */
237: u_int16_t an_rsvd4; /* 0x68 */
238: u_int16_t an_dtim_period; /* 0x6A */
239: u_int16_t an_rsvd5[2]; /* 0x6C */
240: /* Radio operation. */
241: u_int16_t an_radiotype; /* 0x70 */
242: u_int16_t an_diversity; /* 0x72 */
243: u_int16_t an_tx_power; /* 0x74 */
244: u_int16_t an_rss_thresh; /* 0x76 */
245: u_int16_t an_modulation_type; /* 0x78 */
246: u_int16_t an_short_preamble; /* 0x7A */
247: u_int16_t an_home_product; /* 0x7C */
248: u_int16_t an_rsvd6; /* 0x7E */
249: /* Aironet extensions. */
250: u_int8_t an_nodename[16]; /* 0x80 */
251: u_int16_t an_arl_thresh; /* 0x90 */
252: u_int16_t an_arl_decay; /* 0x92 */
253: u_int16_t an_arl_delay; /* 0x94 */
254: u_int8_t an_rsvd7; /* 0x96 */
255: u_int8_t an_rsvd8; /* 0x97 */
256: u_int8_t an_magic_packet_action; /* 0x98 */
257: u_int8_t an_magic_packet_ctl; /* 0x99 */
258: u_int16_t an_rsvd9;
259: u_int16_t an_spare[24];
260: } __attribute__((__packed__));
261:
262: #define AN_OPMODE_IBSS_ADHOC 0x0000
263: #define AN_OPMODE_INFRASTRUCTURE_STATION 0x0001
264: #define AN_OPMODE_AP 0x0002
265: #define AN_OPMODE_AP_REPEATER 0x0003
266: #define AN_OPMODE_UNMODIFIED_PAYLOAD 0x0100
267: #define AN_OPMODE_AIRONET_EXTENSIONS 0x0200
268: #define AN_OPMODE_AP_EXTENSIONS 0x0400
269: #define AN_OPMODE_ANTENNA_ALIGN 0x0800
270: #define AN_OPMODE_ETHER_LLC 0x1000
271: #define AN_OPMODE_LEAF_NODE 0x2000
272: #define AN_OPMODE_CF_POLLABLE 0x4000
273: #define AN_OPMODE_MIC 0x8000
274:
275: #define AN_RXMODE_BC_MC_ADDR 0x0000
276: #define AN_RXMODE_BC_ADDR 0x0001
277: #define AN_RXMODE_ADDR 0x0002
278: #define AN_RXMODE_80211_MONITOR_CURBSS 0x0003
279: #define AN_RXMODE_80211_MONITOR_ANYBSS 0x0004
280: #define AN_RXMODE_LAN_MONITOR_CURBSS 0x0005
281: #define AN_RXMODE_NO_8023_HEADER 0x0100
282: #define AN_RXMODE_NORMALIZED_RSSI 0x0200
283:
284: #define AN_RATE_1MBPS 0x0002
285: #define AN_RATE_2MBPS 0x0004
286: #define AN_RATE_5_5MBPS 0x000B
287: #define AN_RATE_11MBPS 0x0016
288:
289: #define AN_DEVTYPE_PC4500 0x0065
290: #define AN_DEVTYPE_PC4800 0x006D
291:
292: #define AN_SCANMODE_ACTIVE 0x0000
293: #define AN_SCANMODE_PASSIVE 0x0001
294: #define AN_SCANMODE_AIRONET_ACTIVE 0x0002
295:
296: #define AN_AUTHTYPE_NONE 0x0000
297: #define AN_AUTHTYPE_OPEN 0x0001
298: #define AN_AUTHTYPE_SHAREDKEY 0x0002
299: #define AN_AUTHTYPE_MASK 0x00ff
300: #define AN_AUTHTYPE_PRIVACY_IN_USE 0x0100
301: #define AN_AUTHTYPE_ALLOW_UNENCRYPTED 0x0200
302: #define AN_AUTHTYPE_LEAP 0x1000
303:
304: #define AN_PSAVE_CAM 0x0000
305: #define AN_PSAVE_PSP 0x0001
306: #define AN_PSAVE_PSP_CAM 0x0002
307:
308: #define AN_RADIOTYPE_80211_FH 0x0001
309: #define AN_RADIOTYPE_80211_DS 0x0002
310: #define AN_RADIOTYPE_LM2000_DS 0x0004
311:
312: #define AN_DIVERSITY_FACTORY_DEFAULT 0x0000
313: #define AN_DIVERSITY_ANTENNA_1_ONLY 0x0001
314: #define AN_DIVERSITY_ANTENNA_2_ONLY 0x0002
315: #define AN_DIVERSITY_ANTENNA_1_AND_2 0x0003
316:
317: #define AN_TXPOWER_FACTORY_DEFAULT 0x0000
318: #define AN_TXPOWER_50MW 50
319: #define AN_TXPOWER_100MW 100
320: #define AN_TXPOWER_250MW 250
321:
322: /*
323: * Valid SSID list. You can specify up to three SSIDs denoting
324: * the service sets that you want to join. The first SSID always
325: * defaults to "tsunami" which is a handy way to detect the
326: * card.
327: */
328: #define AN_RID_SSIDLIST 0xFF11
329: struct an_rid_ssidlist {
330: struct an_rid_ssid_entry {
331: u_int16_t an_ssid_len;
332: char an_ssid[32];
333: } __attribute__((__packed__)) an_entry[3]; /* 25 for fwver.5 */
334: } __attribute__((__packed__));
335:
336: /*
337: * Valid AP list.
338: */
339: #define AN_RID_APLIST 0xFF12
340: struct an_rid_aplist {
341: u_int8_t an_ap1[8];
342: u_int8_t an_ap2[8];
343: u_int8_t an_ap3[8];
344: u_int8_t an_ap4[8];
345: } __attribute__((__packed__));
346:
347: /*
348: * Driver name.
349: */
350: #define AN_RID_DRVNAME 0xFF13
351: struct an_rid_drvname {
352: u_int8_t an_drvname[16];
353: } __attribute__((__packed__));
354:
355: /*
356: * Frame encapsulation.
357: */
358: #define AN_RID_ENCAP 0xFF14
359: #define AN_ENCAP_NENTS 8
360: struct an_rid_encap {
361: struct an_rid_encap_entry {
362: u_int16_t an_ethertype;
363: u_int16_t an_action;
364: } __attribute__((__packed__)) an_entry[AN_ENCAP_NENTS];
365: } __attribute__((__packed__));
366:
367: #define AN_ENCAP_ACTION_RX 0x0001
368: #define AN_ENCAP_ACTION_TX 0x0002
369:
370: #define AN_RXENCAP_NONE 0x0000
371: #define AN_RXENCAP_RFC1024 0x0001
372:
373: #define AN_TXENCAP_RFC1024 0x0000
374: #define AN_TXENCAP_80211 0x0002
375:
376: /*
377: * Actual config, same structure as general config (read only).
378: */
379: #define AN_RID_ACTUALCFG 0xFF20
380:
381: /*
382: * Card capabilities (read only).
383: */
384: #define AN_RID_CAPABILITIES 0xFF00
385: struct an_rid_caps {
386: u_int8_t an_oui[3]; /* 0x02 */
387: u_int8_t an_rsvd0; /* 0x05 */
388: u_int16_t an_prodnum; /* 0x06 */
389: u_int8_t an_manufname[32]; /* 0x08 */
390: u_int8_t an_prodname[16]; /* 0x28 */
391: u_int8_t an_prodvers[8]; /* 0x38 */
392: u_int8_t an_oemaddr[6]; /* 0x40 */
393: u_int8_t an_aironetaddr[6]; /* 0x46 */
394: u_int16_t an_radiotype; /* 0x4C */
395: u_int16_t an_regdomain; /* 0x4E */
396: u_int8_t an_callid[6]; /* 0x50 */
397: u_int8_t an_rates[8]; /* 0x56 */
398: u_int8_t an_rx_diversity; /* 0x5E */
399: u_int8_t an_tx_diversity; /* 0x5F */
400: u_int16_t an_tx_powerlevels[8]; /* 0x60 */
401: u_int16_t an_hwrev; /* 0x70 */
402: u_int16_t an_hwcaps; /* 0x72 */
403: u_int16_t an_temprange; /* 0x74 */
404: u_int16_t an_fwrev; /* 0x76 */
405: u_int16_t an_fwsubrev; /* 0x78 */
406: u_int16_t an_ifacerev; /* 0x7A */
407: u_int16_t an_softcaps; /* 0x7C */
408: u_int16_t an_bootblockrev; /* 0x7E */
409: u_int16_t an_req_hw_support; /* 0x80 */
410: /* extended capabilities */
411: u_int16_t an_ext_softcaps; /* 0x82 */
412: u_int16_t an_spare[34];
413: } __attribute__((__packed__));
414:
415: #define AN_REGDOMAIN_USA 0
416: #define AN_REGDOMAIN_EUROPE 1
417: #define AN_REGDOMAIN_JAPAN 2
418: #define AN_REGDOMAIN_SPAIN 3
419: #define AN_REGDOMAIN_FRANCE 4
420: #define AN_REGDOMAIN_BELGIUM 5
421: #define AN_REGDOMAIN_ISRAEL 6
422: #define AN_REGDOMAIN_CANADA 7
423: #define AN_REGDOMAIN_AUSTRALIA 8
424: #define AN_REGDOMAIN_JAPANWIDE 9
425:
426: #define AN_SOFTCAPS_WEP 0x0002
427: #define AN_SOFTCAPS_RSSIMAP 0x0008
428: #define AN_SOFTCAPS_WEP128 0x0100
429:
430: #define AN_EXT_SOFTCAPS_MIC 0x0001
431:
432: /*
433: * Access point (read only)
434: */
435: #define AN_RID_APINFO 0xFF01
436: struct an_rid_apinfo {
437: u_int16_t an_tim_addr;
438: u_int16_t an_airo_addr;
439: } __attribute__((__packed__));
440:
441: /*
442: * Radio info (read only).
443: */
444: #define AN_RID_RADIOINFO 0xFF02
445:
446: /*
447: * Status (read only). Note: the manual claims this RID is 108 bytes
448: * long (0x6A is the last datum, which is 2 bytes long) however when
449: * this RID is read from the NIC, it returns a length of 110 or 112.
450: * To be on the safe side, this structure is padded with 4 extra 16-bit
451: * words. (There is a misprint in the manual which says the macaddr
452: * field is 8 bytes long.)
453: *
454: * Also, the channel_set and current_channel fields appear to be
455: * reversed. Either that, or the hop_period field is unused.
456: */
457: #define AN_RID_STATUS 0xFF50
458: struct an_rid_status {
459: u_int8_t an_macaddr[6]; /* 0x02 */
460: u_int16_t an_opmode; /* 0x08 */
461: u_int16_t an_errcode; /* 0x0A */
462: u_int16_t an_cur_signal_strength; /* 0x0C */
463: u_int16_t an_ssidlen; /* 0x0E */
464: u_int8_t an_ssid[32]; /* 0x10 */
465: u_int8_t an_ap_name[16]; /* 0x30 */
466: u_int8_t an_cur_bssid[6]; /* 0x40 */
467: u_int8_t an_prev_bssid1[6]; /* 0x46 */
468: u_int8_t an_prev_bssid2[6]; /* 0x4C */
469: u_int8_t an_prev_bssid3[6]; /* 0x52 */
470: u_int16_t an_beacon_period; /* 0x58 */
471: u_int16_t an_dtim_period; /* 0x5A */
472: u_int16_t an_atim_duration; /* 0x5C */
473: u_int16_t an_hop_period; /* 0x5E */
474: u_int16_t an_cur_channel; /* 0x62 */
475: u_int16_t an_channel_set; /* 0x60 */
476: u_int16_t an_hops_to_backbone; /* 0x64 */
477: u_int16_t an_ap_total_load; /* 0x66 */
478: u_int16_t an_our_generated_load; /* 0x68 */
479: u_int16_t an_accumulated_arl; /* 0x6A */
480: u_int16_t an_cur_signal_quality; /* 0x6C */
481: u_int16_t an_current_tx_rate; /* 0x6E */
482: u_int16_t an_ap_device; /* 0x70 */
483: u_int16_t an_normalized_rssi; /* 0x72 */
484: u_int16_t an_short_pre_in_use; /* 0x74 */
485: u_int8_t an_ap_ip_addr[4]; /* 0x76 */
486: u_int16_t an_max_noise_prev_sec; /* 0x7A */
487: u_int16_t an_avg_noise_prev_min; /* 0x7C */
488: u_int16_t an_max_noise_prev_min; /* 0x7E */
489: u_int16_t an_spare[11];
490: } __attribute__((__packed__));
491:
492: #define AN_STATUS_OPMODE_CONFIGURED 0x0001
493: #define AN_STATUS_OPMODE_MAC_ENABLED 0x0002
494: #define AN_STATUS_OPMODE_RX_ENABLED 0x0004
495: #define AN_STATUS_OPMODE_IN_SYNC 0x0010
496: #define AN_STATUS_OPMODE_ASSOCIATED 0x0020
497: #define AN_STATUS_OPMODE_ERROR 0x8000
498:
499: /*
500: * Statistics
501: */
502: #define AN_RID_16BITS_CUM 0xFF60 /* Cumulative 16-bit stats counters */
503: #define AN_RID_16BITS_DELTA 0xFF61 /* 16-bit stats (since last clear) */
504: #define AN_RID_16BITS_DELTACLR 0xFF62 /* 16-bit stats, clear on read */
505: #define AN_RID_32BITS_CUM 0xFF68 /* Cumulative 32-bit stats counters */
506: #define AN_RID_32BITS_DELTA 0xFF69 /* 32-bit stats (since last clear) */
507: #define AN_RID_32BITS_DELTACLR 0xFF6A /* 32-bit stats, clear on read */
508:
509: /*
510: * Grrr. The manual says the statistics record is 384 bytes in length,
511: * but the card says the record is 404 bytes. There's some padding left
512: * at the end of this structure to account for any discrepancies.
513: */
514: struct an_rid_stats {
515: u_int16_t an_spacer; /* 0x02 */
516: u_int32_t an_rx_overruns; /* 0x04 */
517: u_int32_t an_rx_plcp_csum_errs; /* 0x08 */
518: u_int32_t an_rx_plcp_format_errs; /* 0x0C */
519: u_int32_t an_rx_plcp_len_errs; /* 0x10 */
520: u_int32_t an_rx_mac_crc_errs; /* 0x14 */
521: u_int32_t an_rx_mac_crc_ok; /* 0x18 */
522: u_int32_t an_rx_wep_errs; /* 0x1C */
523: u_int32_t an_rx_wep_ok; /* 0x20 */
524: u_int32_t an_retry_long; /* 0x24 */
525: u_int32_t an_retry_short; /* 0x28 */
526: u_int32_t an_retry_max; /* 0x2C */
527: u_int32_t an_no_ack; /* 0x30 */
528: u_int32_t an_no_cts; /* 0x34 */
529: u_int32_t an_rx_ack_ok; /* 0x38 */
530: u_int32_t an_rx_cts_ok; /* 0x3C */
531: u_int32_t an_tx_ack_ok; /* 0x40 */
532: u_int32_t an_tx_rts_ok; /* 0x44 */
533: u_int32_t an_tx_cts_ok; /* 0x48 */
534: u_int32_t an_tx_lmac_mcasts; /* 0x4C */
535: u_int32_t an_tx_lmac_bcasts; /* 0x50 */
536: u_int32_t an_tx_lmac_ucast_frags; /* 0x54 */
537: u_int32_t an_tx_lmac_ucasts; /* 0x58 */
538: u_int32_t an_tx_beacons; /* 0x5C */
539: u_int32_t an_rx_beacons; /* 0x60 */
540: u_int32_t an_tx_single_cols; /* 0x64 */
541: u_int32_t an_tx_multi_cols; /* 0x68 */
542: u_int32_t an_tx_defers_no; /* 0x6C */
543: u_int32_t an_tx_defers_prot; /* 0x70 */
544: u_int32_t an_tx_defers_energy; /* 0x74 */
545: u_int32_t an_rx_dups; /* 0x78 */
546: u_int32_t an_rx_partial; /* 0x7C */
547: u_int32_t an_tx_too_old; /* 0x80 */
548: u_int32_t an_rx_too_old; /* 0x84 */
549: u_int32_t an_lostsync_max_retries;/* 0x88 */
550: u_int32_t an_lostsync_missed_beacons;/* 0x8C */
551: u_int32_t an_lostsync_arl_exceeded;/*0x90 */
552: u_int32_t an_lostsync_deauthed; /* 0x94 */
553: u_int32_t an_lostsync_disassociated;/*0x98 */
554: u_int32_t an_lostsync_tsf_timing; /* 0x9C */
555: u_int32_t an_tx_host_mcasts; /* 0xA0 */
556: u_int32_t an_tx_host_bcasts; /* 0xA4 */
557: u_int32_t an_tx_host_ucasts; /* 0xA8 */
558: u_int32_t an_tx_host_failed; /* 0xAC */
559: u_int32_t an_rx_host_mcasts; /* 0xB0 */
560: u_int32_t an_rx_host_bcasts; /* 0xB4 */
561: u_int32_t an_rx_host_ucasts; /* 0xB8 */
562: u_int32_t an_rx_host_discarded; /* 0xBC */
563: u_int32_t an_tx_hmac_mcasts; /* 0xC0 */
564: u_int32_t an_tx_hmac_bcasts; /* 0xC4 */
565: u_int32_t an_tx_hmac_ucasts; /* 0xC8 */
566: u_int32_t an_tx_hmac_failed; /* 0xCC */
567: u_int32_t an_rx_hmac_mcasts; /* 0xD0 */
568: u_int32_t an_rx_hmac_bcasts; /* 0xD4 */
569: u_int32_t an_rx_hmac_ucasts; /* 0xD8 */
570: u_int32_t an_rx_hmac_discarded; /* 0xDC */
571: u_int32_t an_tx_hmac_accepted; /* 0xE0 */
572: u_int32_t an_ssid_mismatches; /* 0xE4 */
573: u_int32_t an_ap_mismatches; /* 0xE8 */
574: u_int32_t an_rates_mismatches; /* 0xEC */
575: u_int32_t an_auth_rejects; /* 0xF0 */
576: u_int32_t an_auth_timeouts; /* 0xF4 */
577: u_int32_t an_assoc_rejects; /* 0xF8 */
578: u_int32_t an_assoc_timeouts; /* 0xFC */
579: u_int32_t an_reason_outside_table;/* 0x100 */
580: u_int32_t an_reason1; /* 0x104 */
581: u_int32_t an_reason2; /* 0x108 */
582: u_int32_t an_reason3; /* 0x10C */
583: u_int32_t an_reason4; /* 0x110 */
584: u_int32_t an_reason5; /* 0x114 */
585: u_int32_t an_reason6; /* 0x118 */
586: u_int32_t an_reason7; /* 0x11C */
587: u_int32_t an_reason8; /* 0x120 */
588: u_int32_t an_reason9; /* 0x124 */
589: u_int32_t an_reason10; /* 0x128 */
590: u_int32_t an_reason11; /* 0x12C */
591: u_int32_t an_reason12; /* 0x130 */
592: u_int32_t an_reason13; /* 0x134 */
593: u_int32_t an_reason14; /* 0x138 */
594: u_int32_t an_reason15; /* 0x13C */
595: u_int32_t an_reason16; /* 0x140 */
596: u_int32_t an_reason17; /* 0x144 */
597: u_int32_t an_reason18; /* 0x148 */
598: u_int32_t an_reason19; /* 0x14C */
599: u_int32_t an_rx_mgmt_pkts; /* 0x150 */
600: u_int32_t an_tx_mgmt_pkts; /* 0x154 */
601: u_int32_t an_rx_refresh_pkts; /* 0x158 */
602: u_int32_t an_tx_refresh_pkts; /* 0x15C */
603: u_int32_t an_rx_poll_pkts; /* 0x160 */
604: u_int32_t an_tx_poll_pkts; /* 0x164 */
605: u_int32_t an_host_retries; /* 0x168 */
606: u_int32_t an_lostsync_hostreq; /* 0x16C */
607: u_int32_t an_host_tx_bytes; /* 0x170 */
608: u_int32_t an_host_rx_bytes; /* 0x174 */
609: u_int32_t an_uptime_usecs; /* 0x178 */
610: u_int32_t an_uptime_secs; /* 0x17C */
611: u_int32_t an_lostsync_better_ap; /* 0x180 */
612: u_int32_t an_rsvd[10];
613: } __attribute__((__packed__));
614:
615: /*
616: * Volatile WEP Key
617: */
618: #define AN_RID_WEP_VOLATILE 0xFF15 /* Volatile WEP Key */
619: struct an_rid_wepkey {
620: u_int16_t an_key_index; /* 0x02 */
621: u_int8_t an_mac_addr[6]; /* 0x04 */
622: u_int16_t an_key_len; /* 0x0A */
623: u_int8_t an_key[16]; /* 0x0C */
624: } __attribute__((__packed__));
625:
626: /*
627: * Persistent WEP Key
628: */
629: #define AN_RID_WEP_PERSISTENT 0xFF16 /* Persistent WEP Key */
630:
631: /*
632: * LEAP Key
633: */
634: #define AN_RID_LEAP_USER 0xFF23 /* User Name for LEAP */
635: #define AN_RID_LEAP_PASS 0xFF24 /* Password for LEAP */
636: struct an_rid_leapkey {
637: u_int16_t an_key_len; /* 0x02 */
638: u_int8_t an_key[32]; /* 0x04 */
639: } __attribute__((__packed__));
640:
641: /*
642: * MIC
643: */
644: #define AN_RID_MIC 0xFF57 /* Message Integrity Check */
645: struct an_rid_mic {
646: u_int16_t an_mic_state; /* 0x02 */
647: u_int16_t an_mic_mcast_valid; /* 0x04 */
648: u_int8_t an_mic_mcast[16]; /* 0x06 */
649: u_int16_t an_mic_ucast_valid; /* 0x16 */
650: u_int8_t an_mic_ucast[16]; /* 0x18 */
651: } __attribute__((__packed__));
652:
653: /*
654: * Receive frame structure.
655: */
656: struct an_rxframe {
657: u_int32_t an_rx_time; /* 0x00 */
658: u_int16_t an_rx_status; /* 0x04 */
659: u_int16_t an_rx_payload_len; /* 0x06 */
660: u_int8_t an_rsvd0; /* 0x08 */
661: u_int8_t an_rx_signal_strength; /* 0x09 */
662: u_int8_t an_rx_rate; /* 0x0A */
663: u_int8_t an_rx_chan; /* 0x0B */
664: u_int8_t an_rx_assoc_cnt; /* 0x0C */
665: u_int8_t an_rsvd1[3]; /* 0x0D */
666: u_int8_t an_plcp_hdr[4]; /* 0x10 */
667: struct ieee80211_frame_addr4 an_whdr;
668: u_int16_t an_gaplen; /* 0x32 */
669: } __attribute__((__packed__));
670: #define AN_RXGAP_MAX 8
671:
672: /*
673: * Transmit frame structure.
674: */
675: struct an_txframe {
676: u_int32_t an_tx_sw; /* 0x00 */
677: u_int16_t an_tx_status; /* 0x04 */
678: u_int16_t an_tx_payload_len; /* 0x06 */
679: u_int16_t an_tx_ctl; /* 0x08 */
680: u_int16_t an_tx_assoc_id; /* 0x0A */
681: u_int16_t an_tx_retry; /* 0x0C */
682: u_int8_t an_tx_assoc_cnt; /* 0x0E */
683: u_int8_t an_tx_rate; /* 0x0F */
684: u_int8_t an_tx_max_long_retries; /* 0x10 */
685: u_int8_t an_tx_max_short_retries; /*0x11 */
686: u_int8_t an_rsvd0[2]; /* 0x12 */
687: struct ieee80211_frame_addr4 an_whdr;
688: u_int16_t an_gaplen; /* 0x32 */
689: } __attribute__((__packed__));
690:
691: #define AN_TXGAP_802_3 0
692: #define AN_TXGAP_802_11 6
693:
694: struct an_802_3_hdr {
695: u_int16_t an_802_3_status;
696: u_int16_t an_802_3_payload_len;
697: u_int8_t an_dst_addr[6];
698: u_int8_t an_src_addr[6];
699: } __attribute__((__packed__));
700:
701: #define AN_TXSTAT_EXCESS_RETRY 0x0002
702: #define AN_TXSTAT_LIFE_EXCEEDED 0x0004
703: #define AN_TXSTAT_AID_FAIL 0x0008
704: #define AN_TXSTAT_MAC_DISABLED 0x0010
705: #define AN_TXSTAT_ASSOC_LOST 0x0020
706:
707: #define AN_TXCTL_RSVD 0x0001
708: #define AN_TXCTL_TXOK_INTR 0x0002
709: #define AN_TXCTL_TXERR_INTR 0x0004
710: #define AN_TXCTL_HEADER_TYPE 0x0008
711: #define AN_TXCTL_PAYLOAD_TYPE 0x0010
712: #define AN_TXCTL_NORELEASE 0x0020
713: #define AN_TXCTL_NORETRIES 0x0040
714: #define AN_TXCTL_CLEAR_AID 0x0080
715: #define AN_TXCTL_STRICT_ORDER 0x0100
716: #define AN_TXCTL_USE_RTS 0x0200
717:
718: #define AN_HEADERTYPE_8023 0x0000
719: #define AN_HEADERTYPE_80211 0x0008
720:
721: #define AN_PAYLOADTYPE_ETHER 0x0000
722: #define AN_PAYLOADTYPE_LLC 0x0010
723:
724: #define AN_TXCTL_80211 \
725: (AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_80211| \
726: AN_PAYLOADTYPE_LLC|AN_TXCTL_NORELEASE)
727:
728: #define AN_TXCTL_8023 \
729: (AN_TXCTL_TXOK_INTR|AN_TXCTL_TXERR_INTR|AN_HEADERTYPE_8023| \
730: AN_PAYLOADTYPE_ETHER|AN_TXCTL_NORELEASE)
731:
732: #define AN_STAT_BADCRC 0x0001
733: #define AN_STAT_UNDECRYPTABLE 0x0002
734: #define AN_STAT_ERRSTAT 0x0003
735: #define AN_STAT_MAC_PORT 0x0700
736: #define AN_STAT_1042 0x2000 /* RFC1042 encoded */
737: #define AN_STAT_TUNNEL 0x4000 /* Bridge-tunnel encoded */
738: #define AN_STAT_WMP_MSG 0x6000 /* WaveLAN-II management protocol */
739: #define AN_RXSTAT_MSG_TYPE 0xE000
740:
741: #define AN_ENC_TX_802_3 0x00
742: #define AN_ENC_TX_802_11 0x11
743: #define AN_ENC_TX_E_II 0x0E
744:
745: #define AN_ENC_TX_1042 0x00
746: #define AN_ENC_TX_TUNNEL 0xF8
747:
748: #define AN_TXCNTL_MACPORT 0x00FF
749: #define AN_TXCNTL_STRUCTTYPE 0xFF00
750:
751: #endif /* _DEV_IC_ANREG_H */
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