Annotation of sys/dev/ic/am79c930reg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: am79c930reg.h,v 1.5 2003/10/21 18:58:48 jmc Exp $ */
! 2:
! 3: /*-
! 4: * Copyright (c) 1999 The NetBSD Foundation, Inc.
! 5: * All rights reserved.
! 6: *
! 7: * This code is derived from software contributed to The NetBSD Foundation
! 8: * by Bill Sommerfeld
! 9: *
! 10: * Redistribution and use in source and binary forms, with or without
! 11: * modification, are permitted provided that the following conditions
! 12: * are met:
! 13: * 1. Redistributions of source code must retain the above copyright
! 14: * notice, this list of conditions and the following disclaimer.
! 15: * 2. Redistributions in binary form must reproduce the above copyright
! 16: * notice, this list of conditions and the following disclaimer in the
! 17: * documentation and/or other materials provided with the distribution.
! 18: * 3. All advertising materials mentioning features or use of this software
! 19: * must display the following acknowledgement:
! 20: * This product includes software developed by the NetBSD
! 21: * Foundation, Inc. and its contributors.
! 22: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 23: * contributors may be used to endorse or promote products derived
! 24: * from this software without specific prior written permission.
! 25: *
! 26: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 27: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 36: * POSSIBILITY OF SUCH DAMAGE.
! 37: */
! 38:
! 39: /*
! 40: * Device register definitions gleaned from from the AMD "Am79C930
! 41: * PCnet(tm)-Mobile Single Chip Wireless LAN Media Access Controller"
! 42: * data sheet, AMD Pub #20183, Rev B, amendment/0, issue date August 1997.
! 43: *
! 44: * As of 1999/10/23, this was available from AMD's web site in PDF
! 45: * form.
! 46: */
! 47:
! 48:
! 49: /*
! 50: * The 79c930 contains a bus interface unit, a media access
! 51: * controller, and a transceiver attachment interface.
! 52: * The MAC contains an 80188 CPU core.
! 53: * typical devices built around this chip typically add 32k or 64k of
! 54: * memory for buffers.
! 55: *
! 56: * The 80188 runs firmware which handles most of the 802.11 gorp, and
! 57: * communicates with the host using shared data structures in this
! 58: * memory; the specifics of the shared memory layout are not covered
! 59: * in this source file; see <dev/ic/am80211fw.h> for details of that layer.
! 60: */
! 61:
! 62: /*
! 63: * Device Registers
! 64: */
! 65:
! 66: #define AM79C930_IO_BASE 0
! 67: #define AM79C930_IO_SIZE 16
! 68: #define AM79C930_IO_SIZE_BIG 40
! 69: #define AM79C930_IO_ALIGN 0x40 /* am79c930 decodes lower 6bits */
! 70:
! 71:
! 72: #define AM79C930_GCR 0 /* General Config Register */
! 73:
! 74: #define AM79C930_GCR_SWRESET 0x80 /* software reset */
! 75: #define AM79C930_GCR_CORESET 0x40 /* core reset */
! 76: #define AM79C930_GCR_DISPWDN 0x20 /* disable powerdown */
! 77: #define AM79C930_GCR_ECWAIT 0x10 /* embedded controller wait */
! 78: #define AM79C930_GCR_ECINT 0x08 /* interrupt from embedded ctrlr */
! 79: #define AM79C930_GCR_INT2EC 0x04 /* interrupt to embedded ctrlr */
! 80: #define AM79C930_GCR_ENECINT 0x02 /* enable interrupts from e.c. */
! 81: #define AM79C930_GCR_DAM 0x01 /* direct access mode (read only) */
! 82:
! 83: #define AM79C930_GCR_BITS "\020\1DAM\2ENECINT\3INT2EC\4ECINT\5ECWAIT\6DISPWDN\7CORESET\010SWRESET"
! 84:
! 85: #define AM79C930_BSS 1 /* Bank Switching Select register */
! 86:
! 87: #define AM79C930_BSS_ECATR 0x80 /* E.C. ALE test read */
! 88: #define AM79C930_BSS_FS 0x20 /* Flash Select */
! 89: #define AM79C930_BSS_MBS 0x18 /* Memory Bank Select */
! 90: #define AM79C930_BSS_EIOW 0x04 /* Expand I/O Window */
! 91: #define AM79C930_BSS_TBS 0x03 /* TAI Bank Select */
! 92:
! 93: #define AM79C930_LMA_LO 2 /* Local Memory Address register (low byte) */
! 94:
! 95: #define AM79C930_LMA_HI 3 /* Local Memory Address register (high byte) */
! 96:
! 97: /* set this bit to turn off ISAPnP version */
! 98: #define AM79C930_LMA_HI_ISAPWRDWN 0x80
! 99:
! 100: /*
! 101: * mmm, inconsistency in chip documentation:
! 102: * According to page 79--80, all four of the following are equivalent
! 103: * and address the single byte pointed at by BSS_{FS,MBS} | LMA_{HI,LO}
! 104: * According to tables on p63 and p67, they're the LSB through MSB
! 105: * of a 32-bit word.
! 106: */
! 107:
! 108: #define AM79C930_IODPA 4 /* I/O Data port A */
! 109: #define AM79C930_IODPB 5 /* I/O Data port B */
! 110: #define AM79C930_IODPC 6 /* I/O Data port C */
! 111: #define AM79C930_IODPD 7 /* I/O Data port D */
! 112:
! 113:
! 114: /*
! 115: * Transceiver Attachment Interface Registers (TIR space)
! 116: * (omitted for now, since host access to them is for diagnostic
! 117: * purposes only).
! 118: */
! 119:
! 120: /*
! 121: * memory space goo.
! 122: */
! 123:
! 124: #define AM79C930_MEM_SIZE 0x8000 /* 32k */
! 125: #define AM79C930_MEM_BASE 0x0 /* starting at 0 */
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