Annotation of sys/dev/ic/acxreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: acxreg.h,v 1.11 2007/03/29 12:37:47 claudio Exp $ */
2:
3: /*
4: * Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org>
5: *
6: * Permission to use, copy, modify, and distribute this software for any
7: * purpose with or without fee is hereby granted, provided that the above
8: * copyright notice and this permission notice appear in all copies.
9: *
10: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14: * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15: * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16: * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17: */
18:
19: /*
20: * Copyright (c) 2006 The DragonFly Project. All rights reserved.
21: *
22: * This code is derived from software contributed to The DragonFly Project
23: * by Sepherosa Ziehau <sepherosa@gmail.com>
24: *
25: * Redistribution and use in source and binary forms, with or without
26: * modification, are permitted provided that the following conditions
27: * are met:
28: *
29: * 1. Redistributions of source code must retain the above copyright
30: * notice, this list of conditions and the following disclaimer.
31: * 2. Redistributions in binary form must reproduce the above copyright
32: * notice, this list of conditions and the following disclaimer in
33: * the documentation and/or other materials provided with the
34: * distribution.
35: * 3. Neither the name of The DragonFly Project nor the names of its
36: * contributors may be used to endorse or promote products derived
37: * from this software without specific, prior written permission.
38: *
39: * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
40: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
41: * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
42: * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
43: * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
44: * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
45: * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
46: * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
47: * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
48: * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
49: * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
50: * SUCH DAMAGE.
51: */
52:
53: #ifndef _ACXREG_H
54: #define _ACXREG_H
55:
56: /*
57: * IO register index
58: */
59: #define ACXREG_SOFT_RESET 0
60: #define ACXREG_FWMEM_ADDR 1
61: #define ACXREG_FWMEM_DATA 2
62: #define ACXREG_FWMEM_CTRL 3
63: #define ACXREG_FWMEM_START 4
64: #define ACXREG_EVENT_MASK 5
65: #define ACXREG_INTR_TRIG 6
66: #define ACXREG_INTR_MASK 7
67: #define ACXREG_INTR_STATUS 8
68: #define ACXREG_INTR_STATUS_CLR 9 /* cleared after being read */
69: #define ACXREG_INTR_ACK 10
70: #define ACXREG_HINTR_TRIG 11 /* XXX what's this? */
71: #define ACXREG_RADIO_ENABLE 12
72: #define ACXREG_EEPROM_INIT 13
73: #define ACXREG_EEPROM_CTRL 14
74: #define ACXREG_EEPROM_ADDR 15
75: #define ACXREG_EEPROM_DATA 16
76: #define ACXREG_EEPROM_CONF 17
77: #define ACXREG_EEPROM_INFO 18
78: #define ACXREG_PHY_ADDR 19
79: #define ACXREG_PHY_DATA 20
80: #define ACXREG_PHY_CTRL 21
81: #define ACXREG_GPIO_OUT_ENABLE 22
82: #define ACXREG_GPIO_OUT 23
83: #define ACXREG_CMD_REG_OFFSET 24
84: #define ACXREG_INFO_REG_OFFSET 25
85: #define ACXREG_RESET_SENSE 26
86: #define ACXREG_ECPU_CTRL 27
87: #define ACXREG_MAX 28
88: #define ACXREG(reg, val) [ACXREG_##reg] = val
89:
90: /*
91: * Value read from ACXREG_EEPROM_INFO
92: * upper 8bits are radio type
93: * lower 8bits are form factor
94: */
95: #define ACX_EEINFO_RADIO_TYPE_SHIFT 8
96: #define ACX_EEINFO_RADIO_TYPE_MASK (0xff << ACX_EEINFO_RADIO_TYPE_SHIFT)
97: #define ACX_EEINFO_FORM_FACTOR_MASK 0xff
98:
99: #define ACX_EEINFO_HAS_RADIO_TYPE(info) ((info) & ACX_EEINFO_RADIO_TYPE_MASK)
100: #define ACX_EEINFO_RADIO_TYPE(info) ((info) >> ACX_EEINFO_RADIO_TYPE_SHIFT)
101: #define ACX_EEINFO_FORM_FACTOR(info) ((info) & ACX_EEINFO_FORM_FACTOR_MASK)
102:
103: /*
104: * Size of command register whose location is obtained
105: * from ACXREG_CMD_REG_OFFSET IO register
106: */
107: #define ACX_CMD_REG_SIZE 4 /* 4 bytes */
108:
109: /*
110: * Size of infomation register whose location is obtained
111: * from ACXREG_INFO_REG_OFFSET IO register
112: */
113: #define ACX_INFO_REG_SIZE 4 /* 4 bytes */
114:
115: /*
116: * Offset of EEPROM variables
117: */
118: #define ACX_EE_VERSION_OFS 0x05
119:
120: /*
121: * Possible values for various IO registers
122: */
123:
124: /* ACXREG_SOFT_RESET */
125: #define ACXRV_SOFT_RESET 0x1
126:
127: /* ACXREG_FWMEM_START */
128: #define ACXRV_FWMEM_START_OP 0x0
129:
130: /* ACXREG_FWMEM_CTRL */
131: #define ACXRV_FWMEM_ADDR_AUTOINC 0x10000
132:
133: /* ACXREG_EVENT_MASK */
134: #define ACXRV_EVENT_DISABLE 0x8000 /* XXX What's this?? */
135:
136: /* ACXREG_INTR_TRIG */
137: #define ACXRV_TRIG_CMD_FINI 0x0001
138: #define ACXRV_TRIG_TX_FINI 0x0004
139:
140: /* ACXREG_INTR_MASK */
141: #define ACXRV_INTR_RX_DATA 0x0001
142: #define ACXRV_INTR_TX_FINI 0x0002
143: #define ACXRV_INTR_TX_XFER 0x0004
144: #define ACXRV_INTR_RX_FINI 0x0008
145: #define ACXRV_INTR_DTIM 0x0010
146: #define ACXRV_INTR_BEACON 0x0020
147: #define ACXRV_INTR_TIMER 0x0040
148: #define ACXRV_INTR_KEY_MISS 0x0080
149: #define ACXRV_INTR_WEP_FAIL 0x0100
150: #define ACXRV_INTR_CMD_FINI 0x0200
151: #define ACXRV_INTR_INFO 0x0400
152: #define ACXRV_INTR_OVERFLOW 0x0800 /* XXX */
153: #define ACXRV_INTR_PROC_ERR 0x1000 /* XXX */
154: #define ACXRV_INTR_SCAN_FINI 0x2000
155: #define ACXRV_INTR_FCS_THRESH 0x4000 /* XXX */
156: #define ACXRV_INTR_UNKN 0x8000
157: #define ACXRV_INTR_ALL 0xffff
158:
159: /* ACXREG_EEPROM_INIT */
160: #define ACXRV_EEPROM_INIT 0x1
161:
162: /* ACXREG_EEPROM_CTRL */
163: #define ACXRV_EEPROM_READ 0x2
164:
165: /* ACXREG_PHY_CTRL */
166: #define ACXRV_PHY_WRITE 0x1
167: #define ACXRV_PHY_READ 0x2
168:
169: /* ACXREG_PHY_ADDR */
170: #define ACXRV_PHYREG_TXPOWER 0x11 /* axc100 */
171: #define ACXRV_PHYREG_SENSITIVITY 0x30
172:
173: /* ACXREG_ECPU_CTRL */
174: #define ACXRV_ECPU_HALT 0x1
175: #define ACXRV_ECPU_START 0x0
176:
177: /* Commands */
178: #define ACXCMD_GET_CONF 0x01
179: #define ACXCMD_SET_CONF 0x02
180: #define ACXCMD_ENABLE_RXCHAN 0x03
181: #define ACXCMD_ENABLE_TXCHAN 0x04
182: #define ACXCMD_TMPLT_TIM 0x0a
183: #define ACXCMD_JOIN_BSS 0x0b
184: #define ACXCMD_WEP_MGMT 0x0c /* acx111 */
185: #define ACXCMD_SLEEP 0x0f
186: #define ACXCMD_WAKEUP 0x10
187: #define ACXCMD_INIT_MEM 0x12 /* acx100 */
188: #define ACXCMD_TMPLT_BEACON 0x13
189: #define ACXCMD_TMPLT_PROBE_RESP 0x14
190: #define ACXCMD_TMPLT_NULL_DATA 0x15
191: #define ACXCMD_TMPLT_PROBE_REQ 0x16
192: #define ACXCMD_INIT_RADIO 0x18
193:
194: #if 0
195: /*
196: * acx111 does not agree with acx100 about
197: * the meaning of following values. So they
198: * are put into chip specific files.
199: */
200: #define ACX_CONF_FW_RING 0x0003
201: #define ACX_CONF_MEMOPT 0x0005
202: #endif
203: #define ACX_CONF_MEMBLK_SIZE 0x0004 /* acx100 */
204: #define ACX_CONF_RATE_FALLBACK 0x0006
205: #define ACX_CONF_WEPOPT 0x0007 /* acx100 */
206: #define ACX_CONF_MMAP 0x0008
207: #define ACX_CONF_FWREV 0x000d
208: #define ACX_CONF_RXOPT 0x0010
209: #define ACX_CONF_OPTION 0x0015 /* acx111 */
210: #define ACX_CONF_EADDR 0x1001
211: #define ACX_CONF_NRETRY_SHORT 0x1005
212: #define ACX_CONF_NRETRY_LONG 0x1006
213: #define ACX_CONF_WEPKEY 0x1007 /* acx100 */
214: #define ACX_CONF_MSDU_LIFETIME 0x1008
215: #define ACX_CONF_REGDOM 0x100a
216: #define ACX_CONF_ANTENNA 0x100b
217: #define ACX_CONF_TXPOWER 0x100d /* acx111 */
218: #define ACX_CONF_CCA_MODE 0x100e
219: #define ACX_CONF_ED_THRESH 0x100f
220: #define ACX_CONF_WEP_TXKEY 0x1010
221:
222: /*
223: * NOTE:
224: * Following structs' fields are little endian
225: */
226:
227: struct acx_conf {
228: uint16_t conf_id; /* see ACXCONF_ (_acxcmd.h) */
229: uint16_t conf_data_len;
230: } __packed;
231:
232: struct acx_conf_mmap {
233: struct acx_conf confcom;
234: uint32_t code_start;
235: uint32_t code_end;
236: uint32_t wep_cache_start;
237: uint32_t wep_cache_end;
238: uint32_t pkt_tmplt_start;
239: uint32_t pkt_tmplt_end;
240: uint32_t fw_desc_start;
241: uint32_t fw_desc_end;
242: uint32_t memblk_start;
243: uint32_t memblk_end;
244: } __packed;
245:
246: struct acx_conf_wepopt {
247: struct acx_conf confcom;
248: uint16_t nkey;
249: uint8_t opt; /* see WEPOPT_ */
250: } __packed;
251:
252: #define WEPOPT_HDWEP 0 /* hardware WEP */
253:
254: struct acx_conf_eaddr {
255: struct acx_conf confcom;
256: uint8_t eaddr[IEEE80211_ADDR_LEN];
257: } __packed;
258:
259: struct acx_conf_regdom {
260: struct acx_conf confcom;
261: uint8_t regdom;
262: uint8_t unknown;
263: } __packed;
264:
265: struct acx_conf_antenna {
266: struct acx_conf confcom;
267: uint8_t antenna;
268: } __packed;
269:
270: struct acx_conf_fwrev {
271: struct acx_conf confcom;
272: #define ACX_FWREV_LEN 20
273: /*
274: * "Rev xx.xx.xx.xx"
275: * '\0' terminated
276: */
277: char fw_rev[ACX_FWREV_LEN];
278: uint32_t hw_id;
279: } __packed;
280:
281: struct acx_conf_nretry_long {
282: struct acx_conf confcom;
283: uint8_t nretry;
284: } __packed;
285:
286: struct acx_conf_nretry_short {
287: struct acx_conf confcom;
288: uint8_t nretry;
289: } __packed;
290:
291: struct acx_conf_msdu_lifetime {
292: struct acx_conf confcom;
293: uint32_t lifetime;
294: } __packed;
295:
296: struct acx_conf_rate_fallback {
297: struct acx_conf confcom;
298: uint8_t ratefb_enable; /* 0/1 */
299: } __packed;
300:
301: struct acx_conf_rxopt {
302: struct acx_conf confcom;
303: uint16_t opt1; /* see RXOPT1_ */
304: uint16_t opt2; /* see RXOPT2_ */
305: } __packed;
306:
307: #define RXOPT1_INCL_RXBUF_HDR 0x2000 /* rxbuf with acx_rxbuf_hdr */
308: #define RXOPT1_RECV_SSID 0x0400 /* recv frame for joined SSID */
309: #define RXOPT1_FILT_BCAST 0x0200 /* filt broadcast pkt */
310: #define RXOPT1_RECV_MCAST1 0x0100 /* recv pkt for multicast addr1 */
311: #define RXOPT1_RECV_MCAST0 0x0080 /* recv pkt for multicast addr0 */
312: #define RXOPT1_FILT_ALLMULTI 0x0040 /* filt allmulti pkt */
313: #define RXOPT1_FILT_FSSID 0x0020 /* filt frame for foreign SSID */
314: #define RXOPT1_FILT_FDEST 0x0010 /* filt frame for foreign dest addr */
315: #define RXOPT1_PROMISC 0x0008 /* promisc mode */
316: #define RXOPT1_INCL_FCS 0x0004
317: #define RXOPT1_INCL_PHYHDR 0x0000 /* XXX 0x0002 */
318:
319: #define RXOPT2_RECV_ASSOC_REQ 0x0800
320: #define RXOPT2_RECV_AUTH 0x0400
321: #define RXOPT2_RECV_BEACON 0x0200
322: #define RXOPT2_RECV_CF 0x0100
323: #define RXOPT2_RECV_CTRL 0x0080
324: #define RXOPT2_RECV_DATA 0x0040
325: #define RXOPT2_RECV_BROKEN 0x0020 /* broken frame */
326: #define RXOPT2_RECV_MGMT 0x0010
327: #define RXOPT2_RECV_PROBE_REQ 0x0008
328: #define RXOPT2_RECV_PROBE_RESP 0x0004
329: #define RXOPT2_RECV_ACK 0x0002 /* RTS/CTS/ACK */
330: #define RXOPT2_RECV_OTHER 0x0001
331:
332: struct acx_conf_wep_txkey {
333: struct acx_conf confcom;
334: uint8_t wep_txkey;
335: } __packed;
336:
337:
338: struct acx_tmplt_null_data {
339: uint16_t size;
340: struct ieee80211_frame data;
341: } __packed;
342:
343: struct acx_tmplt_probe_req {
344: uint16_t size;
345: union {
346: struct {
347: struct ieee80211_frame f;
348: uint8_t var[1];
349: } __packed u_data;
350: uint8_t u_mem[0x44];
351: } data;
352: } __packed;
353:
354: #define ACX_TMPLT_PROBE_REQ_SIZ(var_len) \
355: (sizeof(uint16_t) + sizeof(struct ieee80211_frame) + (var_len))
356:
357: struct acx_tmplt_probe_resp {
358: uint16_t size;
359: union {
360: struct {
361: struct ieee80211_frame f;
362: uint8_t time_stamp[8];
363: uint16_t beacon_intvl;
364: uint16_t cap;
365: uint8_t var[1];
366: } __packed u_data;
367: uint8_t u_mem[0x54];
368: } data;
369: } __packed;
370:
371: #define ACX_TMPLT_PROBE_RESP_SIZ(var_len) \
372: (sizeof(uint16_t) + sizeof(struct ieee80211_frame) + \
373: 8 * sizeof(uint8_t) + sizeof(uint16_t) + sizeof(uint16_t) + (var_len))
374:
375: /* XXX same as acx_tmplt_probe_resp */
376: struct acx_tmplt_beacon {
377: uint16_t size;
378: union {
379: struct {
380: struct ieee80211_frame f;
381: uint8_t time_stamp[8];
382: uint16_t beacon_intvl;
383: uint16_t cap;
384: uint8_t var[1];
385: } __packed u_data;
386: uint8_t u_mem[0x54];
387: } data;
388: } __packed;
389:
390: /* XXX C&P of ACX_TMPLT_PROVE_RESP_SIZ() */
391: #define ACX_TMPLT_BEACON_SIZ(var_len) \
392: (sizeof(uint16_t) + sizeof(struct ieee80211_frame) + \
393: 8 * sizeof(uint8_t) + sizeof(uint16_t) + sizeof(uint16_t) + (var_len))
394:
395: /* XXX do NOT belong here */
396: struct tim_head {
397: uint8_t eid;
398: uint8_t len;
399: uint8_t dtim_count;
400: uint8_t dtim_period;
401: uint8_t bitmap_ctrl;
402: } __packed;
403:
404: /* For tim_head.len (tim_head - eid - len + bitmap) */
405: #define ACX_TIM_LEN(bitmap_len) \
406: (sizeof(struct tim_head) - (2 * sizeof(uint8_t)) + (bitmap_len))
407: #define ACX_TIM_BITMAP_LEN 1
408:
409: struct acx_tmplt_tim {
410: uint16_t size;
411: union {
412: struct {
413: struct tim_head th;
414: uint8_t bitmap[1];
415: } __packed u_data;
416: uint8_t u_mem[0x100];
417: } data;
418: #define tim_eid data.u_data.th.eid
419: #define tim_len data.u_data.th.len
420: #define tim_dtim_count data.u_data.th.dtim_count
421: #define tim_dtim_period data.u_data.th.dtim_period
422: #define tim_bitmap_ctrl data.u_data.th.bitmap_ctrl
423: #define tim_bitmap data.u_data.bitmap
424: } __packed;
425:
426: #define ACX_TMPLT_TIM_SIZ(bitmap_len) \
427: (sizeof(uint16_t) + sizeof(struct tim_head) + (bitmap_len))
428:
429: #define CMDPRM_WRITE_REGION_1(sc, r, rlen) \
430: bus_space_write_region_1((sc)->sc_mem2_bt, \
431: (sc)->sc_mem2_bh, \
432: (sc)->sc_cmd_param, \
433: (const uint8_t *)(r), (rlen))
434:
435: #define CMDPRM_READ_REGION_1(sc, r, rlen) \
436: bus_space_read_region_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
437: (sc)->sc_cmd_param, (uint8_t *)(r), (rlen))
438:
439: /*
440: * This will clear previous command's
441: * execution status too
442: */
443: #define CMD_WRITE_4(sc, val) \
444: bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
445: (sc)->sc_cmd, (val))
446: #define CMD_READ_4(sc) \
447: bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (sc)->sc_cmd)
448:
449: /*
450: * acx command register layerout:
451: * upper 16bits are command execution status
452: * lower 16bits are command to be executed
453: */
454: #define ACX_CMD_STATUS_SHIFT 16
455: #define ACX_CMD_STATUS_OK 1
456:
457: struct radio_init {
458: uint32_t radio_ofs; /* radio firmware offset */
459: uint32_t radio_len; /* radio firmware length */
460: } __packed;
461:
462: struct bss_join_hdr {
463: uint8_t bssid[IEEE80211_ADDR_LEN];
464: uint16_t beacon_intvl;
465: uint8_t chip_spec[3];
466: uint8_t ndata_txrate; /* see ACX_NDATA_TXRATE_ */
467: uint8_t ndata_txopt; /* see ACX_NDATA_TXOPT_ */
468: uint8_t mode; /* see ACX_MODE_ */
469: uint8_t channel;
470: uint8_t esslen;
471: char essid[1];
472: } __packed;
473:
474: /*
475: * non-data frame tx rate
476: */
477: #define ACX_NDATA_TXRATE_2 20 /* 2Mbits/s */
478:
479: /*
480: * non-data frame tx options
481: */
482: #define ACX_NDATA_TXOPT_PBCC 0x40
483: #define ACX_NDATA_TXOPT_OFDM 0x20
484: #define ACX_NDATA_TXOPT_SHORT_PREAMBLE 0x10
485:
486: #define BSS_JOIN_BUFLEN \
487: (sizeof(struct bss_join_hdr) + IEEE80211_NWID_LEN - 1)
488: #define BSS_JOIN_PARAM_SIZE(bj) \
489: (sizeof(struct bss_join_hdr) + (bj)->esslen - 1)
490:
491:
492: #define PCIR_BAR(x) (PCI_MAPS + (x) * 4)
493:
494: #endif /* !_ACXREG_H */
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