Annotation of sys/dev/ata/satareg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: satareg.h,v 1.1 2004/10/17 17:18:06 grange Exp $ */
2: /* $NetBSD: satareg.h,v 1.3 2004/05/23 23:07:59 wiz Exp $ */
3:
4: /*-
5: * Copyright (c) 2003 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of Wasabi Systems, Inc.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: #ifndef _DEV_ATA_SATAREG_H_
41: #define _DEV_ATA_SATAREG_H_
42:
43: /*
44: * Serial ATA register definitions.
45: *
46: * Reference:
47: *
48: * Serial ATA: High Speed Serialized AT Attachment
49: * Revision 1.0 29-August-2001
50: * Serial ATA Working Group
51: */
52:
53: /*
54: * SStatus (SCR0) --
55: * Serial ATA interface status register
56: */
57: /*
58: * The DET value indicates the interface device detection and
59: * PHY state.
60: */
61: #define SStatus_DET_NODEV (0x0 << 0) /* no device connected */
62: #define SStatus_DET_DEV_NE (0x1 << 0) /* device, but PHY comm not
63: established */
64: #define SStatus_DET_DEV (0x3 << 0) /* device, PHY comm
65: established */
66: #define SStatus_DET_OFFLINE (0x4 << 0) /* PHY in offline mode */
67: #define SStatus_DET_mask (0xf << 0)
68: #define SStatus_DET_shift 0
69: /*
70: * The SPD value indicates the negotiated interface communication
71: * speed established.
72: */
73: #define SStatus_SPD_NONE (0x0 << 4) /* no negotiated speed */
74: #define SStatus_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */
75: #define SStatus_SPD_G2 (0x2 << 4) /* Generation 2 (3.0Gb/s) */
76: #define SStatus_SPD_mask (0xf << 4)
77: #define SStatus_SPD_shift 4
78: /*
79: * The IPM value indicates the current interface power managemnt
80: * state.
81: */
82: #define SStatus_IPM_NODEV (0x0 << 8) /* no device connected */
83: #define SStatus_IPM_ACTIVE (0x1 << 8) /* ACTIVE state */
84: #define SStatus_IPM_PARTIAL (0x2 << 8) /* PARTIAL pm state */
85: #define SStatus_IPM_SLUMBER (0x6 << 8) /* SLUMBER pm state */
86: #define SStatus_IPM_mask (0xf << 8)
87: #define SStatus_IPM_shift 8
88:
89: /*
90: * SError (SCR1) --
91: * Serial ATA interface error register
92: */
93: #define SError_ERR_I (1U << 0) /* Recovered data integrity
94: error */
95: #define SError_ERR_M (1U << 1) /* Recovered communications
96: error */
97: #define SError_ERR_T (1U << 8) /* Non-recovered transient
98: data integrity error */
99: #define SError_ERR_C (1U << 9) /* Non-recovered persistent
100: communication or data
101: integrity error */
102: #define SError_ERR_P (1U << 10) /* Protocol error */
103: #define SError_ERR_E (1U << 11) /* Internal error */
104: #define SError_DIAG_N (1U << 16) /* PhyRdy change */
105: #define SError_DIAG_I (1U << 17) /* PHY internal error */
106: #define SError_DIAG_W (1U << 18) /* Comm Wake */
107: #define SError_DIAG_B (1U << 19) /* 10b to 8b decode error */
108: #define SError_DIAG_D (1U << 20) /* Disparity error */
109: #define SError_DIAG_C (1U << 21) /* CRC error */
110: #define SError_DIAG_H (1U << 22) /* Handshake error */
111: #define SError_DIAG_S (1U << 23) /* Link sequence error */
112: #define SError_DIAG_T (1U << 24) /* Transport state transition
113: error */
114: #define SError_DIAG_F (1U << 25) /* Unrecognized FIS type */
115: #define SError_DIAG_X (1U << 26) /* Device Exchanged */
116:
117: /*
118: * SControl (SCR2) --
119: * Serial ATA interface control register
120: */
121: /*
122: * The DET field controls the host adapter device detection
123: * and interface initialization.
124: */
125: #define SControl_DET_NONE (0x0 << 0) /* No device detection or
126: initialization action
127: requested */
128: #define SControl_DET_INIT (0x1 << 0) /* Initialize interface
129: communication (equiv
130: of a hard reset) */
131: #define SControl_DET_DISABLE (0x4 << 0) /* disable interface and
132: take PHY offline */
133: /*
134: * The SPD field represents the highest allowed communication
135: * speed the interface is allowed to negotiate when communication
136: * is established.
137: */
138: #define SControl_SPD_ANY (0x0 << 4) /* No restrictions */
139: #define SControl_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */
140: #define SControl_SPD_G2 (0x2 << 4) /* Generation 2 (3.0Gb/s) */
141: /*
142: * The IPM field represents the enabled interface power management
143: * states that can be invoked via the Serial ATA interface power
144: * management capabilities.
145: */
146: #define SControl_IPM_ANY (0x0 << 8) /* No restrictions */
147: #define SControl_IPM_NOPARTIAL (0x1 << 8) /* PARTIAL disabled */
148: #define SControl_IPM_NOSLUMBER (0x2 << 8) /* SLUMBER disabled */
149: #define SControl_IPM_NONE (0x3 << 8) /* No power management */
150: /*
151: * The SPM field selects a power management state. A non-zero
152: * value written to this field causes initiation of the selected
153: * power management state.
154: */
155: #define SControl_SPM_PARTIAL (0x1 << 12) /* transition to PARTIAL */
156: #define SControl_SPM_SLUMBER (0x2 << 12) /* transition to SLUBMER */
157: #define SControl_SPM_ComWake (0x4 << 12) /* transition from PM */
158: /*
159: * The PMP field identifies the selected Port Multiplier Port
160: * for accessing the SActive register.
161: */
162: #define SControl_PMP(x) ((x) << 16)
163:
164: #endif /* _DEV_ATA_SATAREG_H_ */
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