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Annotation of sys/dev/ata/atareg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: atareg.h,v 1.13 2005/08/10 15:22:39 jsg Exp $ */
                      2: /*     $NetBSD: atareg.h,v 1.5 1999/01/18 20:06:24 bouyer Exp $        */
                      3:
                      4: /*
                      5:  * Copyright (c) 1998, 2001 Manuel Bouyer.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  * 3. All advertising materials mentioning features or use of this software
                     16:  *    must display the following acknowledgement:
                     17:  *     This product includes software developed by Manuel Bouyer.
                     18:  * 4. The name of the author may not be used to endorse or promote products
                     19:  *    derived from this software without specific prior written permission.
                     20:  *
                     21:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     22:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     23:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     24:  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
                     25:  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
                     26:  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
                     27:  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
                     28:  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
                     29:  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
                     30:  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
                     31:  */
                     32:
                     33: #ifndef _DEV_ATA_ATAREG_H_
                     34: #define _DEV_ATA_ATAREG_H_
                     35:
                     36: /*
                     37:  * Drive parameter structure for ATA/ATAPI.
                     38:  * Bit fields: WDC_* : common to ATA/ATAPI
                     39:  *             ATA_* : ATA only
                     40:  *             ATAPI_* : ATAPI only.
                     41:  */
                     42: struct ataparams {
                     43:     /* drive info */
                     44:     u_int16_t  atap_config;            /* 0: general configuration */
                     45: #define WDC_CFG_ATAPI_MASK             0xc000
                     46: #define WDC_CFG_ATAPI                  0x8000
                     47: #define ATA_CFG_REMOVABLE              0x0080
                     48: #define ATA_CFG_FIXED                  0x0040
                     49: #define ATAPI_CFG_TYPE_MASK            0x1f00
                     50: #define ATAPI_CFG_TYPE(x)              (((x) & ATAPI_CFG_TYPE_MASK) >> 8)
                     51: #define ATAPI_CFG_TYPE_DIRECT          0x00
                     52: #define ATAPI_CFG_TYPE_SEQUENTIAL      0x01
                     53: #define ATAPI_CFG_TYPE_CDROM           0x05
                     54: #define ATAPI_CFG_TYPE_OPTICAL         0x07
                     55: #define ATAPI_CFG_TYPE_NODEVICE                0x1F
                     56: #define ATAPI_CFG_REMOV                        0x0080
                     57: #define ATAPI_CFG_DRQ_MASK             0x0060
                     58: #define ATAPI_CFG_STD_DRQ              0x0000
                     59: #define ATAPI_CFG_IRQ_DRQ              0x0020
                     60: #define ATAPI_CFG_ACCEL_DRQ            0x0040
                     61: #define ATAPI_CFG_CMD_MASK             0x0003
                     62: #define ATAPI_CFG_CMD_12               0x0000
                     63: #define ATAPI_CFG_CMD_16               0x0001
                     64: /* words 1-9 are ATA only */
                     65:     u_int16_t  atap_cylinders;         /* 1: # of non-removable cylinders */
                     66:     u_int16_t  __reserved1;
                     67:     u_int16_t  atap_heads;             /* 3: # of heads */
                     68:     u_int16_t  __retired1[2];          /* 4-5: # of unform. bytes/track */
                     69:     u_int16_t  atap_sectors;           /* 6: # of sectors */
                     70:     u_int16_t  __retired2[3];
                     71:
                     72:     u_int8_t   atap_serial[20];        /* 10-19: serial number */
                     73:     u_int16_t  __retired3[2];
                     74:     u_int16_t  __obsolete1;
                     75:     u_int8_t   atap_revision[8];       /* 23-26: firmware revision */
                     76:     u_int8_t   atap_model[40];         /* 27-46: model number */
                     77:     u_int16_t  atap_multi;             /* 47: maximum sectors per irq (ATA) */
                     78:     u_int16_t  __reserved2;
                     79:     u_int16_t  atap_capabilities1;     /* 49: capability flags */
                     80: #define WDC_CAP_IORDY  0x0800
                     81: #define WDC_CAP_IORDY_DSBL 0x0400
                     82: #define WDC_CAP_LBA    0x0200
                     83: #define WDC_CAP_DMA    0x0100
                     84: #define ATA_CAP_STBY   0x2000
                     85: #define ATAPI_CAP_INTERL_DMA   0x8000
                     86: #define ATAPI_CAP_CMD_QUEUE    0x4000
                     87: #define ATAPI_CAP_OVERLP       0x2000
                     88: #define ATAPI_CAP_ATA_RST      0x1000
                     89:     u_int16_t  atap_capabilities2;     /* 50: capability flags (ATA) */
                     90: #if BYTE_ORDER == LITTLE_ENDIAN
                     91:     u_int8_t   __junk2;
                     92:     u_int8_t   atap_oldpiotiming;      /* 51: old PIO timing mode */
                     93:     u_int8_t   __junk3;
                     94:     u_int8_t   atap_olddmatiming;      /* 52: old DMA timing mode (ATA) */
                     95: #else
                     96:     u_int8_t   atap_oldpiotiming;      /* 51: old PIO timing mode */
                     97:     u_int8_t   __junk2;
                     98:     u_int8_t   atap_olddmatiming;      /* 52: old DMA timing mode (ATA) */
                     99:     u_int8_t   __junk3;
                    100: #endif
                    101:     u_int16_t  atap_extensions;        /* 53: extensions supported */
                    102: #define WDC_EXT_UDMA_MODES     0x0004
                    103: #define WDC_EXT_MODES          0x0002
                    104: #define WDC_EXT_GEOM           0x0001
                    105: /* words 54-62 are ATA only */
                    106:     u_int16_t  atap_curcylinders;      /* 54: current logical cylinders */
                    107:     u_int16_t  atap_curheads;          /* 55: current logical heads */
                    108:     u_int16_t  atap_cursectors;        /* 56: current logical sectors/tracks */
                    109:     u_int16_t  atap_curcapacity[2];    /* 57-58: current capacity */
                    110:     u_int16_t  atap_curmulti;          /* 59: current multi-sector setting */
                    111: #define WDC_MULTI_VALID 0x0100
                    112: #define WDC_MULTI_MASK  0x00ff
                    113:     u_int16_t  atap_capacity[2];       /* 60-61: total capacity (LBA only) */
                    114:     u_int16_t  __retired4;
                    115: #if BYTE_ORDER == LITTLE_ENDIAN
                    116:     u_int8_t   atap_dmamode_supp;      /* 63: multiword DMA mode supported */
                    117:     u_int8_t   atap_dmamode_act;       /*     multiword DMA mode active */
                    118:     u_int8_t   atap_piomode_supp;      /* 64: PIO mode supported */
                    119:     u_int8_t   __junk4;
                    120: #else
                    121:     u_int8_t   atap_dmamode_act;       /*     multiword DMA mode active */
                    122:     u_int8_t   atap_dmamode_supp;      /* 63: multiword DMA mode supported */
                    123:     u_int8_t   __junk4;
                    124:     u_int8_t   atap_piomode_supp;      /* 64: PIO mode supported */
                    125: #endif
                    126:     u_int16_t  atap_dmatiming_mimi;    /* 65: minimum DMA cycle time */
                    127:     u_int16_t  atap_dmatiming_recom;   /* 66: recommended DMA cycle time */
                    128:     u_int16_t  atap_piotiming;         /* 67: mini PIO cycle time without FC */
                    129:     u_int16_t  atap_piotiming_iordy;   /* 68: mini PIO cycle time with IORDY FC */
                    130:     u_int16_t  __reserved3[2];
                    131: /* words 71-72 are ATAPI only */
                    132:     u_int16_t  atap_pkt_br;            /* 71: time (ns) to bus release */
                    133:     u_int16_t  atap_pkt_bsyclr;        /* 72: tme to clear BSY after service */
                    134:     u_int16_t  __reserved4[2];
                    135:     u_int16_t  atap_queuedepth;        /* 75: */
                    136: #define WDC_QUEUE_DEPTH_MASK 0x1f
                    137:     u_int16_t  atap_sata_caps;         /* 76: SATA capabilities */
                    138: #define SATA_SIGNAL_GEN1       0x0002  /* SATA Gen-1 signaling speed */
                    139: #define SATA_SIGNAL_GEN2       0x0004  /* SATA Gen-2 signaling speed */
                    140: #define SATA_NATIVE_CMDQ       0x0100  /* native command queuing */
                    141: #define SATA_HOST_PWR_MGMT     0x0200  /* power management (host) */
                    142:     u_int16_t  atap_sata_reserved;     /* 77: reserved */
                    143:     u_int16_t  atap_sata_features_supp;/* 78: SATA features supported */
                    144: #define SATA_NONZERO_OFFSETS   0x0002  /* non-zero buffer offsets */
                    145: #define SATA_DMA_SETUP_AUTO    0x0004  /* DMA setup auto-activate */
                    146: #define SATA_DRIVE_PWR_MGMT    0x0008  /* power management (device) */
                    147:     u_int16_t  atap_sata_features_en;  /* 79: SATA features enabled */
                    148:     u_int16_t  atap_ata_major;         /* 80: Major version number */
                    149: #define WDC_VER_ATA1   0x0002
                    150: #define WDC_VER_ATA2   0x0004
                    151: #define WDC_VER_ATA3   0x0008
                    152: #define WDC_VER_ATA4   0x0010
                    153: #define WDC_VER_ATA5   0x0020
                    154: #define WDC_VER_ATA6   0x0040
                    155: #define WDC_VER_ATA7   0x0080
                    156: #define WDC_VER_ATA8   0x0100
                    157: #define WDC_VER_ATA9   0x0200
                    158: #define WDC_VER_ATA10  0x0400
                    159: #define WDC_VER_ATA11  0x0800
                    160: #define WDC_VER_ATA12  0x1000
                    161: #define WDC_VER_ATA13  0x2000
                    162: #define WDC_VER_ATA14  0x4000
                    163:     u_int16_t  atap_ata_minor;         /* 81: Minor version number */
                    164:     u_int16_t  atap_cmd_set1;          /* 82: command set supported */
                    165: #define WDC_CMD1_NOP   0x4000
                    166: #define WDC_CMD1_RB    0x2000
                    167: #define WDC_CMD1_WB    0x1000
                    168: #define WDC_CMD1_HPA   0x0400
                    169: #define WDC_CMD1_DVRST 0x0200
                    170: #define WDC_CMD1_SRV   0x0100
                    171: #define WDC_CMD1_RLSE  0x0080
                    172: #define WDC_CMD1_AHEAD 0x0040
                    173: #define WDC_CMD1_CACHE 0x0020
                    174: #define WDC_CMD1_PKT   0x0010
                    175: #define WDC_CMD1_PM    0x0008
                    176: #define WDC_CMD1_REMOV 0x0004
                    177: #define WDC_CMD1_SEC   0x0002
                    178: #define WDC_CMD1_SMART 0x0001
                    179:     u_int16_t  atap_cmd_set2;          /* 83: command set supported */
                    180: #define ATAPI_CMD2_FCE 0x2000 /* Flush Cache Ext supported */
                    181: #define ATAPI_CMD2_FC  0x1000 /* Flush Cache supported */
                    182: #define ATAPI_CMD2_DCO 0x0800 /* Device Configuration Overlay supported */
                    183: #define ATAPI_CMD2_48AD        0x0400 /* 48bit address supported */
                    184: #define ATAPI_CMD2_AAM 0x0200 /* Automatic Acoustic Management supported */
                    185: #define ATAPI_CMD2_SM  0x0100 /* Set Max security extension supported */
                    186: #define ATAPI_CMD2_SF  0x0040 /* Set Features subcommand required */
                    187: #define ATAPI_CMD2_PUIS        0x0020 /* Power up in standby supported */
                    188: #define WDC_CMD2_RMSN  0x0010
                    189: #define ATA_CMD2_APM   0x0008
                    190: #define ATA_CMD2_CFA   0x0004
                    191: #define ATA_CMD2_RWQ   0x0002
                    192: #define WDC_CMD2_DM    0x0001 /* Download Microcode supported */
                    193:     u_int16_t  atap_cmd_ext;           /* 84: command/features supp. ext. */
                    194: #define ATAPI_CMDE_IIUF        0x2000 /* IDLE IMMEDIATE with UNLOAD FEATURE */
                    195: #define ATAPI_CMDE_MSER        0x0004 /* Media serial number supported */
                    196: #define ATAPI_CMDE_TEST        0x0002 /* SMART self-test supported */
                    197: #define ATAPI_CMDE_SLOG        0x0001 /* SMART error logging supported */
                    198:     u_int16_t  atap_cmd1_en;           /* 85: cmd/features enabled */
                    199: /* bits are the same as atap_cmd_set1 */
                    200:     u_int16_t  atap_cmd2_en;           /* 86: cmd/features enabled */
                    201: /* bits are the same as atap_cmd_set2 */
                    202:     u_int16_t  atap_cmd_def;           /* 87: cmd/features default */
                    203: /* bits are NOT the same as atap_cmd_ext */
                    204: #if BYTE_ORDER == LITTLE_ENDIAN
                    205:     u_int8_t   atap_udmamode_supp;     /* 88: Ultra-DMA mode supported */
                    206:     u_int8_t   atap_udmamode_act;      /*     Ultra-DMA mode active */
                    207: #else
                    208:     u_int8_t   atap_udmamode_act;      /*     Ultra-DMA mode active */
                    209:     u_int8_t   atap_udmamode_supp;     /* 88: Ultra-DMA mode supported */
                    210: #endif
                    211: /* 89-92 are ATA-only */
                    212:     u_int16_t  atap_seu_time;          /* 89: Sec. Erase Unit compl. time */
                    213:     u_int16_t  atap_eseu_time;         /* 90: Enhanced SEU compl. time */
                    214:     u_int16_t  atap_apm_val;           /* 91: current APM value */
                    215:     u_int16_t  atap_mpasswd_rev;       /* 92: Master Password revision */
                    216:     u_int16_t  atap_hwreset_res;       /* 93: Hardware reset value */
                    217: #define ATA_HWRES_CBLID    0x2000  /* CBLID above Vih */
                    218: #define ATA_HWRES_D1_PDIAG 0x0800  /* Device 1 PDIAG detect OK */
                    219: #define ATA_HWRES_D1_CSEL  0x0400  /* Device 1 used CSEL for address */
                    220: #define ATA_HWRES_D1_JUMP  0x0200  /* Device 1 jumpered to address */
                    221: #define ATA_HWRES_D0_SEL   0x0040  /* Device 0 responds when Dev 1 selected */
                    222: #define ATA_HWRES_D0_DASP  0x0020  /* Device 0 DASP detect OK */
                    223: #define ATA_HWRES_D0_PDIAG 0x0010  /* Device 0 PDIAG detect OK */
                    224: #define ATA_HWRES_D0_DIAG  0x0008  /* Device 0 diag OK */
                    225: #define ATA_HWRES_D0_CSEL  0x0004  /* Device 0 used CSEL for address */
                    226: #define ATA_HWRES_D0_JUMP  0x0002  /* Device 0 jumpered to address */
                    227: #if BYTE_ORDER == LITTLE_ENDIAN
                    228:     u_int8_t   atap_acoustic_val;      /* 94: Current acoustic level */
                    229:     u_int8_t   atap_acoustic_def;      /*     recommended level */
                    230: #else
                    231:     u_int8_t   atap_acoustic_def;      /*     recommended level */
                    232:     u_int8_t   atap_acoustic_val;      /* 94: Current acoustic level */
                    233: #endif
                    234:     u_int16_t  __reserved6[5];         /* 95-99: reserved */
                    235:     u_int16_t  atap_max_lba[4];        /* 100-103: Max. user LBA add */
                    236:     u_int16_t  __reserved7[23];        /* 104-126: reserved */
                    237:     u_int16_t  atap_rmsn_supp;         /* 127: remov. media status notif. */
                    238: #define WDC_RMSN_SUPP_MASK 0x0003
                    239: #define WDC_RMSN_SUPP 0x0001
                    240:     u_int16_t  atap_sec_st;            /* 128: security status */
                    241: #define WDC_SEC_LEV_MAX        0x0100
                    242: #define WDC_SEC_ESE_SUPP 0x0020
                    243: #define WDC_SEC_EXP    0x0010
                    244: #define WDC_SEC_FROZEN 0x0008
                    245: #define WDC_SEC_LOCKED 0x0004
                    246: #define WDC_SEC_EN     0x0002
                    247: #define WDC_SEC_SUPP   0x0001
                    248:     u_int16_t  __reserved8[31];        /* 129-159: vendor specific */
                    249:     u_int16_t  atap_cfa_power;         /* 160: CFA powermode */
                    250: #define ATAPI_CFA_MAX_MASK  0x0FFF
                    251: #define ATAPI_CFA_MODE1_DIS 0x1000 /* CFA Mode 1 Disabled */
                    252: #define ATAPI_CFA_MODE1_REQ 0x2000 /* CFA Mode 1 Required */
                    253: #define ATAPI_CFA_WORD160   0x8000 /* Word 160 supported */
                    254:     u_int16_t  __reserved9[15];        /* 161-175: reserved for CFA */
                    255:     u_int8_t   atap_media_serial[60];  /* 176-205: media serial number */
                    256:     u_int16_t  __reserved10[49];       /* 206-254: reserved */
                    257: #if BYTE_ORDER == LITTLE_ENDIAN
                    258:     u_int8_t   atap_signature;         /* 255: Signature */
                    259:     u_int8_t   atap_checksum;          /*      Checksum */
                    260: #else
                    261:     u_int8_t   atap_checksum;          /*      Checksum */
                    262:     u_int8_t   atap_signature;         /* 255: Signature */
                    263: #endif
                    264: };
                    265:
                    266: #endif /* !_DEV_ATA_ATAREG_H_ */

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