Annotation of sys/arch/zaurus/zaurus/zaurus_start.S, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: zaurus_start.S,v 1.2 2005/01/02 19:43:07 drahn Exp $ */
! 2: /* $NetBSD: lubbock_start.S,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
! 6: * Written by Hiroyuki Bessho for Genetec Corporation.
! 7: *
! 8: * Redistribution and use in source and binary forms, with or without
! 9: * modification, are permitted provided that the following conditions
! 10: * are met:
! 11: * 1. Redistributions of source code must retain the above copyright
! 12: * notice, this list of conditions and the following disclaimer.
! 13: * 2. Redistributions in binary form must reproduce the above copyright
! 14: * notice, this list of conditions and the following disclaimer in the
! 15: * documentation and/or other materials provided with the distribution.
! 16: * 3. The name of Genetec Corporation may not be used to endorse or
! 17: * promote products derived from this software without specific prior
! 18: * written permission.
! 19: *
! 20: * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
! 21: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 22: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 23: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
! 24: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 25: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 26: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 27: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 28: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 29: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 30: * POSSIBILITY OF SUCH DAMAGE.
! 31: */
! 32:
! 33: #include <machine/asm.h>
! 34: #include <arm/armreg.h>
! 35: #include <arm/pte.h>
! 36: #include <arm/pmap.h> /* for PMAP_DOMAIN_KERNEL */
! 37:
! 38: #ifndef SDRAM_START
! 39: #define SDRAM_START 0xa0000000
! 40: #endif
! 41:
! 42: /*
! 43: * CPWAIT -- Canonical method to wait for CP15 update.
! 44: * NOTE: Clobbers the specified temp reg.
! 45: * copied from arm/arm/cpufunc_asm_xscale.S
! 46: * XXX: better be in a common header file.
! 47: */
! 48: #define CPWAIT_BRANCH \
! 49: sub pc, pc, #4
! 50:
! 51: #define CPWAIT(tmp) \
! 52: mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\
! 53: mov tmp, tmp /* wait for it to complete */ ;\
! 54: CPWAIT_BRANCH /* branch to next insn */
! 55:
! 56: /*
! 57: * Kernel start routine for DBPXA250 (Lubbock)
! 58: * this code is excuted at the very first after the kernel is loaded
! 59: * by RedBoot.
! 60: */
! 61: .text
! 62:
! 63: .global _C_LABEL(zaurus_start)
! 64: _C_LABEL(zaurus_start):
! 65: /* Are we running on ROM ? */
! 66: cmp pc, #0x06000000
! 67: bhi zaurus_start_ram
! 68:
! 69: /* move me to RAM
! 70: * XXX: we can use memcpy if it is PIC
! 71: */
! 72: ldr r1, Lcopy_size
! 73: adr r0, _C_LABEL(zaurus_start)
! 74: add r1, r1, #3
! 75: mov r1, r1, LSR #2
! 76: mov r2, #SDRAM_START
! 77: add r2, r2, #0x00200000
! 78: mov r4, r2
! 79:
! 80: 5: ldr r3,[r0],#4
! 81: str r3,[r2],#4
! 82: subs r1,r1,#1
! 83: bhi 5b
! 84:
! 85: cmp pc, r5
! 86: /* Jump to RAM */
! 87: ldr r0, Lstart_off
! 88:
! 89: blo 1f
! 90: /* if we were running out of virtual mapped space, disable mmu */
! 91: mov r2, #0
! 92: mov r1, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
! 93: mcr 15, 0, r1, c1, c0, 0
! 94: mcrne 15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */
! 95:
! 96: 1:
! 97: add pc, r4, r0
! 98:
! 99: Lcopy_size: .word _edata-_C_LABEL(zaurus_start)
! 100: Lstart_off: .word zaurus_start_ram-_C_LABEL(zaurus_start)
! 101:
! 102: zaurus_start_ram:
! 103: /*
! 104: * Kernel is loaded in SDRAM (0xa0200000..), and is expected to run
! 105: * in VA 0xc0200000..
! 106: */
! 107:
! 108: mrc p15, 0, r0, c2, c0, 0 /* get ttb prepared by redboot */
! 109: adr r4, mmu_init_table2
! 110:
! 111: #define BUILD_STARTUP_PAGETABLE
! 112: #ifdef BUILD_STARTUP_PAGETABLE
! 113: mrc p15, 0, r2, c1, c0, 0
! 114: mov r2, #0
! 115: tst r2, #CPU_CONTROL_MMU_ENABLE /* we already have a page table? */
! 116: bne 3f
! 117:
! 118: /* build page table from scratch */
! 119: ldr r0, Lstartup_pagetable
! 120: adr r4, mmu_init_table
! 121: b 3f
! 122:
! 123: 2:
! 124: str r3, [r0, r2]
! 125: add r2, r2, #4
! 126: add r3, r3, #(L1_S_SIZE)
! 127: adds r1, r1, #-1
! 128: bhi 2b
! 129: 3:
! 130: ldmia r4!, {r1,r2,r3} /* # of sections, PA|attr, VA */
! 131: cmp r1, #0
! 132: bne 2b
! 133: #endif
! 134:
! 135: mcr p15, 0, r0, c2, c0, 0 /* Set TTB */
! 136: mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */
! 137:
! 138: /* Set the Domain Access register. Very important! */
! 139: mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
! 140: mcr p15, 0, r0, c3, c0, 0
! 141:
! 142: /* Enable MMU */
! 143: mrc p15, 0, r0, c1, c0, 0
! 144: orr r0, r0, #CPU_CONTROL_MMU_ENABLE
! 145: mcr p15, 0, r0, c1, c0, 0
! 146: CPWAIT(r0)
! 147:
! 148: /* Jump to kernel code in TRUE VA */
! 149: adr r0, Lstart
! 150: ldr pc, [r0]
! 151:
! 152: Lstart:
! 153: .word start
! 154:
! 155: #define MMU_INIT(va,pa,n_sec,attr) \
! 156: .word n_sec ; \
! 157: .word 4*((va)>>L1_S_SHIFT) ; \
! 158: .word (pa)|(attr) ;
! 159:
! 160: #ifdef BUILD_STARTUP_PAGETABLE
! 161: #ifndef STARTUP_PAGETABLE_ADDR
! 162: #define STARTUP_PAGETABLE_ADDR 0xa0004000
! 163: #endif
! 164: Lstartup_pagetable: .word STARTUP_PAGETABLE_ADDR
! 165: mmu_init_table:
! 166: /* fill all table VA==PA */
! 167: MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
! 168: /* map SDRAM VA==PA, WT cacheable */
! 169: MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
! 170: #endif
! 171: mmu_init_table2:
! 172: /* map VA 0xc0000000..0xc3ffffff to PA 0xa0000000..0xa3ffffff */
! 173: MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
! 174:
! 175: .word 0 /* end of table */
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