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Annotation of sys/arch/vax/vxt/qscvar.h, Revision 1.1

1.1     ! nbrk        1: /*     $OpenBSD: qscvar.h,v 1.1 2006/08/27 16:55:41 miod Exp $ */
        !             2: /*
        !             3:  * Copyright (c) 2006 Miodrag Vallat.
        !             4:  *
        !             5:  * Permission to use, copy, modify, and distribute this software for any
        !             6:  * purpose with or without fee is hereby granted, provided that the above
        !             7:  * copyright notice, this permission notice, and the disclaimer below
        !             8:  * appear in all copies.
        !             9:  *
        !            10:  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
        !            11:  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
        !            12:  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
        !            13:  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
        !            14:  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
        !            15:  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
        !            16:  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
        !            17:  */
        !            18: /*
        !            19:  * Mach Operating System
        !            20:  * Copyright (c) 1993-1991 Carnegie Mellon University
        !            21:  * All Rights Reserved.
        !            22:  *
        !            23:  * Permission to use, copy, modify and distribute this software and its
        !            24:  * documentation is hereby granted, provided that both the copyright
        !            25:  * notice and this permission notice appear in all copies of the
        !            26:  * software, derivative works or modified versions, and any portions
        !            27:  * thereof, and that both notices appear in supporting documentation.
        !            28:  *
        !            29:  * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
        !            30:  * CONDITION.  CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
        !            31:  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
        !            32:  *
        !            33:  * Carnegie Mellon requests users of this software to return to
        !            34:  *
        !            35:  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
        !            36:  *  School of Computer Science
        !            37:  *  Carnegie Mellon University
        !            38:  *  Pittsburgh PA 15213-3890
        !            39:  *
        !            40:  * any improvements or extensions that they make and grant Carnegie the
        !            41:  * rights to redistribute these changes.
        !            42:  */
        !            43:
        !            44: /*
        !            45:  * Logical, per port, registers (serial functions only)
        !            46:  */
        !            47:
        !            48: #define        SC_MR           0x00    /* R/W  Mode Register */
        !            49: #define        SC_SR           0x01    /* R    Status Register */
        !            50: #define        SC_CSR          0x01    /* W    Clock Select Register */
        !            51: #define        SC_CR           0x02    /* W    Command Register */
        !            52: #define        SC_RXFIFO       0x03    /* R    Receive Holding Register */
        !            53: #define        SC_TXFIFO       0x03    /* W    Transmit Holding Register */
        !            54: #define        SC_IPCR         0x04    /* R    Input Port Change Register */
        !            55: #define        SC_ACR          0x04    /* W    Auxiliary Control Register */
        !            56: #define        SC_ISR          0x05    /* R    Interrupt Status Register */
        !            57: #define        SC_IMR          0x05    /* W    Interrupt Mask Register */
        !            58: #define        SC_OPR          0x06    /* R/W  Output Port Register */
        !            59: #define        SC_IPR          0x07    /* R    Input Port Register */
        !            60: #define        SC_IOPCR        0x07    /* W    I/O Port Control Register */
        !            61: #define        SC_LOGICAL      0x08
        !            62:
        !            63: #define        SC_NLINES       4
        !            64:
        !            65: /* saved registers */
        !            66: struct qsc_sv_reg {
        !            67:        u_int8_t        sv_mr1[SC_NLINES];
        !            68:        u_int8_t        sv_mr2[SC_NLINES];
        !            69:        u_int8_t        sv_csr[SC_NLINES];
        !            70:        u_int8_t        sv_cr[SC_NLINES];
        !            71:        u_int8_t        sv_imr[SC_NLINES / 2];
        !            72: };
        !            73:
        !            74: struct qsc_input_hook {
        !            75:        int     (*fn)(void *, int);
        !            76:        void    *arg;
        !            77: };
        !            78:
        !            79: struct qscsoftc {
        !            80:        struct device           sc_dev;
        !            81:        bus_space_tag_t         sc_iot;
        !            82:        bus_space_handle_t      sc_ioh;
        !            83:        bus_addr_t              sc_regaddr[SC_NLINES][SC_LOGICAL];
        !            84:
        !            85:        int                     sc_console;
        !            86:        int                     sc_rdy;
        !            87:
        !            88:        struct qsc_sv_reg       *sc_sv_reg;
        !            89:        struct qsc_sv_reg       sc_sv_reg_storage;
        !            90:
        !            91:        struct tty              *sc_tty[SC_NLINES];
        !            92:        u_int                   sc_swflags[SC_NLINES];
        !            93:
        !            94:        struct qsc_input_hook   sc_hook[SC_NLINES];
        !            95: };
        !            96:
        !            97: /*
        !            98:  * Line assignments on the VXT2000
        !            99:  */
        !           100:
        !           101: #define        QSC_LINE_SERIAL         0
        !           102: #define        QSC_LINE_DEAD           1
        !           103: #define        QSC_LINE_KEYBOARD       2
        !           104: #define        QSC_LINE_MOUSE          3
        !           105:
        !           106: struct qsc_attach_args {
        !           107:        u_int   qa_line;
        !           108:        int     qa_console;     /* for keyboard attachment */
        !           109:        struct qsc_input_hook *qa_hook;
        !           110: };
        !           111:
        !           112: int    qscgetc(u_int);
        !           113: void   qscputc(u_int, int);
        !           114:
        !           115: int    qsckbd_cnattach(u_int);