Annotation of sys/arch/vax/uba/uba_ibus.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: uba_ibus.c,v 1.3 2003/06/02 23:27:58 millert Exp $ */
2: /* $NetBSD: uba_ibus.c,v 1.1 1999/08/07 10:36:47 ragge Exp $ */
3: /*
4: * Copyright (c) 1996 Jonathan Stone.
5: * Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden.
6: * Copyright (c) 1982, 1986 The Regents of the University of California.
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. Neither the name of the University nor the names of its contributors
18: * may be used to endorse or promote products derived from this software
19: * without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: *
33: * @(#)uba.c 7.10 (Berkeley) 12/16/90
34: * @(#)autoconf.c 7.20 (Berkeley) 5/9/91
35: */
36:
37: #include <sys/param.h>
38: #include <sys/device.h>
39: #include <sys/systm.h>
40:
41: #define _VAX_BUS_DMA_PRIVATE
42: #include <machine/bus.h>
43: #include <machine/mtpr.h>
44: #include <machine/nexus.h>
45: #include <machine/cpu.h>
46: #include <machine/sgmap.h>
47:
48: #include <arch/vax/qbus/ubavar.h>
49:
50: #include <arch/vax/uba/uba_common.h>
51:
52: /* Some Qbus-specific defines */
53: #define QBASIZE (8192 * VAX_NBPG)
54: #define QBAMAP 0x20088000
55: #define QIOPAGE 0x20000000
56:
57: /*
58: * The Q22 bus is the main IO bus on MicroVAX II/MicroVAX III systems.
59: * It has an address space of 4MB (22 address bits), therefore the name,
60: * and is hardware compatible with all 16 and 18 bits Q-bus devices.
61: */
62: static int qba_match(struct device *, struct cfdata *, void *);
63: static void qba_attach(struct device *, struct device *, void *);
64: static void qba_beforescan(struct uba_softc*);
65: static void qba_init(struct uba_softc*);
66:
67: struct cfattach uba_ibus_ca = {
68: sizeof(struct uba_vsoftc), (cfmatch_t)qba_match, qba_attach
69: };
70:
71: extern struct vax_bus_space vax_mem_bus_space;
72:
73: int
74: qba_match(parent, vcf, aux)
75: struct device *parent;
76: struct cfdata *vcf;
77: void *aux;
78: {
79: struct bp_conf *bp = aux;
80:
81: if (strcmp(bp->type, "uba"))
82: return 0;
83:
84: return 1;
85: }
86:
87: void
88: qba_attach(parent, self, aux)
89: struct device *parent, *self;
90: void *aux;
91: {
92: struct uba_vsoftc *sc = (void *)self;
93:
94: printf(": Q22\n");
95: /*
96: * Fill in bus specific data.
97: */
98: sc->uv_sc.uh_beforescan = qba_beforescan;
99: sc->uv_sc.uh_ubainit = qba_init;
100: sc->uv_sc.uh_iot = &vax_mem_bus_space;
101: sc->uv_sc.uh_dmat = &sc->uv_dmat;
102:
103: /*
104: * Fill in variables used by the sgmap system.
105: */
106: sc->uv_size = QBASIZE; /* Size in bytes of Qbus space */
107: sc->uv_addr = QBAMAP; /* Physical address of map registers */
108:
109: uba_dma_init(sc);
110: uba_attach(&sc->uv_sc, QIOPAGE);
111: }
112:
113: /*
114: * Called when the QBA is set up; to enable DMA access from
115: * QBA devices to main memory.
116: */
117: void
118: qba_beforescan(sc)
119: struct uba_softc *sc;
120: {
121: #define QIPCR 0x1f40
122: #define Q_LMEAE 0x20
123: bus_space_write_2(sc->uh_tag, sc->uh_ioh, QIPCR, Q_LMEAE);
124: }
125:
126: void
127: qba_init(sc)
128: struct uba_softc *sc;
129: {
130: mtpr(0, PR_IUR);
131: DELAY(500000);
132: qba_beforescan(sc);
133: }
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