Annotation of sys/arch/vax/qbus/dzvar.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: dzvar.h,v 1.6 2004/07/07 23:10:46 deraadt Exp $ */
2: /* $NetBSD: dzvar.h,v 1.8 2000/06/04 02:14:12 matt Exp $ */
3: /*
4: * Copyright (c) 1996 Ken C. Wellsch. All rights reserved.
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This code is derived from software contributed to Berkeley by
9: * Ralph Campbell and Rick Macklem.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. Neither the name of the University nor the names of its contributors
20: * may be used to endorse or promote products derived from this software
21: * without specific prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33: * SUCH DAMAGE.
34: */
35:
36: /* A DZ-11 has 8 ports while a DZV/DZQ-11 has only 4. We use 8 by default */
37:
38: #define NDZLINE 8
39:
40: #define DZ_DZ 8
41: #define DZ_DZV 4
42: #define DZ_DC 4
43:
44: #define DZ_C2I(c) ((c)<<3) /* convert controller # to index */
45: #define DZ_I2C(c) ((c)>>3) /* convert minor to controller # */
46: #define DZ_PORT(u) ((u)&07) /* extract the port # */
47:
48: struct dz_softc {
49: struct device sc_dev; /* Autoconf blaha */
50: struct evcount sc_rintrcnt; /* recevive interrupt counts */
51: struct evcount sc_tintrcnt; /* transmit interrupt counts */
52: int sc_rcvec, sc_tcvec;
53: struct dz_regs sc_dr; /* reg pointers */
54: bus_space_tag_t sc_iot;
55: bus_space_handle_t sc_ioh;
56: int sc_type; /* DZ11 or DZV11? */
57: int sc_rxint; /* Receive interrupt count XXX */
58: int sc_openings; /* # of times we've been opened */
59: u_char sc_brk; /* Break asserted on some lines */
60: u_char sc_dsr; /* DSR set bits if no mdm ctrl */
61: struct dz_linestate {
62: struct dz_softc *dz_sc; /* backpointer to softc */
63: int dz_line; /* sub-driver unit number */
64: void *dz_private; /* sub-driver data pointer */
65: int (*dz_catch)(void *, int); /* Fast catch recv */
66: struct tty * dz_tty; /* what we work on */
67: #ifdef notyet
68: caddr_t dz_mem; /* pointers to clist output */
69: caddr_t dz_end; /* allowing pdma action */
70: #endif
71: } sc_dz[NDZLINE];
72: };
73:
74: void dzattach(struct dz_softc *);
75: void dzrint(void *);
76: void dzxint(void *);
77: void dzreset(struct device *);
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