Annotation of sys/arch/vax/mba/mbareg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: mbareg.h,v 1.5 2002/06/11 09:36:24 hugh Exp $ */
2: /* $NetBSD: mbareg.h,v 1.4 2000/06/04 18:04:39 ragge Exp $ */
3: /*
4: * Copyright (c) 1994 Ludd, University of Lule}, Sweden
5: * All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: * 3. All advertising materials mentioning features or use of this software
16: * must display the following acknowledgement:
17: * This product includes software developed at Ludd, University of Lule}.
18: * 4. The name of the author may not be used to endorse or promote products
19: * derived from this software without specific prior written permission
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31: */
32:
33: #ifdef notdef
34: struct mba_hack {
35: u_int pad1;
36: u_int md_ds; /* unit status */
37: u_int pad4[2];
38: u_int md_as; /* Attention summary */
39: u_int pad2;
40: u_int md_dt; /* unit type */
41: u_int pad3[25];
42: };
43:
44: struct mba_regs {
45: u_int mba_csr;
46: u_int mba_cr;
47: u_int mba_sr;
48: u_int mba_var;
49: u_int mba_bc;
50: u_int mba_dr;
51: u_int mba_smr;
52: u_int mba_car;
53: u_int utrymme[248];
54: struct mba_hack mba_md[8]; /* unit specific regs */
55: struct pte mba_map[256];
56: };
57: #endif
58:
59: #define MBA_CSR 0
60: #define MBA_CR 4
61: #define MBA_SR 8
62: #define MBA_VAR 12
63: #define MBA_BC 16
64: #define MBA_DR 20
65: #define MBA_SMR 24
66: #define MBA_CAR 28
67:
68: #define MUREG(dev,reg) (1024+(dev)*128+(reg))
69: #define MAPREG(nr) (2048+(nr)*4)
70:
71: #define MU_DS 4 /* unit status */
72: #define MU_AS 16 /* attention summary */
73: #define MU_DT 24 /* drive type */
74:
75: /*
76: * Different states which can be on massbus.
77: */
78: /* Write to mba_cr */
79: #define MBACR_IBC 0x10
80: #define MBACR_MMM 0x8
81: #define MBACR_IE 0x4
82: #define MBACR_ABORT 0x2
83: #define MBACR_INIT 0x1
84:
85: /* Read from mba_sr: */
86: #define MBASR_DTBUSY 0x80000000
87: #define MBASR_NRCONF 0x40000000
88: #define MBASR_CRD 0x20000000
89: #define MBASR_CBHUNG 0x800000
90: #define MBASR_PGE 0x80000
91: #define MBASR_NED 0x40000 /* NonExistent Drive */
92: #define MBASR_MCPE 0x20000 /* Massbuss Control Parity Error */
93: #define MBASR_ATTN 0x10000 /* Attention from Massbus */
94: #define MBASR_SPE 0x4000 /* Silo Parity Error */
95: #define MBASR_DTCMP 0x2000 /* Data Transfer CoMPleted */
96: #define MBASR_DTABT 0x1000 /* Data Transfer ABorTed */
97: #define MBASR_DLT 0x800 /* Data LaTe */
98: #define MBASR_WCKUE 0x400 /* Write check upper error */
99: #define MBASR_WCKLE 0x200 /* Write check lower error */
100: #define MBASR_MXF 0x100 /* Miss transfer fault */
101: #define MBASR_MBEXC 0x80 /* Massbuss exception */
102: #define MBASR_MDPE 0x40 /* Massbuss data parity error */
103: #define MBASR_MAPPE 0x20 /* Page frame map parity error */
104: #define MBASR_INVMAP 0x10 /* Invalid map */
105: #define MBASR_ERR_STAT 0x8 /* Error status */
106: #define MBASR_ERRC 0x4 /* Error confirmation */
107: #define MBASR_ISTIMO 0x2 /* Interface sequence timeout */
108: #define MBASR_RDTIMO 0x1 /* Read data timeout status */
109:
110: /* Definitions in mba_device md_ds */
111: #define MBADS_DPR 0x100 /* Unit present */
112:
113: /* Definitions in mba_device md_dt */
114: #define MBADT_RP04 0x10
115: #define MBADT_RP05 0x11
116: #define MBADT_RP06 0x12
117: #define MBADT_RP07 0x22
118: #define MBADT_RM02 0x15
119: #define MBADT_RM03 0x14
120: #define MBADT_RM05 0x17
121: #define MBADT_RM80 0x16
122: #define MBADT_DRQ 0x800 /* Dual ported */
123: #define MBADT_MOH 0x2000 /* Moving head device */
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