Annotation of sys/arch/vax/include/psl.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: psl.h,v 1.7 2003/06/02 23:27:57 millert Exp $ */
2: /* $NetBSD: psl.h,v 1.6 1997/06/07 12:15:28 ragge Exp $ */
3:
4: /*
5: * Rewritten for the VAX port. Based on Berkeley code. /IC
6: *
7: * Copyright (c) 1982, 1986 Regents of the University of California.
8: * All rights reserved.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. Neither the name of the University nor the names of its contributors
19: * may be used to endorse or promote products derived from this software
20: * without specific prior written permission.
21: *
22: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32: * SUCH DAMAGE.
33: *
34: * @(#)psl.h 7.2 (Berkeley) 5/4/91
35: */
36:
37: #ifndef PSL_C
38:
39: /*
40: * VAX program status longword
41: */
42:
43: #define PSL_C 0x00000001 /* carry bit */
44: #define PSL_V 0x00000002 /* overflow bit */
45: #define PSL_Z 0x00000004 /* zero bit */
46: #define PSL_N 0x00000008 /* negative bit */
47: #define PSL_T 0x00000010 /* trace enable bit */
48: #define PSL_IPL00 0x00000000 /* interrupt priority level 0 */
49: #define PSL_IPL01 0x00010000 /* interrupt priority level 1 */
50: #define PSL_IPL02 0x00020000 /* interrupt priority level 2 */
51: #define PSL_IPL03 0x00030000 /* interrupt priority level 3 */
52: #define PSL_IPL04 0x00040000 /* interrupt priority level 4 */
53: #define PSL_IPL05 0x00050000 /* interrupt priority level 5 */
54: #define PSL_IPL06 0x00060000 /* interrupt priority level 6 */
55: #define PSL_IPL07 0x00070000 /* interrupt priority level 7 */
56: #define PSL_IPL08 0x00080000 /* interrupt priority level 8 */
57: #define PSL_IPL09 0x00090000 /* interrupt priority level 9 */
58: #define PSL_IPL0A 0x000a0000 /* interrupt priority level 10 */
59: #define PSL_IPL0B 0x000b0000 /* interrupt priority level 11 */
60: #define PSL_IPL0C 0x000c0000 /* interrupt priority level 12 */
61: #define PSL_IPL0D 0x000d0000 /* interrupt priority level 13 */
62: #define PSL_IPL0E 0x000e0000 /* interrupt priority level 14 */
63: #define PSL_IPL0F 0x000f0000 /* interrupt priority level 15 */
64: #define PSL_IPL10 0x00100000 /* interrupt priority level 16 */
65: #define PSL_IPL11 0x00110000 /* interrupt priority level 17 */
66: #define PSL_IPL12 0x00120000 /* interrupt priority level 18 */
67: #define PSL_IPL13 0x00130000 /* interrupt priority level 19 */
68: #define PSL_IPL14 0x00140000 /* interrupt priority level 20 */
69: #define PSL_IPL15 0x00150000 /* interrupt priority level 21 */
70: #define PSL_IPL16 0x00160000 /* interrupt priority level 22 */
71: #define PSL_IPL17 0x00170000 /* interrupt priority level 23 */
72: #define PSL_IPL18 0x00180000 /* interrupt priority level 24 */
73: #define PSL_IPL19 0x00190000 /* interrupt priority level 25 */
74: #define PSL_IPL1A 0x001a0000 /* interrupt priority level 26 */
75: #define PSL_IPL1B 0x001b0000 /* interrupt priority level 27 */
76: #define PSL_IPL1C 0x001c0000 /* interrupt priority level 28 */
77: #define PSL_IPL1D 0x001d0000 /* interrupt priority level 29 */
78: #define PSL_IPL1E 0x001e0000 /* interrupt priority level 30 */
79: #define PSL_IPL1F 0x001f0000 /* interrupt priority level 31 */
80: #define PSL_PREVU 0x00c00000 /* Previous user mode */
81: #define PSL_K 0x00000000 /* kernel mode */
82: #define PSL_E 0x01000000 /* executive mode */
83: #define PSL_S 0x02000000 /* supervisor mode */
84: #define PSL_U 0x03000000 /* user mode */
85: #define PSL_IS 0x04000000 /* interrupt stack select */
86: #define PSL_FPD 0x08000000 /* first part done flag */
87: #define PSL_TP 0x40000000 /* trace pending */
88: #define PSL_CM 0x80000000 /* compatibility mode */
89:
90: #define PSL_LOWIPL (PSL_K)
91: #define PSL_HIGHIPL (PSL_K | PSL_IPL1F)
92: #define PSL_IPL (PSL_IPL1F)
93: #define PSL_USER (0)
94:
95: #define PSL_MBZ 0x3020ff00 /* must be zero bits */
96:
97: #define PSL_USERSET (0)
98: #define PSL_USERCLR (PSL_S | PSL_IPL1F | PSL_MBZ)
99:
100: /*
101: * Macros to decode processor status word.
102: */
103: #define CLKF_USERMODE(framep) ((((framep)->ps) & (PSL_U)) == PSL_U)
104: #define CLKF_PC(framep) ((framep)->pc)
105: #define CLKF_INTR(framep) ((((framep)->ps) & (PSL_IS)) == PSL_IS)
106: #define PSL2IPL(ps) ((ps) >> 16)
107:
108: #endif
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