Annotation of sys/arch/vax/include/nexus.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: nexus.h,v 1.13 2006/08/27 16:55:41 miod Exp $ */
2: /* $NetBSD: nexus.h,v 1.17 2000/06/04 17:58:19 ragge Exp $ */
3:
4: /*-
5: * Copyright (c) 1982, 1986 The Regents of the University of California.
6: * All rights reserved.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. Neither the name of the University nor the names of its contributors
17: * may be used to endorse or promote products derived from this software
18: * without specific prior written permission.
19: *
20: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30: * SUCH DAMAGE.
31: *
32: * @(#)nexus.h 7.3 (Berkeley) 5/9/91
33: */
34:
35: #ifndef _VAX_NEXUS_H_
36: #define _VAX_NEXUS_H_
37:
38: #include <machine/bus.h>
39:
40: struct mainbus_attach_args {
41: int maa_bustype;
42: };
43:
44: /*
45: * Values for bus (or pseudo-bus) types
46: */
47: #define VAX_SBIBUS 1 /* SBI parent (780) */
48: #define VAX_CMIBUS 2 /* CMI backplane (750) */
49: #define VAX_UNIBUS 3 /* Direct backplane (730) */
50: #define VAX_ABUS 4 /* SBI placeholder (8600) */
51: #define VAX_BIBUS 5 /* BI bus (8200) */
52: #define VAX_NBIBUS 6 /* NBI backplane (8800) */
53: #define VAX_VSBUS 7 /* Virtual vaxstation bus */
54: #define VAX_IBUS 8 /* Internal Microvax bus */
55: #define VAX_XMIBUS 9 /* XMI master bus (6000) */
56: #define VAX_VXTBUS 10 /* Pseudo VXT2000 bus */
57:
58: #define VAX_LEDS 0x42 /* pseudo value to attach led0 */
59:
60: /*
61: * Information about nexus's.
62: *
63: * Each machine has an address of backplane slots (nexi).
64: * Each nexus is some type of adapter, whose code is the low
65: * byte of the first word of the adapter address space.
66: * At boot time the system looks through the array of available
67: * slots and finds the interconnects for the machine.
68: */
69: #define IO_CMI750 2
70: #define MAXNMCR 1
71:
72: #define NNEXSBI 16
73: #if VAX8600
74: #define NNEX8600 NNEXSBI
75: #define NEXA8600 ((struct nexus *)(0x20000000))
76: #define NEXB8600 ((struct nexus *)(0x22000000))
77: #endif
78: #if VAX780
79: #define NNEX780 NNEXSBI
80: #define NEX780 ((struct nexus *)0x20000000)
81: #endif
82: #if VAX730
83: #define NNEX730 NNEXSBI
84: #define NEX730 ((struct nexus *)0xf20000)
85: #endif
86: #define NEXSIZE 0x2000
87:
88: #if VAX8600
89: #define MAXNNEXUS (2 * NNEXSBI)
90: #else
91: #define MAXNNEXUS NNEXSBI
92: #endif
93:
94: #ifdef _KERNEL
95:
96: struct nexus {
97: union nexcsr {
98: long nex_csr;
99: u_char nex_type;
100: } nexcsr;
101: long nex_pad[NEXSIZE / sizeof (long) - 1];
102: };
103:
104: struct sbi_attach_args {
105: int sa_nexnum; /* This nexus TR number */
106: int sa_type; /* This nexus type */
107: bus_space_tag_t sa_iot;
108: bus_space_handle_t sa_ioh;
109: };
110:
111: /* Memory device struct. This should be somewhere else */
112: struct mem_softc {
113: struct device sc_dev;
114: caddr_t sc_memaddr;
115: int sc_memtype;
116: int sc_memnr;
117: };
118:
119: struct bp_conf {
120: char *type;
121: int num;
122: int partyp;
123: int bp_addr;
124: };
125:
126: #endif
127:
128: /*
129: * Bits in high word of nexus's.
130: */
131: #define SBI_PARFLT (1<<31) /* sbi parity fault */
132: #define SBI_WSQFLT (1<<30) /* write sequence fault */
133: #define SBI_URDFLT (1<<29) /* unexpected read data fault */
134: #define SBI_ISQFLT (1<<28) /* interlock sequence fault */
135: #define SBI_MXTFLT (1<<27) /* multiple transmitter fault */
136: #define SBI_XMTFLT (1<<26) /* transmit fault */
137:
138: #define NEX_CFGFLT (0xfc000000)
139:
140: #ifndef _LOCORE
141: #if VAX780 || VAX8600
142: #define NEXFLT_BITS \
143: "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT"
144: #endif
145: #endif
146:
147: #define NEX_APD (1<<23) /* adaptor power down */
148: #define NEX_APU (1<<22) /* adaptor power up */
149:
150: #define MBA_OT (1<<21) /* overtemperature */
151:
152: #define UBA_UBINIT (1<<18) /* unibus init */
153: #define UBA_UBPDN (1<<17) /* unibus power down */
154: #define UBA_UBIC (1<<16) /* unibus initialization complete */
155:
156: /*
157: * Types for nex_type.
158: */
159: #define NEX_ANY 0 /* pseudo for handling 11/750 */
160: #define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */
161: #define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */
162: #define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */
163: #define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */
164: #define NEX_MBA 0x20 /* Massbus adaptor */
165: #define NEX_UBA0 0x28 /* Unibus adaptor */
166: #define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */
167: #define NEX_UBA2 0x2a
168: #define NEX_UBA3 0x2b
169: #define NEX_DR32 0x30 /* DR32 user i'face to SBI */
170: #define NEX_CI 0x38 /* CI adaptor */
171: #define NEX_MPM0 0x40 /* Multi-port mem */
172: #define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */
173: #define NEX_MPM2 0x42
174: #define NEX_MPM3 0x43
175: #define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */
176: #define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */
177: #define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */
178: #define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */
179: #define NEX_MEM64I 0x6c /* 64K chips, interleaved */
180: #define NEX_MEM256L 0x70 /* 256K chips, non-interleaved, lower */
181: #define NEX_MEM256LI 0x71 /* 256K chips, ext-interleaved, lower */
182: #define NEX_MEM256U 0x72 /* 256K chips, non-interleaved, upper */
183: #define NEX_MEM256UI 0x73 /* 256K chips, ext-interleaved, upper */
184: #define NEX_MEM256I 0x74 /* 256K chips, interleaved */
185:
186: /* Memory classes */
187: #define M_NONE 0
188: #define M780C 1
189: #define M780EL 2
190: #define M780EU 3
191:
192: /* Memory recover defines */
193: #define MCHK_PANIC -1
194: #define MCHK_RECOVERED 0
195:
196: #endif /* _VAX_NEXUS_H_ */
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