Annotation of sys/arch/vax/include/ka670.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: ka670.h,v 1.1 2000/04/26 06:08:27 bjc Exp $ */
2: /* $NetBSD: ka670.h,v 1.1 1999/06/06 14:23:46 ragge Exp $ */
3: /*
4: * Copyright (c) 1999 Ludd, University of Lule}, Sweden.
5: * All rights reserved.
6: *
7: * This code is derived from software contributed to Ludd by Bertram Barth.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. All advertising materials mentioning features or use of this software
18: * must display the following acknowledgement:
19: * This product includes software developed at Ludd, University of
20: * Lule}, Sweden and its contributors.
21: * 4. The name of the author may not be used to endorse or promote products
22: * derived from this software without specific prior written permission
23: *
24: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34: */
35:
36: /*
37: * Definitions for I/O addresses of
38: *
39: * VAX 4000/300 (KA670)
40: */
41:
42: #define KA670_SIDEX 0x20040004 /* SID extension register */
43: #define KA670_IORESET 0x20020000 /* I/O Reset register */
44:
45: #define KA670_ROM_BASE 0x20040000 /* System module ROM */
46: #define KA670_ROM_END 0x2007FFFF
47: #define KA670_ROM_SIZE 0x40000
48:
49: /*
50: * The following values refer to bits/bitfields within the 4 internal
51: * registers controlling primary cache:
52: * PR_PCTAG(124, tag-register) PR_PCIDX(125, index-register)
53: * PR_PCERR(126, error-register) PR_PCSTS(127, status-register)
54: */
55: #define KA670_PCTAG_TAG 0x1FFFF800 /* bits 11-29 */
56: #define KA670_PCTAG_PARITY 0x40000000
57: #define KA670_PCTAG_VALID 0x80000000
58:
59: #define KA670_PCIDX_INDEX 0x000007F8 /* 0x100 Q-word entries */
60:
61: #define KA670_PCERR_ADDR 0x3FFFFFFF
62:
63: #define KA670_PCS_FORCEHIT 0x00000001 /* Force hit */
64: #define KA670_PCS_ENABLE 0x00000002 /* Enable primary cache */
65: #define KA670_PCS_FLUSH 0x00000004 /* Flush cache */
66: #define KA670_PCS_REFRESH 0x00000008 /* Enable refresh */
67: #define KA670_PCS_HIT 0x00000010 /* Cache hit */
68: #define KA670_PCS_INTERRUPT 0x00000020 /* Interrupt pending */
69: #define KA670_PCS_TRAP2 0x00000040 /* Trap while trap */
70: #define KA670_PCS_TRAP1 0x00000080 /* Micro trap/machine check */
71: #define KA670_PCS_TPERR 0x00000100 /* Tag parity error */
72: #define KA670_PCS_DPERR 0x00000200 /* Dal data parity error */
73: #define KA670_PCS_PPERR 0x00000400 /* P data parity error */
74: #define KA670_PCS_BUSERR 0x00000800 /* Bus error */
75: #define KA670_PCS_BCHIT 0x00001000 /* B cache hit */
76:
77: #define KA670_PCSTS_BITS \
78: "\020\015BCHIT\014BUSERR\013PPERR\012DPERR\011TPERR\010TRAP1" \
79: "\007TRAP2\006INTR\005HIT\004REFRESH\003FLUSH\002ENABLE\001FORCEHIT"
80:
81: #define KA670_BCSTS_BITS \
82: "\020\015BCHIT\014BUSERR\013PPERR\012DPERR\011TPERR\010TRAP1" \
83: "\007TRAP2\006INTR\005HIT\004REFRESH\003FLUSH\002ENABLE\001FORCEHIT"
84:
85: /*
86: * Bits in PR_ACCS (Floating Point Accelerator Register)
87: */
88: #define KA670_ACCS_VECTOR (1<<0) /* Vector Unit Present */
89: #define KA670_ACCS_FCHIP (1<<1) /* FPU chip present */
90: #define KA670_ACCS_WEP (1<<31) /* Write Even Parity */
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