File: [local] / sys / arch / vax / include / intr.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:08:37 2008 UTC (16 years, 6 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: intr.h,v 1.8 2007/05/16 19:37:06 thib Exp $ */
/* $NetBSD: intr.h,v 1.1 1998/08/18 23:55:00 matt Exp $ */
/*
* Copyright (c) 1998 Matt Thomas.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the company nor the name of the author may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _VAX_INTR_H_
#define _VAX_INTR_H_
/* Define the various Interrupt Priority Levels */
/* Interrupt Priority Levels are not mutually exclusive. */
#define IPL_NONE 0x00
#define IPL_SOFTCLOCK 0x08
#define IPL_SOFTNET 0x0c
#define IPL_BIO 0x15 /* block I/O */
#define IPL_NET 0x15 /* network */
#define IPL_TTY 0x15 /* terminal */
#define IPL_VM 0x17 /* memory allocation */
#define IPL_AUDIO 0x15 /* audio */
#define IPL_CLOCK 0x18 /* clock */
#define IPL_STATCLOCK 0x18 /* statclock */
#define IPL_HIGH 0x1f
#define IST_UNUSABLE -1 /* interrupt cannot be used */
#define IST_NONE 0 /* none (dummy) */
#define IST_PULSE 1 /* pulsed */
#define IST_EDGE 2 /* edge-triggered */
#define IST_LEVEL 3 /* level-triggered */
#ifndef lint
#define _splset(reg) \
({ \
register int val; \
__asm __volatile ("mfpr $0x12,%0;mtpr %1,$0x12" \
: "=&g" (val) \
: "g" (reg)); \
val; \
})
#define _splraise(reg) \
({ \
register int val; \
__asm __volatile ("mfpr $0x12,%0" \
: "=&g" (val) \
: ); \
if ((reg) > val) { \
__asm __volatile ("mtpr %0,$0x12" \
: \
: "g" (reg)); \
} \
val; \
})
#define splx(reg) \
__asm __volatile ("mtpr %0,$0x12" : : "g" (reg))
#endif
#define spl0() _splset(IPL_NONE)
#define splsoftclock() _splraise(IPL_SOFTCLOCK)
#define splsoftnet() _splraise(IPL_SOFTNET)
#define splbio() _splraise(IPL_BIO)
#define splnet() _splraise(IPL_NET)
#define spltty() _splraise(IPL_TTY)
#define splvm() _splraise(IPL_VM)
#define splclock() _splraise(IPL_CLOCK)
#define splstatclock() _splraise(IPL_STATCLOCK)
#define splhigh() _splset(IPL_HIGH)
#define splsched() splhigh()
/* These are better to use when playing with VAX buses */
#define spl4() _splraise(0x14)
#define spl5() _splraise(0x15)
#define spl6() _splraise(0x16)
#define spl7() _splraise(0x17)
/* SPL asserts */
#ifdef DIAGNOSTIC
/*
* Although this function is implemented in MI code, it must be in this MD
* header because we don't want this header to include MI includes.
*/
void splassert_fail(int, int, const char *);
extern int splassert_ctl;
void splassert_check(int, const char *);
#define splassert(__wantipl) do { \
if (splassert_ctl > 0) { \
splassert_check(__wantipl, __func__); \
} \
} while (0)
#else
#define splassert(wantipl) do { /* nothing */ } while (0)
#endif
#endif /* _VAX_INTR_H */