Annotation of sys/arch/vax/include/bus.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: bus.h,v 1.9 2007/04/12 12:00:03 miod Exp $ */
2: /* $NetBSD: bus.h,v 1.14 2000/06/26 04:56:13 simonb Exp $ */
3:
4: /*-
5: * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: /*
42: * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
43: * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
44: *
45: * Redistribution and use in source and binary forms, with or without
46: * modification, are permitted provided that the following conditions
47: * are met:
48: * 1. Redistributions of source code must retain the above copyright
49: * notice, this list of conditions and the following disclaimer.
50: * 2. Redistributions in binary form must reproduce the above copyright
51: * notice, this list of conditions and the following disclaimer in the
52: * documentation and/or other materials provided with the distribution.
53: * 3. All advertising materials mentioning features or use of this software
54: * must display the following acknowledgement:
55: * This product includes software developed by Christopher G. Demetriou
56: * for the NetBSD Project.
57: * 4. The name of the author may not be used to endorse or promote products
58: * derived from this software without specific prior written permission
59: *
60: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
61: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
62: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
63: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
64: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
65: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
66: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
67: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
68: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
69: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
70: */
71:
72: #ifndef _VAX_BUS_H_
73: #define _VAX_BUS_H_
74:
75: /*
76: * Bus address and size types
77: */
78: typedef u_long bus_addr_t;
79: typedef u_long bus_size_t;
80:
81: /*
82: * Access methods for bus resources and address space.
83: */
84: typedef struct vax_bus_space *bus_space_tag_t;
85: typedef u_long bus_space_handle_t;
86:
87: struct vax_bus_space {
88: /* cookie */
89: void *vbs_cookie;
90:
91: /* mapping/unmapping */
92: int (*vbs_map)(void *, bus_addr_t, bus_size_t,
93: int, bus_space_handle_t *, int);
94: void (*vbs_unmap)(void *, bus_space_handle_t,
95: bus_size_t, int);
96: int (*vbs_subregion)(void *, bus_space_handle_t,
97: bus_size_t, bus_size_t, bus_space_handle_t *);
98:
99: /* allocation/deallocation */
100: int (*vbs_alloc)(void *, bus_addr_t, bus_addr_t,
101: bus_size_t, bus_size_t, bus_size_t, int,
102: bus_addr_t *, bus_space_handle_t *);
103: void (*vbs_free)(void *, bus_space_handle_t,
104: bus_size_t);
105: };
106:
107: /*
108: * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
109: * bus_size_t size, int flags, bus_space_handle_t *bshp);
110: *
111: * Map a region of bus space.
112: */
113:
114: #define BUS_SPACE_MAP_CACHEABLE 0x01
115: #define BUS_SPACE_MAP_LINEAR 0x02
116: #define BUS_SPACE_MAP_PREFETCHABLE 0x04
117:
118: #define bus_space_map(t, a, s, f, hp) \
119: (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1)
120: #define vax_bus_space_map_noacct(t, a, s, f, hp) \
121: (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0)
122:
123: /*
124: * int bus_space_unmap(bus_space_tag_t t,
125: * bus_space_handle_t bsh, bus_size_t size);
126: *
127: * Unmap a region of bus space.
128: */
129:
130: #define bus_space_unmap(t, h, s) \
131: (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1)
132: #define vax_bus_space_unmap_noacct(t, h, s) \
133: (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0)
134:
135: /*
136: * int bus_space_subregion(bus_space_tag_t t,
137: * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
138: * bus_space_handle_t *nbshp);
139: *
140: * Get a new handle for a subregion of an already-mapped area of bus space.
141: */
142:
143: #define bus_space_subregion(t, h, o, s, nhp) \
144: (*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (nhp))
145:
146: /*
147: * int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
148: * bus_addr_t rend, bus_size_t size, bus_size_t align,
149: * bus_size_t boundary, int flags, bus_addr_t *addrp,
150: * bus_space_handle_t *bshp);
151: *
152: * Allocate a region of bus space.
153: */
154:
155: #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
156: (*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b), \
157: (f), (ap), (hp))
158:
159: /*
160: * int bus_space_free(bus_space_tag_t t,
161: * bus_space_handle_t bsh, bus_size_t size);
162: *
163: * Free a region of bus space.
164: */
165:
166: #define bus_space_free(t, h, s) \
167: (*(t)->vbs_free)((t)->vbs_cookie, (h), (s))
168:
169: /*
170: * u_intN_t bus_space_read_N(bus_space_tag_t tag,
171: * bus_space_handle_t bsh, bus_size_t offset);
172: *
173: * Read a 1, 2, 4, or 8 byte quantity from bus space
174: * described by tag/handle/offset.
175: */
176:
177: #define bus_space_read_1(t, h, o) \
178: (*(volatile u_int8_t *)((h) + (o)))
179:
180: #define bus_space_read_2(t, h, o) \
181: (*(volatile u_int16_t *)((h) + (o)))
182:
183: #define bus_space_read_4(t, h, o) \
184: (*(volatile u_int32_t *)((h) + (o)))
185:
186: #if 0 /* Cause a link error for bus_space_read_8 */
187: #define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
188: #endif
189:
190: /*
191: * void bus_space_read_multi_N(bus_space_tag_t tag,
192: * bus_space_handle_t bsh, bus_size_t offset,
193: * u_intN_t *addr, size_t count);
194: *
195: * Read `count' 1, 2, 4, or 8 byte quantities from bus space
196: * described by tag/handle/offset and copy into buffer provided.
197: */
198: static __inline void vax_mem_read_multi_1(bus_space_tag_t,
199: bus_space_handle_t, bus_size_t, u_int8_t *, size_t);
200: static __inline void vax_mem_read_multi_2(bus_space_tag_t,
201: bus_space_handle_t, bus_size_t, u_int16_t *, size_t);
202: static __inline void vax_mem_read_multi_4(bus_space_tag_t,
203: bus_space_handle_t, bus_size_t, u_int32_t *, size_t);
204:
205: #define bus_space_read_multi_1(t, h, o, a, c) \
206: vax_mem_read_multi_1((t), (h), (o), (a), (c))
207:
208: #define bus_space_read_multi_2(t, h, o, a, c) \
209: vax_mem_read_multi_2((t), (h), (o), (a), (c))
210:
211: #define bus_space_read_multi_4(t, h, o, a, c) \
212: vax_mem_read_multi_4((t), (h), (o), (a), (c))
213:
214: #if 0 /* Cause a link error for bus_space_read_multi_8 */
215: #define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
216: #endif
217:
218: static __inline void
219: vax_mem_read_multi_1(t, h, o, a, c)
220: bus_space_tag_t t;
221: bus_space_handle_t h;
222: bus_size_t o;
223: u_int8_t *a;
224: size_t c;
225: {
226: const bus_addr_t addr = h + o;
227:
228: for (; c != 0; c--, a++)
229: *a = *(volatile u_int8_t *)(addr);
230: }
231:
232: static __inline void
233: vax_mem_read_multi_2(t, h, o, a, c)
234: bus_space_tag_t t;
235: bus_space_handle_t h;
236: bus_size_t o;
237: u_int16_t *a;
238: size_t c;
239: {
240: const bus_addr_t addr = h + o;
241:
242: for (; c != 0; c--, a++)
243: *a = *(volatile u_int16_t *)(addr);
244: }
245:
246: static __inline void
247: vax_mem_read_multi_4(t, h, o, a, c)
248: bus_space_tag_t t;
249: bus_space_handle_t h;
250: bus_size_t o;
251: u_int32_t *a;
252: size_t c;
253: {
254: const bus_addr_t addr = h + o;
255:
256: for (; c != 0; c--, a++)
257: *a = *(volatile u_int32_t *)(addr);
258: }
259:
260: /*
261: * void bus_space_read_region_N(bus_space_tag_t tag,
262: * bus_space_handle_t bsh, bus_size_t offset,
263: * u_intN_t *addr, size_t count);
264: *
265: * Read `count' 1, 2, 4, or 8 byte quantities from bus space
266: * described by tag/handle and starting at `offset' and copy into
267: * buffer provided.
268: */
269:
270: static __inline void vax_mem_read_region_1(bus_space_tag_t,
271: bus_space_handle_t, bus_size_t, u_int8_t *, size_t);
272: static __inline void vax_mem_read_region_2(bus_space_tag_t,
273: bus_space_handle_t, bus_size_t, u_int16_t *, size_t);
274: static __inline void vax_mem_read_region_4(bus_space_tag_t,
275: bus_space_handle_t, bus_size_t, u_int32_t *, size_t);
276:
277: #define bus_space_read_region_1(t, h, o, a, c) \
278: vax_mem_read_region_1((t), (h), (o), (a), (c))
279:
280: #define bus_space_read_region_2(t, h, o, a, c) \
281: vax_mem_read_region_2((t), (h), (o), (a), (c))
282:
283: #define bus_space_read_region_4(t, h, o, a, c) \
284: vax_mem_read_region_4((t), (h), (o), (a), (c))
285:
286: #if 0 /* Cause a link error for bus_space_read_region_8 */
287: #define bus_space_read_region_8 \
288: !!! bus_space_read_region_8 unimplemented !!!
289: #endif
290:
291: static __inline void
292: vax_mem_read_region_1(t, h, o, a, c)
293: bus_space_tag_t t;
294: bus_space_handle_t h;
295: bus_size_t o;
296: u_int8_t *a;
297: size_t c;
298: {
299: bus_addr_t addr = h + o;
300:
301: for (; c != 0; c--, addr++, a++)
302: *a = *(volatile u_int8_t *)(addr);
303: }
304:
305: static __inline void
306: vax_mem_read_region_2(t, h, o, a, c)
307: bus_space_tag_t t;
308: bus_space_handle_t h;
309: bus_size_t o;
310: u_int16_t *a;
311: size_t c;
312: {
313: bus_addr_t addr = h + o;
314:
315: for (; c != 0; c--, addr++, a++)
316: *a = *(volatile u_int16_t *)(addr);
317: }
318:
319: static __inline void
320: vax_mem_read_region_4(t, h, o, a, c)
321: bus_space_tag_t t;
322: bus_space_handle_t h;
323: bus_size_t o;
324: u_int32_t *a;
325: size_t c;
326: {
327: bus_addr_t addr = h + o;
328:
329: for (; c != 0; c--, addr++, a++)
330: *a = *(volatile u_int32_t *)(addr);
331: }
332:
333: /*
334: * void bus_space_write_N(bus_space_tag_t tag,
335: * bus_space_handle_t bsh, bus_size_t offset,
336: * u_intN_t value);
337: *
338: * Write the 1, 2, 4, or 8 byte value `value' to bus space
339: * described by tag/handle/offset.
340: */
341:
342: #define bus_space_write_1(t, h, o, v) \
343: ((void)(*(volatile u_int8_t *)((h) + (o)) = (v)))
344:
345: #define bus_space_write_2(t, h, o, v) \
346: ((void)(*(volatile u_int16_t *)((h) + (o)) = (v)))
347:
348: #define bus_space_write_4(t, h, o, v) \
349: ((void)(*(volatile u_int32_t *)((h) + (o)) = (v)))
350:
351: #if 0 /* Cause a link error for bus_space_write_8 */
352: #define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
353: #endif
354:
355: /*
356: * void bus_space_write_multi_N(bus_space_tag_t tag,
357: * bus_space_handle_t bsh, bus_size_t offset,
358: * const u_intN_t *addr, size_t count);
359: *
360: * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
361: * provided to bus space described by tag/handle/offset.
362: */
363: static __inline void vax_mem_write_multi_1(bus_space_tag_t,
364: bus_space_handle_t, bus_size_t, const u_int8_t *, size_t);
365: static __inline void vax_mem_write_multi_2(bus_space_tag_t,
366: bus_space_handle_t, bus_size_t, const u_int16_t *, size_t);
367: static __inline void vax_mem_write_multi_4(bus_space_tag_t,
368: bus_space_handle_t, bus_size_t, const u_int32_t *, size_t);
369:
370: #define bus_space_write_multi_1(t, h, o, a, c) \
371: vax_mem_write_multi_1((t), (h), (o), (a), (c))
372:
373: #define bus_space_write_multi_2(t, h, o, a, c) \
374: vax_mem_write_multi_2((t), (h), (o), (a), (c))
375:
376: #define bus_space_write_multi_4(t, h, o, a, c) \
377: vax_mem_write_multi_4((t), (h), (o), (a), (c))
378:
379: #if 0 /* Cause a link error for bus_space_write_multi_8 */
380: #define bus_space_write_multi_8(t, h, o, a, c) \
381: !!! bus_space_write_multi_8 unimplemented !!!
382: #endif
383:
384: static __inline void
385: vax_mem_write_multi_1(t, h, o, a, c)
386: bus_space_tag_t t;
387: bus_space_handle_t h;
388: bus_size_t o;
389: const u_int8_t *a;
390: size_t c;
391: {
392: const bus_addr_t addr = h + o;
393:
394: for (; c != 0; c--, a++)
395: *(volatile u_int8_t *)(addr) = *a;
396: }
397:
398: static __inline void
399: vax_mem_write_multi_2(t, h, o, a, c)
400: bus_space_tag_t t;
401: bus_space_handle_t h;
402: bus_size_t o;
403: const u_int16_t *a;
404: size_t c;
405: {
406: const bus_addr_t addr = h + o;
407:
408: for (; c != 0; c--, a++)
409: *(volatile u_int16_t *)(addr) = *a;
410: }
411:
412: static __inline void
413: vax_mem_write_multi_4(t, h, o, a, c)
414: bus_space_tag_t t;
415: bus_space_handle_t h;
416: bus_size_t o;
417: const u_int32_t *a;
418: size_t c;
419: {
420: const bus_addr_t addr = h + o;
421:
422: for (; c != 0; c--, a++)
423: *(volatile u_int32_t *)(addr) = *a;
424: }
425:
426: /*
427: * void bus_space_write_region_N(bus_space_tag_t tag,
428: * bus_space_handle_t bsh, bus_size_t offset,
429: * const u_intN_t *addr, size_t count);
430: *
431: * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
432: * to bus space described by tag/handle starting at `offset'.
433: */
434: static __inline void vax_mem_write_region_1(bus_space_tag_t,
435: bus_space_handle_t, bus_size_t, const u_int8_t *, size_t);
436: static __inline void vax_mem_write_region_2(bus_space_tag_t,
437: bus_space_handle_t, bus_size_t, const u_int16_t *, size_t);
438: static __inline void vax_mem_write_region_4(bus_space_tag_t,
439: bus_space_handle_t, bus_size_t, const u_int32_t *, size_t);
440:
441: #define bus_space_write_region_1(t, h, o, a, c) \
442: vax_mem_write_region_1((t), (h), (o), (a), (c))
443:
444: #define bus_space_write_region_2(t, h, o, a, c) \
445: vax_mem_write_region_2((t), (h), (o), (a), (c))
446:
447: #define bus_space_write_region_4(t, h, o, a, c) \
448: vax_mem_write_region_4((t), (h), (o), (a), (c))
449:
450: #if 0 /* Cause a link error for bus_space_write_region_8 */
451: #define bus_space_write_region_8 \
452: !!! bus_space_write_region_8 unimplemented !!!
453: #endif
454:
455: static __inline void
456: vax_mem_write_region_1(t, h, o, a, c)
457: bus_space_tag_t t;
458: bus_space_handle_t h;
459: bus_size_t o;
460: const u_int8_t *a;
461: size_t c;
462: {
463: bus_addr_t addr = h + o;
464:
465: for (; c != 0; c--, addr++, a++)
466: *(volatile u_int8_t *)(addr) = *a;
467: }
468:
469: static __inline void
470: vax_mem_write_region_2(t, h, o, a, c)
471: bus_space_tag_t t;
472: bus_space_handle_t h;
473: bus_size_t o;
474: const u_int16_t *a;
475: size_t c;
476: {
477: bus_addr_t addr = h + o;
478:
479: for (; c != 0; c--, addr++, a++)
480: *(volatile u_int16_t *)(addr) = *a;
481: }
482:
483: static __inline void
484: vax_mem_write_region_4(t, h, o, a, c)
485: bus_space_tag_t t;
486: bus_space_handle_t h;
487: bus_size_t o;
488: const u_int32_t *a;
489: size_t c;
490: {
491: bus_addr_t addr = h + o;
492:
493: for (; c != 0; c--, addr++, a++)
494: *(volatile u_int32_t *)(addr) = *a;
495: }
496:
497: /*
498: * void bus_space_set_multi_N(bus_space_tag_t tag,
499: * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
500: * size_t count);
501: *
502: * Write the 1, 2, 4, or 8 byte value `val' to bus space described
503: * by tag/handle/offset `count' times.
504: */
505:
506: static __inline void vax_mem_set_multi_1(bus_space_tag_t,
507: bus_space_handle_t, bus_size_t, u_int8_t, size_t);
508: static __inline void vax_mem_set_multi_2(bus_space_tag_t,
509: bus_space_handle_t, bus_size_t, u_int16_t, size_t);
510: static __inline void vax_mem_set_multi_4(bus_space_tag_t,
511: bus_space_handle_t, bus_size_t, u_int32_t, size_t);
512:
513: #define bus_space_set_multi_1(t, h, o, v, c) \
514: vax_mem_set_multi_1((t), (h), (o), (v), (c))
515:
516: #define bus_space_set_multi_2(t, h, o, v, c) \
517: vax_mem_set_multi_2((t), (h), (o), (v), (c))
518:
519: #define bus_space_set_multi_4(t, h, o, v, c) \
520: vax_mem_set_multi_4((t), (h), (o), (v), (c))
521:
522: static __inline void
523: vax_mem_set_multi_1(t, h, o, v, c)
524: bus_space_tag_t t;
525: bus_space_handle_t h;
526: bus_size_t o;
527: u_int8_t v;
528: size_t c;
529: {
530: bus_addr_t addr = h + o;
531:
532: while (c--)
533: *(volatile u_int8_t *)(addr) = v;
534: }
535:
536: static __inline void
537: vax_mem_set_multi_2(t, h, o, v, c)
538: bus_space_tag_t t;
539: bus_space_handle_t h;
540: bus_size_t o;
541: u_int16_t v;
542: size_t c;
543: {
544: bus_addr_t addr = h + o;
545:
546: while (c--)
547: *(volatile u_int16_t *)(addr) = v;
548: }
549:
550: static __inline void
551: vax_mem_set_multi_4(t, h, o, v, c)
552: bus_space_tag_t t;
553: bus_space_handle_t h;
554: bus_size_t o;
555: u_int32_t v;
556: size_t c;
557: {
558: bus_addr_t addr = h + o;
559:
560: while (c--)
561: *(volatile u_int32_t *)(addr) = v;
562: }
563:
564: #if 0 /* Cause a link error for bus_space_set_multi_8 */
565: #define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
566: #endif
567:
568: /*
569: * void bus_space_set_region_N(bus_space_tag_t tag,
570: * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
571: * size_t count);
572: *
573: * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
574: * by tag/handle starting at `offset'.
575: */
576:
577: static __inline void vax_mem_set_region_1(bus_space_tag_t,
578: bus_space_handle_t, bus_size_t, u_int8_t, size_t);
579: static __inline void vax_mem_set_region_2(bus_space_tag_t,
580: bus_space_handle_t, bus_size_t, u_int16_t, size_t);
581: static __inline void vax_mem_set_region_4(bus_space_tag_t,
582: bus_space_handle_t, bus_size_t, u_int32_t, size_t);
583:
584: #define bus_space_set_region_1(t, h, o, v, c) \
585: vax_mem_set_region_1((t), (h), (o), (v), (c))
586:
587: #define bus_space_set_region_2(t, h, o, v, c) \
588: vax_mem_set_region_2((t), (h), (o), (v), (c))
589:
590: #define bus_space_set_region_4(t, h, o, v, c) \
591: vax_mem_set_region_4((t), (h), (o), (v), (c))
592:
593: static __inline void
594: vax_mem_set_region_1(t, h, o, v, c)
595: bus_space_tag_t t;
596: bus_space_handle_t h;
597: bus_size_t o;
598: u_int8_t v;
599: size_t c;
600: {
601: bus_addr_t addr = h + o;
602:
603: for (; c != 0; c--, addr++)
604: *(volatile u_int8_t *)(addr) = v;
605: }
606:
607: static __inline void
608: vax_mem_set_region_2(t, h, o, v, c)
609: bus_space_tag_t t;
610: bus_space_handle_t h;
611: bus_size_t o;
612: u_int16_t v;
613: size_t c;
614: {
615: bus_addr_t addr = h + o;
616:
617: for (; c != 0; c--, addr += 2)
618: *(volatile u_int16_t *)(addr) = v;
619: }
620:
621: static __inline void
622: vax_mem_set_region_4(t, h, o, v, c)
623: bus_space_tag_t t;
624: bus_space_handle_t h;
625: bus_size_t o;
626: u_int32_t v;
627: size_t c;
628: {
629: bus_addr_t addr = h + o;
630:
631: for (; c != 0; c--, addr += 4)
632: *(volatile u_int32_t *)(addr) = v;
633: }
634:
635: #if 0 /* Cause a link error for bus_space_set_region_8 */
636: #define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!!
637: #endif
638:
639: /*
640: * void bus_space_copy_region_N(bus_space_tag_t tag,
641: * bus_space_handle_t bsh1, bus_size_t off1,
642: * bus_space_handle_t bsh2, bus_size_t off2,
643: * size_t count);
644: *
645: * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
646: * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
647: */
648:
649: static __inline void vax_mem_copy_region_1(bus_space_tag_t,
650: bus_space_handle_t, bus_size_t, bus_space_handle_t,
651: bus_size_t, size_t);
652: static __inline void vax_mem_copy_region_2(bus_space_tag_t,
653: bus_space_handle_t, bus_size_t, bus_space_handle_t,
654: bus_size_t, size_t);
655: static __inline void vax_mem_copy_region_4(bus_space_tag_t,
656: bus_space_handle_t, bus_size_t, bus_space_handle_t,
657: bus_size_t, size_t);
658:
659: #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
660: vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
661:
662: #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
663: vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
664:
665: #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
666: vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
667:
668: static __inline void
669: vax_mem_copy_region_1(t, h1, o1, h2, o2, c)
670: bus_space_tag_t t;
671: bus_space_handle_t h1;
672: bus_size_t o1;
673: bus_space_handle_t h2;
674: bus_size_t o2;
675: size_t c;
676: {
677: bus_addr_t addr1 = h1 + o1;
678: bus_addr_t addr2 = h2 + o2;
679:
680: if (addr1 >= addr2) {
681: /* src after dest: copy forward */
682: for (; c != 0; c--, addr1++, addr2++)
683: *(volatile u_int8_t *)(addr2) =
684: *(volatile u_int8_t *)(addr1);
685: } else {
686: /* dest after src: copy backwards */
687: for (addr1 += (c - 1), addr2 += (c - 1);
688: c != 0; c--, addr1--, addr2--)
689: *(volatile u_int8_t *)(addr2) =
690: *(volatile u_int8_t *)(addr1);
691: }
692: }
693:
694: static __inline void
695: vax_mem_copy_region_2(t, h1, o1, h2, o2, c)
696: bus_space_tag_t t;
697: bus_space_handle_t h1;
698: bus_size_t o1;
699: bus_space_handle_t h2;
700: bus_size_t o2;
701: size_t c;
702: {
703: bus_addr_t addr1 = h1 + o1;
704: bus_addr_t addr2 = h2 + o2;
705:
706: if (addr1 >= addr2) {
707: /* src after dest: copy forward */
708: for (; c != 0; c--, addr1 += 2, addr2 += 2)
709: *(volatile u_int16_t *)(addr2) =
710: *(volatile u_int16_t *)(addr1);
711: } else {
712: /* dest after src: copy backwards */
713: for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1);
714: c != 0; c--, addr1 -= 2, addr2 -= 2)
715: *(volatile u_int16_t *)(addr2) =
716: *(volatile u_int16_t *)(addr1);
717: }
718: }
719:
720: static __inline void
721: vax_mem_copy_region_4(t, h1, o1, h2, o2, c)
722: bus_space_tag_t t;
723: bus_space_handle_t h1;
724: bus_size_t o1;
725: bus_space_handle_t h2;
726: bus_size_t o2;
727: size_t c;
728: {
729: bus_addr_t addr1 = h1 + o1;
730: bus_addr_t addr2 = h2 + o2;
731:
732: if (addr1 >= addr2) {
733: /* src after dest: copy forward */
734: for (; c != 0; c--, addr1 += 4, addr2 += 4)
735: *(volatile u_int32_t *)(addr2) =
736: *(volatile u_int32_t *)(addr1);
737: } else {
738: /* dest after src: copy backwards */
739: for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1);
740: c != 0; c--, addr1 -= 4, addr2 -= 4)
741: *(volatile u_int32_t *)(addr2) =
742: *(volatile u_int32_t *)(addr1);
743: }
744: }
745:
746: #if 0 /* Cause a link error for bus_space_copy_8 */
747: #define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!!
748: #endif
749:
750:
751: /*
752: * Bus read/write barrier methods.
753: *
754: * void bus_space_barrier(bus_space_tag_t tag,
755: * bus_space_handle_t bsh, bus_size_t offset,
756: * bus_size_t len, int flags);
757: *
758: * Note: the vax does not currently require barriers, but we must
759: * provide the flags to MI code.
760: */
761: #define bus_space_barrier(t, h, o, l, f) \
762: ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
763: #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
764: #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
765:
766:
767: /*
768: * Flags used in various bus DMA methods.
769: */
770: #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
771: #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
772: #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
773: #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
774: #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
775: #define BUS_DMA_BUS2 0x020
776: #define BUS_DMA_BUS3 0x040
777: #define BUS_DMA_BUS4 0x080
778: #define BUS_DMA_STREAMING 0x100 /* hint: sequential, unidirectional */
779: #define BUS_DMA_READ 0x200 /* mapping is device -> memory only */
780: #define BUS_DMA_WRITE 0x400 /* mapping is memory -> device only */
781:
782: #define VAX_BUS_DMA_SPILLPAGE BUS_DMA_BUS1 /* VS4000 kludge */
783: /*
784: * Private flags stored in the DMA map.
785: */
786: #define DMAMAP_HAS_SGMAP 0x80000000 /* sgva/len are valid */
787:
788: /* Forwards needed by prototypes below. */
789: struct mbuf;
790: struct uio;
791: struct vax_sgmap;
792:
793: /*
794: * Operations performed by bus_dmamap_sync().
795: */
796: #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
797: #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
798: #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
799: #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
800:
801: /*
802: * vax_bus_t
803: *
804: * Busses supported by NetBSD/vax, used by internal
805: * utility functions. NOT TO BE USED BY MACHINE-INDEPENDENT
806: * CODE!
807: */
808: typedef enum {
809: VAX_BUS_MAINBUS,
810: VAX_BUS_SBI,
811: VAX_BUS_MASSBUS,
812: VAX_BUS_UNIBUS, /* Also handles QBUS */
813: VAX_BUS_BI,
814: VAX_BUS_XMI,
815: VAX_BUS_TURBOCHANNEL
816: } vax_bus_t;
817:
818: typedef struct vax_bus_dma_tag *bus_dma_tag_t;
819: typedef struct vax_bus_dmamap *bus_dmamap_t;
820:
821: /*
822: * bus_dma_segment_t
823: *
824: * Describes a single contiguous DMA transaction. Values
825: * are suitable for programming into DMA registers.
826: */
827: struct vax_bus_dma_segment {
828: bus_addr_t ds_addr; /* DMA address */
829: bus_size_t ds_len; /* length of transfer */
830: };
831: typedef struct vax_bus_dma_segment bus_dma_segment_t;
832:
833: struct proc;
834:
835: /*
836: * bus_dma_tag_t
837: *
838: * A machine-dependent opaque type describing the implementation of
839: * DMA for a given bus.
840: */
841: struct vax_bus_dma_tag {
842: void *_cookie; /* cookie used in the guts */
843: bus_addr_t _wbase; /* DMA window base */
844: bus_size_t _wsize; /* DMA window size */
845:
846: /*
847: * Some chipsets have a built-in boundary constraint, independent
848: * of what the device requests. This allows that boundary to
849: * be specified. If the device has a more restrictive contraint,
850: * the map will use that, otherwise this boundary will be used.
851: * This value is ignored if 0.
852: */
853: bus_size_t _boundary;
854:
855: /*
856: * A bus may have more than one SGMAP window, so SGMAP
857: * windows also get a pointer to their SGMAP state.
858: */
859: struct vax_sgmap *_sgmap;
860:
861: /*
862: * Internal-use only utility methods. NOT TO BE USED BY
863: * MACHINE-INDEPENDENT CODE!
864: */
865: bus_dma_tag_t (*_get_tag)(bus_dma_tag_t, vax_bus_t);
866:
867: /*
868: * DMA mapping methods.
869: */
870: int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
871: bus_size_t, bus_size_t, int, bus_dmamap_t *);
872: void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
873: int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
874: bus_size_t, struct proc *, int);
875: int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
876: struct mbuf *, int);
877: int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
878: struct uio *, int);
879: int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
880: bus_dma_segment_t *, int, bus_size_t, int);
881: void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
882: void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
883: bus_addr_t, bus_size_t, int);
884:
885: /*
886: * DMA memory utility functions.
887: */
888: int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
889: bus_size_t, bus_dma_segment_t *, int, int *, int);
890: void (*_dmamem_free)(bus_dma_tag_t,
891: bus_dma_segment_t *, int);
892: int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
893: int, size_t, caddr_t *, int);
894: void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
895: paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
896: int, off_t, int, int);
897: };
898:
899: #define vaxbus_dma_get_tag(t, b) \
900: (*(t)->_get_tag)(t, b)
901:
902: #define bus_dmamap_create(t, s, n, m, b, f, p) \
903: (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
904: #define bus_dmamap_destroy(t, p) \
905: (*(t)->_dmamap_destroy)((t), (p))
906: #define bus_dmamap_load(t, m, b, s, p, f) \
907: (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
908: #define bus_dmamap_load_mbuf(t, m, b, f) \
909: (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
910: #define bus_dmamap_load_uio(t, m, u, f) \
911: (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
912: #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
913: (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
914: #define bus_dmamap_unload(t, p) \
915: (*(t)->_dmamap_unload)((t), (p))
916: #define bus_dmamap_sync(t, p, o, l, ops) \
917: (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
918: #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
919: (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
920: #define bus_dmamem_free(t, sg, n) \
921: (*(t)->_dmamem_free)((t), (sg), (n))
922: #define bus_dmamem_map(t, sg, n, s, k, f) \
923: (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
924: #define bus_dmamem_unmap(t, k, s) \
925: (*(t)->_dmamem_unmap)((t), (k), (s))
926: #define bus_dmamem_mmap(t, sg, n, o, p, f) \
927: (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
928:
929: /*
930: * bus_dmamap_t
931: *
932: * Describes a DMA mapping.
933: */
934: struct vax_bus_dmamap {
935: /*
936: * PRIVATE MEMBERS: not for use by machine-independent code.
937: */
938: bus_size_t _dm_size; /* largest DMA transfer mappable */
939: int _dm_segcnt; /* number of segs this map can map */
940: bus_size_t _dm_maxsegsz; /* largest possible segment */
941: bus_size_t _dm_boundary; /* don't cross this */
942: int _dm_flags; /* misc. flags */
943:
944: /*
945: * This is used only for SGMAP-mapped DMA, but we keep it
946: * here to avoid pointless indirection.
947: */
948: int _dm_pteidx; /* PTE index */
949: int _dm_ptecnt; /* PTE count */
950: u_long _dm_sgva; /* allocated sgva */
951: bus_size_t _dm_sgvalen; /* svga length */
952:
953: /*
954: * PUBLIC MEMBERS: these are used by machine-independent code.
955: */
956: bus_size_t dm_mapsize; /* size of the mapping */
957: int dm_nsegs; /* # valid segments in mapping */
958: bus_dma_segment_t dm_segs[1]; /* segments; variable length */
959: };
960:
961: #ifdef _VAX_BUS_DMA_PRIVATE
962: int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
963: bus_size_t, int, bus_dmamap_t *);
964: void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
965:
966: int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t,
967: void *, bus_size_t, struct proc *, int);
968: int _bus_dmamap_load_mbuf(bus_dma_tag_t,
969: bus_dmamap_t, struct mbuf *, int);
970: int _bus_dmamap_load_uio(bus_dma_tag_t,
971: bus_dmamap_t, struct uio *, int);
972: int _bus_dmamap_load_raw(bus_dma_tag_t,
973: bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int);
974:
975: void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
976: void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
977: bus_size_t, int);
978:
979: int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
980: bus_size_t alignment, bus_size_t boundary,
981: bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
982: void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
983: int nsegs);
984: int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
985: int nsegs, size_t size, caddr_t *kvap, int flags);
986: void _bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva,
987: size_t size);
988: paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
989: int nsegs, off_t off, int prot, int flags);
990: #endif /* _VAX_BUS_DMA_PRIVATE */
991:
992: #endif /* _VAX_BUS_H_ */
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