Annotation of sys/arch/sparc64/stand/ofwboot/srt0.s, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: srt0.s,v 1.6 2006/07/09 19:36:57 miod Exp $ */
2: /* $NetBSD: srt0.s,v 1.1 2000/08/20 14:58:42 mrg Exp $ */
3:
4: /*
5: * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6: * Copyright (C) 1995, 1996 TooLs GmbH.
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. All advertising materials mentioning features or use of this software
18: * must display the following acknowledgement:
19: * This product includes software developed by TooLs GmbH.
20: * 4. The name of TooLs GmbH may not be used to endorse or promote products
21: * derived from this software without specific prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26: * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27: * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28: * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29: * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30: * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31: * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32: * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33: */
34:
35: #include <machine/psl.h>
36: #include <machine/param.h>
37: #include <machine/frame.h>
38: #include <machine/asm.h>
39:
40: /*
41: * Globals
42: */
43: .globl _esym
44: .data
45: _esym: .word 0 /* end of symbol table */
46: .globl _C_LABEL(romp)
47: .align 8
48: .register %g2, #scratch
49: .register %g3, #scratch
50: _C_LABEL(romp): .xword 0 /* openfirmware entry point */
51:
52: /*
53: * Startup entry
54: */
55: .text
56: .globl _start, _C_LABEL(kernel_text)
57: _C_LABEL(kernel_text) = _start
58: _start:
59: nop ! For some reason this is needed to fixup the text section
60:
61: /*
62: * Step 1: Save rom entry pointer -- NOTE this probably needs to change
63: */
64:
65: mov %o4, %g7 ! save prom vector pointer
66: set _C_LABEL(romp), %g1
67: stx %o4, [%g1] ! It's initialized data, I hope
68:
69: /*
70: * Start by creating a stack for ourselves.
71: */
72: /* 64-bit stack */
73: btst 1, %sp
74: set CC64FSZ, %g1 ! Frame Size (negative)
75: bnz 1f
76: set BIAS, %g2 ! Bias (negative)
77: andn %sp, 0x0f, %sp ! 16 byte align, per ELF spec.
78: add %g1, %g2, %g1 ! Frame + Bias
79: 1:
80: sub %sp, %g1, %g1
81: save %g1, %g0, %sp
82:
83: ! mov %i0, %i4 ! Apparently we get our CIF in i0
84:
85: /*
86: * Set the psr into a known state:
87: * Set supervisor mode, interrupt level >= 13, traps enabled
88: */
89: wrpr %g0, 0, %pil ! So I lied
90: wrpr %g0, PSTATE_PRIV+PSTATE_IE, %pstate
91:
92: clr %g4 ! Point %g4 to start of data segment
93: ! only problem is that apparently the
94: ! start of the data segment is 0
95:
96: /*
97: * XXXXXXXX Need to determine what params are passed
98: */
99: call _C_LABEL(setup)
100: nop
101: mov %i1, %o1
102: call _C_LABEL(main)
103: mov %i2, %o0
104: call _C_LABEL(exit)
105: nop
106: call _C_LABEL(_rtt)
107: nop
108:
109: /*
110: * void syncicache(void *start, int size)
111: *
112: * I$ flush. Really simple. Just flush over the whole range.
113: */
114: .align 8
115: .globl _C_LABEL(syncicache)
116: _C_LABEL(syncicache):
117: dec 4, %o1
118: flush %o0
119: brgz,a,pt %o1, _C_LABEL(syncicache)
120: inc 4, %o0
121: retl
122: nop
123:
124: /*
125: * openfirmware(cell* param);
126: *
127: * OpenFirmware entry point
128: *
129: * If we're running in 32-bit mode we need to convert to a 64-bit stack
130: * and 64-bit cells. The cells we'll allocate off the stack for simplicity.
131: */
132: .align 8
133: .globl _C_LABEL(openfirmware)
134: .proc 1
135: FTYPE(openfirmware)
136: _C_LABEL(openfirmware):
137: andcc %sp, 1, %g0
138: bz,pt %icc, 1f
139: sethi %hi(_C_LABEL(romp)), %o1
140:
141: ldx [%o1+%lo(_C_LABEL(romp))], %o4 ! v9 stack, just load the addr and callit
142: save %sp, -CC64FSZ, %sp
143: mov %i0, %o0 ! Copy over our parameter
144: mov %g1, %l1
145: mov %g2, %l2
146: mov %g3, %l3
147: mov %g4, %l4
148: mov %g5, %l5
149: mov %g6, %l6
150: mov %g7, %l7
151: rdpr %pstate, %l0
152: jmpl %i4, %o7
153: wrpr %g0, PSTATE_PROM|PSTATE_IE, %pstate
154: wrpr %l0, %g0, %pstate
155: mov %l1, %g1
156: mov %l2, %g2
157: mov %l3, %g3
158: mov %l4, %g4
159: mov %l5, %g5
160: mov %l6, %g6
161: mov %l7, %g7
162: ret
163: restore %o0, %g0, %o0
164:
165: 1: ! v8 -- need to screw with stack & params
166: save %sp, -CC64FSZ, %sp ! Get a new 64-bit stack frame
167: add %sp, -BIAS, %sp
168: sethi %hi(_C_LABEL(romp)), %o1
169: rdpr %pstate, %l0
170: ldx [%o1+%lo(_C_LABEL(romp))], %o1 ! Do the actual call
171: srl %sp, 0, %sp
172: mov %i0, %o0
173: mov %g1, %l1
174: mov %g2, %l2
175: mov %g3, %l3
176: mov %g4, %l4
177: mov %g5, %l5
178: mov %g6, %l6
179: mov %g7, %l7
180: jmpl %o1, %o7
181: wrpr %g0, PSTATE_PROM|PSTATE_IE, %pstate ! Enable 64-bit addresses for the prom
182: wrpr %l0, 0, %pstate
183: mov %l1, %g1
184: mov %l2, %g2
185: mov %l3, %g3
186: mov %l4, %g4
187: mov %l5, %g5
188: mov %l6, %g6
189: mov %l7, %g7
190: ret
191: restore %o0, %g0, %o0
192:
193: #if 0
194: .data
195: .align 8
196: bootstack:
197: #define STACK_SIZE 0x14000
198: .skip STACK_SIZE
199: ebootstack: ! end (top) of boot stack
200: #endif
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