Return to timerreg.h CVS log

Up to [local] / sys / arch / sparc64 / sparc64

Annotation of sys/arch/sparc64/sparc64/timerreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: timerreg.h,v 1.5 2007/05/29 09:54:23 sobrado Exp $    */
                      2: /*     $NetBSD: timerreg.h,v 1.3 1999/06/05 05:10:01 mrg Exp $ */
                      3:
                      4: /*
                      5:  * Copyright (c) 1992, 1993
                      6:  *     The Regents of the University of California.  All rights reserved.
                      7:  *
                      8:  * This software was developed by the Computer Systems Engineering group
                      9:  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
                     10:  * contributed to Berkeley.
                     11:  *
                     12:  * All advertising materials mentioning features or use of this software
                     13:  * must display the following acknowledgement:
                     14:  *     This product includes software developed by the University of
                     15:  *     California, Lawrence Berkeley Laboratory.
                     16:  *
                     17:  * Redistribution and use in source and binary forms, with or without
                     18:  * modification, are permitted provided that the following conditions
                     19:  * are met:
                     20:  * 1. Redistributions of source code must retain the above copyright
                     21:  *    notice, this list of conditions and the following disclaimer.
                     22:  * 2. Redistributions in binary form must reproduce the above copyright
                     23:  *    notice, this list of conditions and the following disclaimer in the
                     24:  *    documentation and/or other materials provided with the distribution.
                     25:  * 3. Neither the name of the University nor the names of its contributors
                     26:  *    may be used to endorse or promote products derived from this software
                     27:  *    without specific prior written permission.
                     28:  *
                     29:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
                     30:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
                     31:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
                     32:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
                     33:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
                     34:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
                     35:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     36:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
                     37:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
                     38:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     39:  * SUCH DAMAGE.
                     40:  *
                     41:  *     @(#)timerreg.h  8.1 (Berkeley) 6/11/93
                     42:  */
                     43:
                     44: /*
                     45:  * These timers work in a rather peculiar fashion.  Most clock counters
                     46:  * run to 0 (as, e.g., on the VAX, where the ICR counts up to 0 from a
                     47:  * large unsigned number).  On the Sun-4c, it counts up to a limit.  But
                     48:  * for some reason, when it reaches the limit, it resets to 1, not 0.
                     49:  * Thus, if the limit is set to 4, the counter counts like this:
                     50:  *
                     51:  *     1, 2, 3, 1, 2, 3, ...
                     52:  *
                     53:  * and if we want to divide by N we must set the limit register to N+1.
                     54:  *
                     55:  * Sun-4u counters/timer are similar but:
                     56:  *
                     57:  *     - the registers have been shuffled around once again.  We need
                     58:  *       to use offsets from the 3 addresses the ROM provides us.
                     59:  *     - The counters are 29 bits wide with 1us accuracy.
                     60:  *     - You can make them do funky things with the limit register
                     61:  *     - They have standard 64-bit SBus control registers.
                     62:  *
                     63:  * There is a problem on the Ultra5 and Ultra10.  As the PCI controller
                     64:  * doesn't include the timer, there are no `counter-timer' nodes here
                     65:  * and so we must use %tick.
                     66:  */
                     67: #ifndef _LOCORE
                     68: struct timer_4u {
                     69:        volatile int64_t t_count;               /* counter reg */
                     70:        volatile int64_t t_limit;               /* limit reg */
                     71:
                     72: #define TMR_LIM_IEN            0x80000000      /* interrupt enable bit */
                     73: #define TMR_LIM_RELOAD         0x40000000      /* reload counter to 0 */
                     74: #define TMR_LIM_PERIODIC       0x20000000      /* reset at limit */
                     75: #define TMR_LIM_MASK           0x1fffffff
                     76: };
                     77:
                     78: struct timerreg_4u {
                     79:        struct timer_4u         *t_timer;       /* There are two of them. */
                     80:        volatile int64_t        *t_clrintr;     /* There are two of these. */
                     81:        volatile int64_t        *t_mapintr;     /* Same here. */
                     82: };
                     83:
                     84: #endif /* _LOCORE */
                     85:
                     86: /* Compute a limit that causes the timer to fire every n microseconds. */
                     87: #define        tmr_ustolim(n)  (((n) - 1) & TMR_LIM_MASK)