Annotation of sys/arch/sparc64/include/z8530var.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: z8530var.h,v 1.7 2005/12/28 22:39:52 miod Exp $ */
2: /* $NetBSD: z8530var.h,v 1.4 2000/11/08 23:41:42 eeh Exp $ */
3:
4: /*
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This software was developed by the Computer Systems Engineering group
9: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10: * contributed to Berkeley.
11: *
12: * All advertising materials mentioning features or use of this software
13: * must display the following acknowledgement:
14: * This product includes software developed by the University of
15: * California, Lawrence Berkeley Laboratory.
16: *
17: * Redistribution and use in source and binary forms, with or without
18: * modification, are permitted provided that the following conditions
19: * are met:
20: * 1. Redistributions of source code must retain the above copyright
21: * notice, this list of conditions and the following disclaimer.
22: * 2. Redistributions in binary form must reproduce the above copyright
23: * notice, this list of conditions and the following disclaimer in the
24: * documentation and/or other materials provided with the distribution.
25: * 3. Neither the name of the University nor the names of its contributors
26: * may be used to endorse or promote products derived from this software
27: * without specific prior written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39: * SUCH DAMAGE.
40: *
41: * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
42: */
43:
44: #include <machine/bus.h>
45: #include <sparc64/dev/z8530sc.h>
46:
47: struct zsc_softc {
48: struct device zsc_dev; /* base device */
49: bus_space_tag_t zsc_bustag; /* bus space/dma tags */
50: bus_dma_tag_t zsc_dmatag;
51: struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */
52:
53: /* Machine-dependent part follows... */
54: void *zsc_softintr;
55: int zsc_promunit; /* PROM's view of zs devices */
56: int zsc_node; /* PROM node, if any */
57: struct zs_chanstate zsc_cs_store[2];
58: };
59:
60: /*
61: * Functions to read and write individual registers in a channel.
62: * The ZS chip requires a 1.6 uSec. recovery time between accesses.
63: * On the SparcStation the recovery time is handled in hardware.
64: * On the older Sun4 machine it isn't, and software must do it.
65: *
66: * However, it *is* a problem on some Sun4m's (i.e. the SS20) (XXX: why?).
67: * Thus we leave in the delay (done in the functions below).
68: * XXX: (ABB) Think about this more.
69: *
70: * The functions below could be macros instead if we are concerned
71: * about the function call overhead where ZS_DELAY does nothing.
72: */
73:
74: u_char zs_read_reg(struct zs_chanstate *cs, u_char reg);
75: u_char zs_read_csr(struct zs_chanstate *cs);
76: u_char zs_read_data(struct zs_chanstate *cs);
77:
78: void zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val);
79: void zs_write_csr(struct zs_chanstate *cs, u_char val);
80: void zs_write_data(struct zs_chanstate *cs, u_char val);
81:
82: /* The sparc has splzs() in psl.h */
83:
84: /* We want to call it "zs" instead of "zsc" (sigh). */
85: #ifndef ZSCCF_CHANNEL
86: #define ZSCCF_CHANNEL 0
87: #define ZSCCF_CHANNEL_DEFAULT -1
88: #endif
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