Annotation of sys/arch/sparc64/include/pci_machdep.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: pci_machdep.h,v 1.17 2007/08/04 16:39:15 kettenis Exp $ */
2: /* $NetBSD: pci_machdep.h,v 1.7 2001/07/20 00:07:14 eeh Exp $ */
3:
4: /*
5: * Copyright (c) 1999 Matthew R. Green
6: * All rights reserved.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. The name of the author may not be used to endorse or promote products
17: * derived from this software without specific prior written permission.
18: *
19: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24: * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25: * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
26: * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27: * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29: * SUCH DAMAGE.
30: */
31:
32: #ifndef _MACHINE_PCI_MACHDEP_H_
33: #define _MACHINE_PCI_MACHDEP_H_
34:
35: /*
36: * Forward declarations.
37: */
38: struct pci_attach_args;
39:
40: /*
41: * define some bits used to glue into the common PCI code.
42: */
43:
44: typedef struct sparc_pci_chipset *pci_chipset_tag_t;
45: typedef u_int pci_intr_handle_t;
46:
47: /*
48: * The stuuuuuuupid allegedly MI PCI code expects pcitag_t to be a
49: * scalar type. But we really need to store both the OFW node and
50: * the bus/device/function info in it. (We'd like to store more,
51: * like all the ofw properties, but we don't need to.) Luckily,
52: * both are 32-bit values, so we can squeeze them into a u_int64_t
53: * with a little help from some macros.
54: */
55:
56: #define PCITAG_NODE(x) (int)(((x)>>32)&0xffffffff)
57: #define PCITAG_OFFSET(x) ((x)&0xffffffff)
58: #define PCITAG_BUS(t) ((PCITAG_OFFSET(t)>>16)&0xff)
59: #define PCITAG_DEV(t) ((PCITAG_OFFSET(t)>>11)&0x1f)
60: #define PCITAG_FUN(t) ((PCITAG_OFFSET(t)>>8)&0x7)
61: #define PCITAG_CREATE(n,b,d,f) (((u_int64_t)(n)<<32)|((b)<<16)|((d)<<11)|((f)<<8))
62: #define PCITAG_SETNODE(t,n) ((t)&0xffffffff)|(((n)<<32)
63: typedef u_int64_t pcitag_t;
64:
65: struct sparc_pci_chipset {
66: void *cookie;
67: bus_space_tag_t bustag;
68: bus_space_handle_t bushandle;
69: int rootnode; /* PCI controller */
70: int tagshift;
71: int (*intr_map)(struct pci_attach_args *, pci_intr_handle_t *);
72: };
73:
74: void pci_attach_hook(struct device *, struct device *,
75: struct pcibus_attach_args *);
76: int pci_bus_maxdevs(pci_chipset_tag_t, int);
77: pcitag_t pci_make_tag(pci_chipset_tag_t, int, int, int);
78: void pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
79: int *);
80: pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
81: void pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
82: pcireg_t);
83: int pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
84: int pci_intr_line(pci_intr_handle_t);
85: const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
86: void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
87: int, int (*)(void *), void *, char *);
88: void pci_intr_disestablish(pci_chipset_tag_t, void *);
89:
90: int sparc64_pci_enumerate_bus(struct pci_softc *,
91: int (*match)(struct pci_attach_args *),
92: struct pci_attach_args *);
93:
94: #define PCI_MACHDEP_ENUMERATE_BUS sparc64_pci_enumerate_bus
95:
96: #define pciide_machdep_compat_intr_establish(a, b, c, d, e) (NULL)
97: #define pciide_machdep_compat_intr_disestablish(a, b) do { } while (0)
98:
99: #endif /* _MACHINE_PCI_MACHDEP_H_ */
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