Annotation of sys/arch/sparc64/include/param.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: param.h,v 1.27 2007/07/24 15:45:10 kettenis Exp $ */
2: /* $NetBSD: param.h,v 1.25 2001/05/30 12:28:51 mrg Exp $ */
3:
4: /*
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This software was developed by the Computer Systems Engineering group
9: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10: * contributed to Berkeley.
11: *
12: * All advertising materials mentioning features or use of this software
13: * must display the following acknowledgement:
14: * This product includes software developed by the University of
15: * California, Lawrence Berkeley Laboratory.
16: *
17: * Redistribution and use in source and binary forms, with or without
18: * modification, are permitted provided that the following conditions
19: * are met:
20: * 1. Redistributions of source code must retain the above copyright
21: * notice, this list of conditions and the following disclaimer.
22: * 2. Redistributions in binary form must reproduce the above copyright
23: * notice, this list of conditions and the following disclaimer in the
24: * documentation and/or other materials provided with the distribution.
25: * 3. Neither the name of the University nor the names of its contributors
26: * may be used to endorse or promote products derived from this software
27: * without specific prior written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39: * SUCH DAMAGE.
40: *
41: * @(#)param.h 8.1 (Berkeley) 6/11/93
42: */
43:
44: /*
45: * Copyright (c) 1996-1999 Eduardo Horvath
46: *
47: * Redistribution and use in source and binary forms, with or without
48: * modification, are permitted provided that the following conditions
49: * are met:
50: * 1. Redistributions of source code must retain the above copyright
51: * notice, this list of conditions and the following disclaimer.
52: *
53: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
54: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
57: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63: * SUCH DAMAGE.
64: *
65: */
66:
67: #ifndef _SPARC64_PARAM_H_
68: #define _SPARC64_PARAM_H_
69:
70: #define _MACHINE sparc64
71: #define MACHINE "sparc64"
72: #define _MACHINE_ARCH sparc64
73: #define MACHINE_ARCH "sparc64"
74: #define MID_MACHINE MID_SPARC64
75:
76: #ifdef _KERNEL /* XXX */
77: #ifndef _LOCORE /* XXX */
78: #include <machine/cpu.h> /* XXX */
79: #endif /* XXX */
80: #endif /* XXX */
81:
82: /*
83: * Round p (pointer or byte index) up to a correctly-aligned value for
84: * the machine's strictest data type. The result is u_int and must be
85: * cast to any desired pointer type.
86: *
87: * ALIGNED_POINTER is a boolean macro that checks whether an address
88: * is valid to fetch data elements of type t from on this architecture.
89: * This does not reflect the optimal alignment, just the possibility
90: * (within reasonable limits).
91: *
92: */
93: #define ALIGNBYTES 0xf
94: #define ALIGN(p) (((u_long)(p) + ALIGNBYTES) & ~ALIGNBYTES)
95: #define ALIGNED_POINTER(p,t) ((((u_long)(p)) & (sizeof(t)-1)) == 0)
96:
97: #define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */
98: #define DEV_BSIZE (1 << DEV_BSHIFT)
99: #define BLKDEV_IOSIZE 2048
100: #define MAXPHYS (64 * 1024)
101:
102: /* We get stack overflows w/8K stacks in 64-bit mode */
103: #define UPAGES 2 /* initial stack size in pages */
104: #define USPACE (UPAGES*8192)
105: #define USPACE_ALIGN (0) /* u-area alignment 0-none */
106:
107:
108: /*
109: * Here are all the magic kernel virtual addresses and how they're allocated.
110: *
111: * First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to
112: * 0x00000000f0100000. It also uses some space around 0x00000000fff00000 to
113: * map in device registers. The rest is pretty much ours to play with.
114: *
115: * The kernel starts at KERNBASE. Here's the layout. We use macros to set
116: * the addresses so we can relocate everything easily. We use 4MB locked TTEs
117: * to map in the kernel text and data segments. Any extra pages are recycled,
118: * so they can potentially be double-mapped. This shouldn't really be a
119: * problem since they're unused, but wild pointers can cause silent data
120: * corruption if they are in those segments.
121: *
122: * 0x0000000000000000: 64K NFO page zero
123: * 0x0000000000010000: Userland or PROM
124: * KERNBASE: 4MB kernel text and read only data
125: * This is mapped in the ITLB and
126: * Read-Only in the DTLB
127: * KERNBASE+0x400000: 4MB kernel data and BSS -- not in ITLB
128: * Contains context table, kernel pmap,
129: * and other important structures.
130: * KERNBASE+0x800000: Unmapped page -- redzone
131: * KERNBASE+0x802000: Process 0 stack and u-area
132: * KERNBASE+0x806000: 2 pages for pmap_copy_page and /dev/mem
133: * KERNBASE+0x80a000: Start of kernel VA segment
134: * KERNEND: End of kernel VA segment
135: * KERNEND+0x02000: Auxreg_va (unused?)
136: * KERNEND+0x04000: TMPMAP_VA (unused?)
137: * KERNEND+0x06000: message buffer.
138: * KERNEND+0x010000: 64K locked TTE -- different for each CPU
139: * Contains interrupt stack, cpu_info structure,
140: * and 32KB kernel TSB.
141: *
142: */
143: #define KERNBASE 0x001000000 /* start of kernel virtual space */
144: #define KERNEND 0x0e0000000 /* end of kernel virtual space */
145: #define VM_MAX_KERNEL_BUF ((KERNEND-KERNBASE)/4)
146:
147: #define _MAXNBPG 8192 /* fixed VAs, independent of actual NBPG */
148:
149: #define AUXREG_VA ( KERNEND + _MAXNBPG) /* 1 page REDZONE */
150: #define TMPMAP_VA ( AUXREG_VA + _MAXNBPG)
151: #define MSGBUF_VA ( TMPMAP_VA + _MAXNBPG)
152: /*
153: * Here's the location of the interrupt stack and CPU structure.
154: */
155: #define INTSTACK ( KERNEND + 8*_MAXNBPG)/* 64K after kernel end */
156: #define EINTSTACK ( INTSTACK + 2*USPACE) /* 32KB */
157: #define CPUINFO_VA ( EINTSTACK)
158:
159: /*
160: * Constants related to network buffer management.
161: */
162: #define NMBCLUSTERS 4096 /* map size, max cluster allocation */
163:
164: #define MSGBUFSIZE NBPG
165:
166: /*
167: * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
168: * logical pages.
169: */
170: #define NKMEMPAGES_MIN_DEFAULT ((8 * 1024 * 1024) >> PAGE_SHIFT)
171: #define NKMEMPAGES_MAX_DEFAULT ((128 * 1024 * 1024) >> PAGE_SHIFT)
172:
173: /* pages ("clicks") to disk blocks */
174: #define ctod(x) ((x) << (PGSHIFT - DEV_BSHIFT))
175: #define dtoc(x) ((x) >> (PGSHIFT - DEV_BSHIFT))
176:
177: /* pages to bytes */
178: #define ctob(x) ((x) << PGSHIFT)
179: #define btoc(x) (((vsize_t)(x) + PGOFSET) >> PGSHIFT)
180:
181: /* bytes to disk blocks */
182: #define btodb(x) ((x) >> DEV_BSHIFT)
183: #define dbtob(x) ((x) << DEV_BSHIFT)
184:
185: /*
186: * dvmamap manages a range of DVMA addresses intended to create double
187: * mappings of physical memory. In a way, `dvmamap' is a submap of the
188: * VM map `phys_map'. The difference is the use of the `resource map'
189: * routines to manage page allocation, allowing DVMA addresses to be
190: * allocated and freed from within interrupt routines.
191: *
192: * Note that `phys_map' can still be used to allocate memory-backed pages
193: * in DVMA space.
194: */
195: #ifdef _KERNEL
196: #ifndef _LOCORE
197:
198: extern void delay(unsigned int);
199: #define DELAY(n) delay(n)
200:
201: #endif /* _LOCORE */
202: #endif /* _KERNEL */
203:
204: /*
205: * Values for the cputyp variable.
206: */
207: #define CPU_SUN4 0
208: #define CPU_SUN4C 1
209: #define CPU_SUN4M 2
210: #define CPU_SUN4U 3
211:
212: /*
213: * On a sun4u machine, the page size is 8192.
214: */
215:
216: #define NBPG 8192 /* bytes/page */
217: #define PGOFSET (NBPG-1) /* byte offset into page */
218: #define PGSHIFT 13 /* log2(NBPG) */
219:
220: #define PAGE_SHIFT 13
221: #define PAGE_SIZE (1 << PAGE_SHIFT)
222: #define PAGE_MASK (PAGE_SIZE - 1)
223:
224: #endif /* _SPARC64_PARAM_H_ */
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