Annotation of sys/arch/sparc64/dev/z8530sc.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: z8530sc.h,v 1.4 2003/06/02 23:27:55 millert Exp $ */
2: /* $NetBSD: z8530sc.h,v 1.15 2001/05/11 01:40:48 thorpej Exp $ */
3:
4: /*
5: * Copyright (c) 1994 Gordon W. Ross
6: * Copyright (c) 1992, 1993
7: * The Regents of the University of California. All rights reserved.
8: *
9: * This software was developed by the Computer Systems Engineering group
10: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
11: * contributed to Berkeley.
12: *
13: * All advertising materials mentioning features or use of this software
14: * must display the following acknowledgement:
15: * This product includes software developed by the University of
16: * California, Lawrence Berkeley Laboratory.
17: *
18: * Redistribution and use in source and binary forms, with or without
19: * modification, are permitted provided that the following conditions
20: * are met:
21: * 1. Redistributions of source code must retain the above copyright
22: * notice, this list of conditions and the following disclaimer.
23: * 2. Redistributions in binary form must reproduce the above copyright
24: * notice, this list of conditions and the following disclaimer in the
25: * documentation and/or other materials provided with the distribution.
26: * 3. Neither the name of the University nor the names of its contributors
27: * may be used to endorse or promote products derived from this software
28: * without specific prior written permission.
29: *
30: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40: * SUCH DAMAGE.
41: *
42: * @(#)zsvar.h 8.1 (Berkeley) 6/11/93
43: */
44:
45:
46: /*
47: * Function vector - per channel
48: */
49: struct zs_chanstate;
50: struct zsops {
51: void (*zsop_rxint)(struct zs_chanstate *);
52: /* receive char available */
53: void (*zsop_stint)(struct zs_chanstate *, int);
54: /* external/status */
55: void (*zsop_txint)(struct zs_chanstate *);
56: /* xmit buffer empty */
57: void (*zsop_softint)(struct zs_chanstate *);
58: /* process software interrupt */
59: };
60:
61: extern struct zsops zsops_null;
62:
63:
64: /*
65: * Software state, per zs channel.
66: */
67: struct zs_chanstate {
68:
69: /* Pointers to the device registers. */
70: volatile u_char *cs_reg_csr; /* ctrl, status, and reg. number. */
71: volatile u_char *cs_reg_data; /* data or numbered register */
72:
73: int cs_channel; /* sub-unit number */
74: void *cs_private; /* sub-driver data pointer */
75: struct zsops *cs_ops;
76:
77: int cs_brg_clk; /* BAUD Rate Generator clock
78: * (usually PCLK / 16) */
79: int cs_defspeed; /* default baud rate */
80: int cs_defcflag; /* default cflag */
81:
82: /*
83: * We must keep a copy of the write registers as they are
84: * mostly write-only and we sometimes need to set and clear
85: * individual bits (e.g., in WR3). Not all of these are
86: * needed but 16 bytes is cheap and this makes the addressing
87: * simpler. Unfortunately, we can only write to some registers
88: * when the chip is not actually transmitting, so whenever
89: * we are expecting a `transmit done' interrupt the preg array
90: * is allowed to `get ahead' of the current values. In a
91: * few places we must change the current value of a register,
92: * rather than (or in addition to) the pending value; for these
93: * cs_creg[] contains the current value.
94: */
95: u_char cs_creg[16]; /* current values */
96: u_char cs_preg[16]; /* pending values */
97: int cs_heldchange; /* change pending (creg != preg) */
98:
99: u_char cs_rr0; /* last rr0 processed */
100: u_char cs_rr0_delta; /* rr0 changes at status intr. */
101: u_char cs_rr0_mask; /* rr0 bits that stop output */
102: u_char cs_rr0_dcd; /* which bit to read as DCD */
103: u_char cs_rr0_cts; /* which bit to read as CTS */
104: u_char cs_rr0_pps; /* which bit to use for PPS */
105: /* the above is set only while CRTSCTS is enabled. */
106:
107: u_char cs_wr5_dtr; /* which bit to write as DTR */
108: u_char cs_wr5_rts; /* which bit to write as RTS */
109: /* the above is set only while CRTSCTS is enabled. */
110:
111: char cs_softreq; /* need soft interrupt call */
112: char cs_spare1; /* (for skippy :) */
113:
114: /* power management hooks */
115: int (*enable)(struct zs_chanstate *);
116: void (*disable)(struct zs_chanstate *);
117: int enabled;
118:
119: /* MD code might define a larger variant of this. */
120: };
121:
122: struct consdev;
123: struct zsc_attach_args {
124: char *type; /* type name 'serial', 'keyboard', 'mouse' */
125: int channel; /* two serial channels per zsc */
126: int hwflags; /* see definitions below */
127: /* `consdev' is only valid if ZS_HWFLAG_USE_CONSDEV is set */
128: struct consdev *consdev;
129: };
130: /* In case of split console devices, use these: */
131: #define ZS_HWFLAG_CONSOLE_INPUT 1
132: #define ZS_HWFLAG_CONSOLE_OUTPUT 2
133: #define ZS_HWFLAG_CONSOLE \
134: (ZS_HWFLAG_CONSOLE_INPUT | ZS_HWFLAG_CONSOLE_OUTPUT)
135: #define ZS_HWFLAG_NO_DCD 4 /* Ignore the DCD bit */
136: #define ZS_HWFLAG_NO_CTS 8 /* Ignore the CTS bit */
137: #define ZS_HWFLAG_RAW 16 /* advise raw mode */
138: #define ZS_HWFLAG_USE_CONSDEV 32 /* Use console ops from `consdev' */
139: #define ZS_HWFLAG_NORESET 64 /* Don't reset at attach time */
140:
141: int zsc_intr_soft(void *);
142: int zsc_intr_hard(void *);
143:
144: void zs_abort(struct zs_chanstate *);
145: void zs_break(struct zs_chanstate *, int);
146: void zs_iflush(struct zs_chanstate *);
147: void zs_loadchannelregs(struct zs_chanstate *);
148: int zs_set_speed(struct zs_chanstate *, int);
149: int zs_set_modes(struct zs_chanstate *, int);
150:
151: extern int zs_major;
152:
153: int zs_check_kgdb(struct zs_chanstate *, int);
154:
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